JPH08264715A - Semiconductor device - Google Patents

Abstract

PURPOSE: To prepare a capacitor of a small size not affected by a parasitic capacitance between electrodes and to facilitate the design of a high-integrated circuit by a method wherein an electrostatic relative permittivity of a dielectric film having a low permittivity and surrounding the outside of an upper electrode is made a specific value or below and further a dimensional component forming the dielectric film is made a specific length or below. CONSTITUTION: A pair of electrodes 1 and 3 are so laminated as to hold a dielectric 2 between them and a dielectric 4 of which the relative permittivity is smaller than that of the dielectric 2 is provided so that it covers the whole lateral side of the laminated body. An electrostatic relative permittivity of the dielectric film 4 is made 8.0 or below and the length of a dimensional component having a large effect on the capacitance of a semiconductor device is made 100μm or below. Then, the dielectric 4 is deposited on the upper side of an element having a three-layer structure. The film thickness thereof is about the same as the size in the vertical direction of a capacitor or above it. By etching the dielectric 4 until the upper electrode 3 of the capacitor is exposed, the capacitor is made to have a structure wherein it is protected by the lateral wall of the dielectric 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device and a manufacturing method thereof.

[0002]

2. Description of the Related Art A capacitor capacitive element basically has a structure in which a dielectric is sandwiched between two metal electrodes. When it is actually incorporated in a semiconductor integrated circuit, it is often formed with a structure in which three layers of a base electrode 11, a dielectric 12 and an upper electrode 13 are stacked as shown in FIG. Like capacitors used in DRAMs,
When it is necessary to obtain a large capacitance in a small area, a so-called "trench type / stuff type" structure is used, or a ferroelectric substance such as barium titanate / PZT is used. . In the figure, reference numeral 14 indicates a parasitic capacitance.

On the other hand, in analog integrated circuits, high frequency operation and low power consumption are important key points.
Among them, the presence of capacitors has a great influence on the performance of high frequency operation. If the capacitance of the capacitor deviates from the design value, the time constant of the circuit will also become incorrect. The element size of the capacitor is reduced,
As the capacitance of the element itself becomes smaller, the influence of the parasitic capacitance due to the influence around the element becomes apparent. Particularly, the parasitic capacitance between the upper electrode and the base substrate becomes a big problem. Considering the capacitance-to-electrode dependency of a capacitor using parallel plate type electrodes, there is a concern that the capacitance value may deviate from the design value to a higher capacitance side as the electrode size decreases. It is considered that this is because the capacitance 14 is formed between the upper electrode via the electric charge induced in the lower part of the device shown in FIG. 4 and the air layer in the upper part of the device. For example, MOS
In (Metal-Oxide-Semiconductor) capacitor, the SiO ₂ film surface is a dielectric film, a charge such as ion accumulation caused by the outside air impact, SiO ₂ surfaces of the electrode vicinity charged conductivity, the upper part of the apparent The electrode area increases. On the other hand, since the lower electrode (Si substrate) accumulates the mirror image charge for this charge, the inversion layer capacitance increases especially when the substrate surface is inverted. This is because ASGrove's book “Physics and
Technology of Semiconductor Devices ”.

[0004]

As described above, it is necessary to reduce the parasitic capacitance between the electrodes in order to obtain a capacitance having a low capacitance value as designed with a small element size in the future. An object of the present invention is to provide a semiconductor device having a low parasitic capacitance value when it is desired to obtain such a low capacitance.

[0005]

In order to prevent the induction of charges generated on the surface of the element base electrode side, in the semiconductor device of the present invention, the outside of the upper electrode is surrounded by a second dielectric having a low dielectric constant, and an external atmosphere is provided. Take a structure to shut off. The dielectric constant of the dielectric film is 8.0 or less at the measurement frequency of about 1 MHz. Furthermore, the semiconductor device is characterized in that the main dimension component forming the two-dimensional shape of the dielectric film is 100 μm or less. Here, the second surrounding
It is desirable that the dielectric material (1) has a smaller relative permittivity than the first dielectric material sandwiched between the electrodes. Further, this second dielectric can be replaced with a dielectric used between the electrodes, but in this case, the distance between the electrodes is sufficiently short as the film thickness of the dielectric portion provided outside the electrodes. Is desirable.

[0006]

The present inventors have examined in what range the deviation of the capacitance value from the design value appears remarkably as described above. The dielectric substance is a silicon nitride film (film thickness 10
0 nm) is used. As a result, if the capacitor to be formed is a square or a rectangle with no significant difference between the long side and the short side, if a capacitance of 5 pF or less is formed with a size of 100 μm or less on a side, the capacitance value per unit area is It was found that it increases in inverse proportion to the decrease of. An increase of about 6% was observed for the 40 um element and about 14% for the 20 um element. It is necessary to suppress the capacitance value of the device having the WO dimension of about 200 μm.

Due to the protective effect of the low dielectric material, the surface of the underlying electrode in question is not exposed to the external atmosphere and charge accumulation does not occur. The capacitance of the capacitance is proportional to the relative permittivity. Since the protective dielectric used here has a low relative permittivity, the problematic stray capacitance becomes smaller than the capacitance of the element itself.
As a result, the parallel parasitic capacitance existing from the upper electrode to the lower electrode can be neglected, and it is possible to form a capacitor having a capacitance that is the same as the design value even if the size is small.

[0008]

Embodiments of the present invention will be described below. FIG. 1 shows a cross-section of a device according to an embodiment of the present invention, in which a dielectric pair 2 is sandwiched between a pair of electrodes 1 and 3 and is laminated so that the entire side surface of the laminated body is covered with the dielectric layer. A structure in which a dielectric 4 having a small relative dielectric constant of the body 2 is provided is shown.

As means for carrying out this method, there are two methods as shown below. The first method is
This is a case where a material different from the dielectric material between the dielectrics between the electrodes is used, and FIG. First of all, a desired capacitor is attached to the lower electrode 1, the first dielectric 2,
The upper electrode 3 is formed with a three-layer structure (a in the figure). Next, the second dielectric 4 having a relative dielectric constant lower than that of the first dielectric 2 is deposited on the upper surface of the completed element (FIG. 8B). here,
The film thickness should be the same as or larger than the vertical size of the capacitor. Next, the second dielectric 4 is etched until the upper electrode 3 of the capacitor is exposed (FIG. 7C). As a result, the capacitor has a structure protected by the side wall of the second dielectric.

Next, as a second method, when the same material as the dielectric material between the electrodes is used, a manufacturing process for realizing this element is shown in FIG. First, the lower electrode 1 is formed, and then the first dielectric 2 is deposited on the upper portion of the lower electrode 1 (a in the figure). Here, the first dielectric 2 is patterned to a size larger than the size of the lower electrode 1 and the size of the lower electrode not exposed to the outside air (FIG. 8B). Then, the portion where the upper electrode 3 is to be formed is etched on the upper portion of this material, and the film thickness of this portion is made thinner than the surrounding film thickness (FIG. 7C). Here, the film thickness to be thinned can be uniquely determined by the design value of the element. Finally, the upper electrode 3 is formed on the first dielectric 2.

In each of the above-mentioned embodiments, the dimensional dependence per unit area is not observed, and the increase in the capacitance value observed in the element having a dimension of 100 μm or less is about 3 at the element dimension of 20 μm as compared with the element of 200 μm. It was held down to%.

[0012]

As described above, according to the present invention, a small-sized capacitor which is less affected by the parasitic capacitance between electrodes can be produced, which facilitates the design of a highly integrated circuit and can be used in a wide range of fields.

[Brief description of drawings]

FIG. 1 is a sectional view showing the structure of a capacitor proposed by the present invention.

FIG. 2 is a process sectional view showing a process for realizing the present invention.

FIG. 3 is a process cross-sectional view showing another embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a parasitic capacitance which becomes a problem in a capacitor having a conventional structure.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Lower electrode 2 ... 1st dielectric material 3 ... Upper electrode 4 ... 2nd dielectric material

Claims (3)

[Claims] 1. A semiconductor substrate, a lower electrode formed on the surface of the semiconductor substrate, a dielectric film formed on the surface of the lower electrode, and an upper electrode formed on the surface of the dielectric film, And a sidewall dielectric film formed on both side walls of the lower electrode, the dielectric film and the upper electrode, the sidewall dielectric film being adjacent to a conductive film different from the lower electrode and the upper electrode. The capacitance of the semiconductor device is such that the dielectric constant of the dielectric film is 8.0 or less and the two-dimensional shape of the dielectric film as viewed from the upper electrode side is formed. A semiconductor device having a dimension component length of 100 μm or less, which will have a great influence on the component. 2. The capacitance value appearing between the lower electrode and the upper electrode and the dielectric film is 10% or less of the capacitance value appearing between the upper electrode and the lower electrode. The semiconductor device according to claim 1. 3. The semiconductor device according to claim 3, wherein the dielectric constant of the sidewall dielectric film is lower than the dielectric constant of the dielectric film.