JPH08262083A - Device for measuring jitter - Google Patents

Abstract

PURPOSE: To obtain a jitter-measuring device which measures highly accurately a jitter of a periodic signal waveform, including a very small jitter. CONSTITUTION: A periodic signal waveform of a signal of which the jitter is to be measured is branched in two. One signal is inputted to a PLL circuit 20 and a sine wave signal obtained by multiplying an average period of that signal by N is generated therein and given to a sampler 11. It is advisable that a voltage adder 25 for adding a phase offset voltage is provided between a phase comparator 21 and a loop filter 22 in the PLL circuit 20 so that the phase of an output signal can be shifted. The other signal is given to the sampler 11 and the input signal is thereby sampled. Jitter voltages sampled are subjected to A/D conversion by an A/D converter 12, jitter voltage values in a series thus obtained are stored in a memory 13 and computed by an arithmetic part 14 and thereby the amount of the jitter is determined.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a jitter measuring device for measuring minute jitter of a periodic signal waveform with high accuracy.

[0002]

2. Description of the Related Art Even if a periodic signal waveform, such as a pulse train in digital transmission, is correctly arranged on the time axis at the time of transmission, fluctuations occur in the pulse arrangement when passing through a regenerator or the like. This gives fluctuations to the intervals of the decoded sampling pulses, and becomes noise. This fluctuation or deviation is called jitter. If this jitter amount is large, noise will increase, leading to erroneous transmission and malfunction of equipment. Therefore, when dealing with a periodic pulse train or the like, it is necessary to always consider the jitter and measure and consider even the minute jitter.

FIG. 3 shows an example of a conventional jitter measuring apparatus. In response to the reference signal from the reference signal generator 17 with extremely small jitter, the ramp wave generator generates a ramp wave (sawtooth wave or triangular wave) and outputs it to the sampler 11. Therefore, if this regular ramp wave signal is sampled by the jittered signal from the input terminal 10, the jitter can be measured by the fluctuation of the sampled voltage.

Therefore, the period of the reference signal generator 17 needs to be the same as the basic period of the signal to be measured for jitter, and the same reference signal is used in the jitter test of the subordinate electronic circuits and electronic parts, and one reference signal is used as a reference. It is used as a reference signal of the signal generator 17, and another branched reference signal is given to a subordinate electronic circuit or electronic component and its output signal is applied to the input terminal 10 as a jittered signal. For the reference signal when the same reference signal cannot be used, the cycle of the reference signal generator 17 is determined based on the output signal of the sampler 11.

Next, in order to obtain the jitter amount from the output signal of the sampler 11, as shown in FIG. 3, the A / D (analog / digital) conversion is performed, and then the operation section 14 performs the operation to display on the display 15 or print. To go out. Although not shown, a method of square-law detecting the output signal of the sampler 11 and displaying it on a level meter as described in the Electronic Communication Handbook has been used.

[0006]

By the way, the conventional apparatus requires the ramp wave generator 18, so that it is difficult to generate a ramp waveform with low jitter. Further, high speed is required for measuring the minute jitter, and linearity is required for high accuracy, but there is a limit in generating the ramp wave. In addition, it is necessary to attach and detach the signal delay device in order to change the timing of the ramp wave input and the sampling clock, that is, to shift the phase between them.

The present invention is intended to solve these problems and provide a jitter measuring device for measuring a minute jitter with high accuracy.

[0008]

In order to achieve the above object, the present invention uses a PLL (Phase Locked Loop) circuit to generate a sine wave of N times the jittered signal to be measured with the average period of the jittered signal to be measured. A signal is generated and this sinusoidal signal is sampled by the signal to be measured. This will be described in detail below.

The PLL circuit generally has a phase comparator for phase-comparing two input signals, a loop filter for removing unnecessary noise of its output voltage, and a sine wave whose oscillation frequency and its phase are corrected by the output voltage of the loop filter. It is composed of a VCO (voltage controlled oscillator) that oscillates a signal, and a 1 / N frequency divider that outputs the output signal of the VCO and divides the frequency of the signal into 1 / N and feeds it back to the phase comparator. Therefore, when the jittered signal from the input terminal is input to one terminal of the phase comparator, the VCO oscillates a sine wave that is N times the input signal. Moreover, the oscillation frequency does not fluctuate with the jitter of the input signal, and the oscillation continues stably at the average period of the input signal.

Therefore, the output signal of the VCO having a very small jitter is input to the sampler, and the input signal is sampled by the jittered signal. The sampled sampler voltage is A / D converted by an A / D converter, and A / D converted.
The converted series of digital voltage values is stored in memory.
When the sampling value for a certain period of time is obtained, the calculation unit calculates based on this data to calculate the jitter value Tj.

Here, the sine wave signal oscillated by the VCO often has harmonics. If the harmonics are strong, the sine wave will be distorted, and it will be difficult to obtain the correct jitter value. Therefore, if a low-pass filter, that is, a harmonic elimination filter is inserted on the output side of the VCO, the harmonics are eliminated and the required sine wave can be output.

At the sampling position, the sine wave phase is 0 degree, that is, the slope of the sine wave waveform is the most linear around sin (nπ), and the steepest is the most suitable for measuring the minute jitter. Here, n is an integer including 0. Therefore, in order to control the phase shift of the oscillation sine wave of the VCO, a voltage adder for adding / subtracting the output voltage of the phase comparator and the phase offset voltage is provided on the output side of the phase comparator, and the phase offset voltage is externally supplied. It is better to give it so that the phase can be shifted.

In order to make the slope of the waveform at the sampling position steeper, it is sufficient to increase the frequency division ratio N of the 1 / N frequency divider, that is, the multiplication number N in the PLL circuit. The higher the frequency, the steeper the unit time becomes. Examples will be described below.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is an explanatory diagram of sampling and jitter. The parts corresponding to those in FIG. First, the configuration will be described with reference to FIG. The jittered signal is input from the input terminal 10. This input signal is split into two, one of which is the PLL
The other signals are input to the sampler 11 to the phase comparator 21 of the circuit 20.
Given as a sampling signal.

In the PLL circuit 20, a VCO (voltage controlled oscillator) 23 oscillates at a preset frequency,
The output frequency is divided into 1 / N by the 1 / N divider 24 and fed back to the phase comparator 21. Therefore, the VCO 23 multiplies the external signal input to the phase comparator 21 by N and oscillates. In the phase comparator 21, the feedback VC is returned.
The phase of the signal from O23 and the jittered signal are compared and the phase error signal is sent out. The phase error signal transmitted also contains a noise component unnecessary for the control of the VCO 23.

Therefore, in order to remove this unnecessary noise component, a loop filter 22 is provided between the phase comparator 21 and the VCO 23. That is, unnecessary noise components are removed from the phase error output signal of the phase comparator 21 through the loop filter 22, and the oscillation frequency of the VCO 23 and its phase are controlled. Then, the loop filter 22 also determines the response characteristic. That is, the output signal of the VCO 23 is not controlled every cycle, but is controlled at the average cycle of a certain period.

The PLL circuit 20 is provided with a voltage adder 25 for adding and subtracting the phase offset voltage between the phase comparator 21 and the loop filter 22 to shift the phase of the oscillation signal of the VCO 23 by the phase offset voltage. You can Therefore, the phase can be controlled to the optimum phase for sampling by the sampler 11. This phase offset voltage may be generated by a phase offset voltage generator 27 mainly composed of a D / A converter and applied to the voltage adder 25.

The output signal of the VCO 23 generally contains harmonic signals. When the component of the harmonic signal is large, the output signal has a distorted signal waveform instead of a pure sine wave waveform. If the sampled reference signal has a distorted signal waveform, the accuracy of the jitter measurement value decreases and the reproducibility also deteriorates.
Therefore, when the harmonic signal component is large, the VCO 23
The harmonics removal filter 26 may be inserted between the sampler 11 and the sampler 11. It is not necessary to include it when the harmonic component is small.

The sampler 11 receives the sine wave signal from the PLL circuit 20 and samples it with the jittered signal from the input terminal 10. The situation is shown in FIG.
The sampler input signal, that is, the output signal of the PLL circuit 20 is sampled by the sampling signal, that is, the measured signal to be jittered. The PLL circuit 2 in FIG. 2 (A)
The multiplication number N of 0 is 3. The sampling position is almost 2
Sampling is performed every Nπ.

The voltage sampled by the sampler 11 is A / D converted by the A / D converter 12 and sequentially stored in the memory 13. Assuming that the amplitude of the sampler input signal is A, the stored jitter voltage is ±± maximum as shown in FIG.
In A, it is scattered near 0. This jitter voltage is calculated by the calculation unit 14 to obtain the jitter amount.

The sampler input signal of FIG. 2A, that is, P
The signal waveform Y (t) of the output signal of the LL circuit 20 is Y
It can be expressed by (t) = A · sin (2πNf _i t). Here, A is the amplitude, N is the multiplication number of the PLL circuit 20,
f _i is the frequency of the jittered measurement signal (sampling signal), and t is time. The jitter voltage v (t) obtained by sampling this signal is v (t) = A · sin (2πNf _i ·
It is represented by Tj (t)). Here, Tj (t) is time data of jitter. Therefore, Tj (t) is Tj (t)
= (1 / 2πNf _i ) sin ⁻¹ (v (t) / A).

The arithmetic unit 14 first calculates the jitter time data Tj (t) from a series of jitter voltages v (t) stored in the memory 13. The obtained jitter time data Tj (t) is obtained as a function of time in, for example, ps (picosecond) display, but it still contains the offset of the sine wave. Therefore, by calculation, for example, the mean square value Tj _rms may be displayed as the actual value of jitter. For this, the average value Tj _m of Tj (t) in a certain period is calculated, and the square mean of the difference between Tj (t) and Tj _m is calculated. That is, the execution value Tj _rms of the jitter is calculated from the m-point data stored in the memory 13 by the following equation. Tj
_rms = √Σ (Tj (t _i ) −Tj _m ) ² , where Σ is t
_i of _i means addition from 1 to m, and is a mean square formula.

In addition, as the amount of jitter, p of Tj (t)
The time display of eak to peak may be displayed. Further, by performing the fast Fourier transform on the jitter time data Tj (t),
It is also possible to analyze the frequency component of jitter.

The display unit 15 displays the calculation result of the calculation unit 14. However, the calculation result is not limited to being displayed on the display unit 15. It may be temporarily stored, or the calculation result may be data-transmitted and used for another purpose, for example, as an element of system design data.

[0025]

Since the jitter measuring apparatus has the configuration described in detail above, the present invention has the following effects. Since the reference signal is generated by operating the PLL circuit 20 at the periodic average frequency of the measured signal to be jittered, this reference signal has low jitter and can be easily synchronized with the measured signal to be jittered. The reference signal is a sine wave, and by passing this reference signal through the harmonic elimination filter 26, a sine wave with high purity is obtained, distortion is small, and reproducibility is good.

By appropriately selecting the multiplication number N of the PLL circuit 20 and increasing N, the reference signal becomes faster and a small jitter can be measured, and by decreasing N, a large jitter can be measured. By shifting the phase of the oscillating frequency of the PLL circuit 20, the sampling timing is set to n phase of sine wave.
Since it can be controlled to the position of π, it can be a reference signal with good linearity. Moreover, no signal delay device is required. Therefore, this jitter measuring device can measure even minute jitter, and its technical effect is great.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is an explanatory diagram regarding sampling and a jitter value.

FIG. 3 is a configuration diagram of a conventional example.

[Explanation of symbols]

 10 Input Terminal 11 Sampler 12 A / D Converter 13 Memory 14 Computing Unit 15 Display 17 Reference Signal Generator 18 Ramp Wave Generator 20 PLL Circuit 21 Phase Comparator 22 Loop Filter 23 VCO (Voltage Controlled Oscillator) 24 1 / N Frequency divider 25 Voltage adder 26 Harmonic elimination filter 27 Phase offset voltage generator

Claims (3)

[Claims] 1. A phase comparator (21), a loop filter (22), a VCO (23) and a 1 / N frequency divider (24) in a jitter measuring apparatus for measuring the jitter of a periodic signal waveform.
And a periodic jittered signal to be measured is input, and a N-multiplied sine wave signal of the period of the jittered signal to be measured is output.
A circuit (20), a sampler (11) for inputting the sine wave signal from the PLL circuit (20) and sampling the sine wave signal with the jittered signal, and a sampling voltage of the sampler (11) is A / A D-converter (12) performs A / D conversion and stores a jitter voltage value v (t) in a memory (13) and a series of the jitter voltage values v (t) stored in the memory (13) Operation unit (14) for obtaining the amount Tj
A jitter measuring device comprising: 2. A harmonic elimination filter (26) for eliminating harmonics of a sine wave signal output by a PLL circuit (20), which is cascade-connected to the output side of the PLL circuit (20). 1. The jitter measuring device described in 1. 3. The PLL circuit (20) includes a phase comparator (2).
The output side of 1) has an adder (25) for adding and subtracting a phase offset voltage for shifting the phase of the output sine wave signal of the PLL circuit (20) and an output voltage of the phase comparator (21). The jitter measuring device according to claim 1 or 2.