JPH08256018A - Power consumption control circuit for high-frequency linear amplifier - Google Patents

Power consumption control circuit for high-frequency linear amplifier

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Publication number
JPH08256018A
JPH08256018A JP5692895A JP5692895A JPH08256018A JP H08256018 A JPH08256018 A JP H08256018A JP 5692895 A JP5692895 A JP 5692895A JP 5692895 A JP5692895 A JP 5692895A JP H08256018 A JPH08256018 A JP H08256018A
Authority
JP
Japan
Prior art keywords
frequency linear
signal
power consumption
high frequency
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5692895A
Other languages
Japanese (ja)
Inventor
Hirohito Yajima
裕仁 矢島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5692895A priority Critical patent/JPH08256018A/en
Publication of JPH08256018A publication Critical patent/JPH08256018A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To provide the power consumption control circuit for high-frequency linear amplifier having satisfactory amplification efficiency. CONSTITUTION: Mutual modulation distortion is detected from the input/output signal of a high-frequency linear amplifier part 3 by a mutual modulation distortion detection circuit composed of couplers 2 and 4, distributors 7 and 10, detectors 6 and 10, delay line 8, synthesizer 13 and control part 16 or the like. Corresponding to a signal based on the state of mutual modulation distortion outputted from the control part 16, a bias circuit part 9 controls the level of a drain current at the high-frequency linear amplifier part 3. Since bias setting is performed to the high-frequency linear amplifier part 3 corresponding to the level of mutual modulation distortion, reactive power is reduced and high- efficiency high-frequency linear amplification can be loaded. Besides, the temperature increase of the amplifier can be managed/suppressed without subordinately providing any temperature detector.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高周波直線増幅器の消
費電力制御回路に関し、特に、複数のキャリアを同時に
増幅する共通増幅器の消費電力を低減する高周波直線増
幅器の消費電力制御回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power consumption control circuit for a high frequency linear amplifier, and more particularly to a power consumption control circuit for a high frequency linear amplifier for reducing the power consumption of a common amplifier for simultaneously amplifying a plurality of carriers.

【0002】[0002]

【従来の技術】従来、この種の消費電力の低減を目的と
する一般的な装置として特開昭56−69907号があ
る。本従来例1は、直線増幅器の出力を検出し増幅器の
バイアスを制御する構成とされている。この装置は図1
1に示す通り、電波がアンテナ31で受信され、直線増
幅器32により一定の利得のもとに増幅された後、出力
のアンテナ33へ供給される。一方、出力の一部はダイ
オード等から構成されている検出回路34によって検出
され、この出力を差動増幅回路等から構成されている比
較回路35に加えて基準レベルと比較し、その出力によ
って直線増幅器32のトランジスタのエミッタ・ベース
間に接続されたバイアス回路36のバイアス値を連続的
に変えて、相互変調歪が大きくならないようにトランジ
スタのコレクタ電流を制御する。
2. Description of the Related Art Conventionally, there is JP-A-56-69907 as a general device for the purpose of reducing this kind of power consumption. The conventional example 1 is configured to detect the output of the linear amplifier and control the bias of the amplifier. This device is shown in Figure 1.
As shown in FIG. 1, the radio wave is received by the antenna 31, amplified by the linear amplifier 32 with a constant gain, and then supplied to the output antenna 33. On the other hand, a part of the output is detected by a detection circuit 34 formed of a diode or the like, and this output is added to a comparison circuit 35 formed of a differential amplifier circuit or the like and compared with a reference level, and a linear output is obtained by the output. The bias value of the bias circuit 36 connected between the emitter and base of the transistor of the amplifier 32 is continuously changed, and the collector current of the transistor is controlled so that the intermodulation distortion does not become large.

【0003】これは、多数波入力の数およびその大きさ
により利得が変わらない範囲で消費電流を制御しようと
するものである。この消費電力の低減を目的とした装置
では、出力レべルのみを検出し、出力レべルに応じて増
幅器のバイアス設定を行っている。
This is to control the current consumption within a range in which the gain does not change depending on the number of multi-wave inputs and the size thereof. In the device for reducing the power consumption, only the output level is detected, and the bias of the amplifier is set according to the output level.

【0004】他の従来例2として、特開平1−9830
4号公報がある。本従来例2は、入力信号を電力増幅す
る電力増幅回路と、直流バイアス電圧を電力増幅回路に
供給する電源回路と、制御手段とを備え、電力増幅回路
が入力信号を最良の動作点で線形に電力増幅するように
電源回路から出力される直流バイアス電圧を制御すると
している。この構成において、電力トランジスタの温度
補償用に温度検出用サーミスタを備えている。
As another conventional example 2, Japanese Patent Laid-Open No. 9830/1989
There is No. 4 publication. The conventional example 2 includes a power amplifier circuit for power-amplifying an input signal, a power supply circuit for supplying a DC bias voltage to the power amplifier circuit, and a control means, and the power amplifier circuit linearizes the input signal at the best operating point. The DC bias voltage output from the power supply circuit is controlled so that the power is amplified. In this configuration, a temperature detecting thermistor is provided for temperature compensation of the power transistor.

【0005】さらに他の従来例2として、特開平3−3
962号公報がある。本従来例3の「トランジスタ直線
増幅器の動作点補償回路」では、トランジスタの温度補
償用に放熱器温度センサダイオードを備えて構成してい
る。
Still another conventional example 2 is Japanese Patent Laid-Open No. 3-3.
There is a 962 publication. In the "operating point compensation circuit of the transistor linear amplifier" of the conventional example 3, a radiator temperature sensor diode is provided for temperature compensation of the transistor.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記の
従来例1では以下の問題点を伴う。共通増幅器に用いら
れる高周波用の直線増幅器32は、相互変調歪特性を良
くするため、トランジスタやFETの動作はA級もしく
はAB級で用いられることが多い。しかも電波法により
許容スプリアス規格が決まっているため、最大キャリア
数の時に相互変調歪がスプリアスの規格を満足出来るよ
うな設定にすることが多い。このため、キャリア数が少
なかったり、キャリアレべルが低い時やアイドル時にも
多くの電流が流れ無駄が多い。
However, the above-mentioned conventional example 1 has the following problems. The high-frequency linear amplifier 32 used as the common amplifier is often used in class A or class AB operation for improving the intermodulation distortion characteristics. Moreover, since the allowable spurious standard is determined by the Radio Law, the intermodulation distortion is often set to satisfy the spurious standard at the maximum number of carriers. For this reason, a large amount of current flows and is wasteful even when the number of carriers is small, the carrier level is low, or during idle.

【0007】さらに、消費電力を低減させ増幅器の動作
点の補償を目的とした上掲の各従来例の装置では、出力
レべルのみを検出し、出力レべルに応じて増幅器のバイ
アス設定を行うものである。例えば従来例1では出力レ
べルに依存しない温度変化等による相互変調歪の悪化ま
では十分に対応が出来ない。また温度変化まで含んだ十
分な補償を図るためには、従来例2および3のように温
度検出器を必要とする問題点を伴う。
Further, in each of the above-described conventional devices for reducing the power consumption and compensating the operating point of the amplifier, only the output level is detected, and the bias setting of the amplifier is set according to the output level. Is to do. For example, in Conventional Example 1, it is not possible to sufficiently cope with deterioration of intermodulation distortion due to temperature change which does not depend on the output level. Further, in order to achieve sufficient compensation including temperature change, there is a problem that a temperature detector is required as in the conventional examples 2 and 3.

【0008】本発明は、増幅効率の良い高周波直線増幅
器の消費電力制御回路を提供することを目的とする。
It is an object of the present invention to provide a power consumption control circuit for a high frequency linear amplifier having good amplification efficiency.

【0009】[0009]

【課題を解決するための手段】かかる目的を達成するた
め、本発明の高周波直線増幅器の消費電力制御回路は、
高周波直線増幅手段と、この高周波直線増幅手段によっ
て発生する相互変調歪のレべルを検出する相互変調歪検
出手段と、相互変調歪のレべルに応じて高周波直線増幅
手段のバイアスを調節し、高周波直線増幅手段に流れる
電流値を制御するバイアス制御手段とを有することを特
徴としている。
To achieve the above object, a power consumption control circuit for a high frequency linear amplifier according to the present invention comprises:
High frequency linear amplification means, intermodulation distortion detection means for detecting the level of intermodulation distortion generated by this high frequency linear amplification means, and adjusting the bias of the high frequency linear amplification means according to the level of intermodulation distortion. , And bias control means for controlling the value of the current flowing through the high frequency linear amplification means.

【0010】また、上記の相互変調歪検出手段は、高周
波直線増幅手段の入出力信号の差分信号を抽出する合成
手段を有し、この抽出された差分信号の大きさに基づき
バイアス制御手段を制御するとよい。
Further, the above intermodulation distortion detecting means has a synthesizing means for extracting a differential signal of the input / output signals of the high frequency linear amplifying means, and controls the bias control means on the basis of the magnitude of the extracted differential signal. Good to do.

【0011】また、本発明の高周波直線増幅器の消費電
力制御回路は、高周波直線増幅手段と、この高周波直線
増幅手段の入力信号および出力信号の差分信号を抽出す
る差分信号抽出手段と、差分信号に基づく制御信号を出
力する制御手段と、高周波直線増幅手段のバイアスを調
節し、高周波直線増幅手段に流れる電流値を制御するバ
イアス制御手段とを有し、制御手段が出力する制御信号
に基づきバイアス制御手段が高周波直線増幅手段の動作
を制御することを特徴としている。
Further, the power consumption control circuit for a high frequency linear amplifier of the present invention includes a high frequency linear amplifying means, a differential signal extracting means for extracting a differential signal between an input signal and an output signal of the high frequency linear amplifying means, and a differential signal. Bias control based on the control signal output by the control means, which has a control means for outputting a control signal based on the control signal and a bias control means for adjusting the bias of the high frequency linear amplification means to control the value of the current flowing through the high frequency linear amplification means. The means controls the operation of the high frequency linear amplification means.

【0012】また、上記の差分信号抽出手段は、信号を
分配する2個の分配手段と信号の遅延を行うディレ−ラ
インと信号を合成する合成手段とを有し、入力信号およ
び出力信号を2個の分配手段でそれぞれ分配し、この分
配された入力信号をディレ−ラインで遅延させ、遅延さ
れた入力信号と分配された出力信号との間の差分信号を
合成手段が検出するとよい。
The differential signal extracting means has two distributing means for distributing the signals, a delay line for delaying the signals and a combining means for combining the signals, and two input signals and two output signals are provided. It is preferable that each of the distribution means distributes the distributed input signal, the delayed input signal is delayed by the delay line, and the synthesizing means detects a differential signal between the delayed input signal and the distributed output signal.

【0013】[0013]

【作用】したがって、本発明の高周波直線増幅器の消費
電力制御回路によれば、この高周波直線増幅によって発
生する相互変調歪のレべルを検出し、この相互変調歪の
レべルに応じて高周波直線増幅におけるバイアスを調節
し、高周波直線増幅手段に流れる電流値を制御する。よ
って、高周波直線増幅のバイアス量が最適に維持され、
相互変調歪および無効消費電力の発生が少なくなる。
Therefore, according to the power consumption control circuit of the high frequency linear amplifier of the present invention, the level of the intermodulation distortion generated by the high frequency linear amplification is detected, and the high frequency is detected according to the level of the intermodulation distortion. The bias in the linear amplification is adjusted to control the current value flowing in the high frequency linear amplification means. Therefore, the bias amount for high frequency linear amplification is maintained optimally,
Intermodulation distortion and reactive power consumption are reduced.

【0014】[0014]

【実施例】次に添付図面を参照して本発明による高周波
直線増幅器の消費電力制御回路の実施例を詳細に説明す
る。図1〜図10を参照すると本発明の高周波直線増幅
器の消費電力制御回路の実施例が示されている。図1は
一実施例を示すブロック、図2〜図6は図1の主要構成
部におけるベクトル、図7はGaAs−FETの入出力
特性例、図8〜図10はGaAs−FETの相互変調歪
特性例をそれぞれ表す図である。
Embodiments of the power consumption control circuit for a high frequency linear amplifier according to the present invention will now be described in detail with reference to the accompanying drawings. 1 to 10, there is shown an embodiment of a power consumption control circuit for a high frequency linear amplifier according to the present invention. 1 is a block diagram showing an embodiment, FIGS. 2 to 6 are vectors in the main components of FIG. 1, FIG. 7 is an example of input / output characteristics of GaAs-FET, and FIGS. 8 to 10 are intermodulation distortion of GaAs-FET. It is a figure showing each characteristic example.

【0015】図1に示す高周波直線増幅器の消費電力制
御回路は、RF信号の入出力端子であるRF入力端子1
並びにRF出力端子5、これら入出力端子間に接続され
たRFキャリアを抽出する第1のカプラ2並びに第2の
カプラ4、信号を増幅する高周波直線増幅部3を有して
いる。さらに、信号を分離・分割する第1の分配器7、
第2の分配器10並びに信号を合成する合成器13、R
Fキャリアを検波して信号を検出する第1の検波器6、
第2の検波器15並びに第3の検波器14、信号の減衰
を行うアッテネータ11、180度RF信号の位相を回
転させる位相器12、信号を遅延させるディレーライン
8、所望の動作点を設定するバイアス回路9および制御
部16とを有して構成される。
The power consumption control circuit of the high frequency linear amplifier shown in FIG. 1 has an RF input terminal 1 which is an input / output terminal for an RF signal.
Further, it has an RF output terminal 5, a first coupler 2 and a second coupler 4 for extracting an RF carrier connected between these input / output terminals, and a high frequency linear amplification section 3 for amplifying a signal. Further, a first distributor 7 for separating / dividing a signal,
Second distributor 10 and combiner 13, R for combining signals
A first detector 6, which detects the signal by detecting the F carrier,
The second detector 15 and the third detector 14, the attenuator 11 for attenuating the signal, the phase shifter 12 for rotating the phase of the RF signal by 180 degrees, the delay line 8 for delaying the signal, and the desired operating point are set. The bias circuit 9 and the control unit 16 are included in the configuration.

【0016】上記のように構成される高周波直線増幅器
の消費電力制御回路の動作を、図1を用いて説明する。
RF入力端子1から入力したRF信号は、第1のカプラ
2を通り、高周波直線増幅部3にて増幅され第2のカプ
ラ4を通ったあとRF出力端子5より出力される。この
RF信号の増幅過程において、以下の手順で高周波直線
増幅部3の利得を求める。
The operation of the power consumption control circuit of the high frequency linear amplifier configured as described above will be described with reference to FIG.
The RF signal input from the RF input terminal 1 passes through the first coupler 2, is amplified by the high frequency linear amplification unit 3, passes through the second coupler 4, and is then output from the RF output terminal 5. In the process of amplifying the RF signal, the gain of the high frequency linear amplification unit 3 is obtained by the following procedure.

【0017】高周波直線増幅部3に入るRFキャリアを
第1のカプラ2により取り出し、第1の分配器7にて分
配した後、第1の検波器6により検波し、増幅部の入力
レべルとして制御部16に入力する。同様に高周波直線
増幅部3により増幅されたRFキャリアを第2のカプラ
4から取り出し、第2の分配器10で分配した後、第2
の検波器15により検波して増幅部の出力レべルとして
制御部16に入力する。制御部16では、上記の増幅部
に入る入力レべルと増幅部により増幅された出力レべル
とを比較し、高周波直線増幅部3の利得を求める。
The RF carrier entering the high-frequency linear amplification unit 3 is taken out by the first coupler 2, distributed by the first distributor 7, and then detected by the first detector 6, and the input level of the amplification unit is detected. Is input to the control unit 16. Similarly, the RF carrier amplified by the high-frequency linear amplification unit 3 is taken out from the second coupler 4 and distributed by the second distributor 10, and then the second carrier
The signal is detected by the detector 15 and input to the control unit 16 as the output level of the amplification unit. The control unit 16 compares the input level entering the amplification unit with the output level amplified by the amplification unit to obtain the gain of the high frequency linear amplification unit 3.

【0018】上記の高周波直線増幅部3における増幅に
おいて発生する相互変調歪のみを取り出す過程を、図1
および図2〜図6を用いて以下に説明する。図2〜図6
はRFキャリアが2波の例をべクトル図で示している。
なお、これらの図中のベクトルの長さはRFレべルを示
し、方向は位相を示している。
The process of extracting only the intermodulation distortion generated in the amplification in the high frequency linear amplification section 3 will be described with reference to FIG.
Also, description will be made below with reference to FIGS. 2 to 6
Shows a vector diagram in which the RF carrier has two waves.
The length of the vector in these figures indicates the RF level, and the direction indicates the phase.

【0019】図2の示す信号は前述の第1の分配器7に
より分配されたもう一つのRF信号であり、この信号は
ディレーライン8を通して合成器13の一方の入力に入
力される。また、合成器13の他方の入力へは、図3に
示す前述の第2の分配器10により分配されたRF信号
がアッテネータ11でレべルを落されて図4の状態とさ
れ、さらに位相器12により180度RF信号の位相が
回転されて図5に示す状態とされた後に入力される。
The signal shown in FIG. 2 is another RF signal distributed by the aforementioned first distributor 7, and this signal is input to one input of the combiner 13 through the delay line 8. Further, to the other input of the synthesizer 13, the RF signal distributed by the second distributor 10 shown in FIG. 3 is leveled by the attenuator 11 to be in the state of FIG. The phase of the RF signal is rotated by 180 degrees by the device 12 to be in the state shown in FIG.

【0020】一般的に増幅器においてRF信号の位相が
回転し時間的な遅れが生じるため、合成器13の2つの
入力の位相・遅れ時間を合わせるため、ディレーライン
8により修正を行う。合成器13においてこれらの2つ
の入力信号の差分信号が抽出される。この差分信号は、
高周波直線増幅部3における増幅過程において生じた歪
信号である。合成器13からの出力において、図6に示
す相互変調歪成分のみが取り出される。この相互変調歪
成分は、第3の検波器14により検波され制御部16へ
入力される。制御部16では、この相互変調歪レべルを
監視し、相互変調歪レべルの状態に応じて増幅器のバイ
アス設定を行う。
Generally, in the amplifier, the phase of the RF signal is rotated and a time delay is caused. Therefore, in order to match the phase and delay time of the two inputs of the combiner 13, correction is performed by the delay line 8. The difference signal between these two input signals is extracted in the combiner 13. This difference signal is
It is a distortion signal generated in the amplification process in the high frequency linear amplification unit 3. From the output from the combiner 13, only the intermodulation distortion component shown in FIG. 6 is extracted. The intermodulation distortion component is detected by the third detector 14 and input to the controller 16. The control unit 16 monitors the intermodulation distortion level and sets the bias of the amplifier according to the state of the intermodulation distortion level.

【0021】バイアスの設定は、次の特性を利用する。
図7は所定のGaAs−FETの入出力特性を示してい
る。一般的にトランジスタやFETは、デバイスに流す
電流の違いにより図7のような入出力特性を持ってい
る。図中の記号a、bは入出力特性を、記号c、dは相
互変調歪特性を、また記号e、fはインターセプト・ポ
イントをそれぞれ示している。さらに、記号a、c、e
はドレイン電流5Aの場合を示し、b、d、fはドレイ
ン電流3Aの場合を示している。これよりドレイン電流
を変化させても入出力の利得は変わらないが、ドレイン
電流を増すほど飽和レべルや相互変調歪が良くなってい
ることが分かる。
The following characteristics are used to set the bias.
FIG. 7 shows the input / output characteristics of a given GaAs-FET. Generally, transistors and FETs have the input / output characteristics as shown in FIG. 7 depending on the difference in the current flowing through the device. In the figure, symbols a and b indicate input / output characteristics, symbols c and d indicate intermodulation distortion characteristics, and symbols e and f indicate intercept points. Furthermore, the symbols a, c, e
Indicates the case of drain current 5A, and b, d, f indicate the case of drain current 3A. From this, it is understood that the input / output gain does not change even if the drain current is changed, but the saturation level and the intermodulation distortion are improved as the drain current is increased.

【0022】例としてキャリアを増減させた場合にどの
ように相互変調歪が発生するかを示したものが図8〜図
10である。例えば、図8はドレイン電流が3Aで2キ
ャリアのスペクトラムをもっている場合、図9は4キャ
リアに増やした場合をそれぞれ示しており、図9のよう
に相互変調歪が悪化する。そこでドレイン電流を5Aに
増やし飽和電力を上げると、図10のように相互変調歪
特性がよくなる。
As an example, FIGS. 8 to 10 show how intermodulation distortion occurs when the number of carriers is increased or decreased. For example, FIG. 8 shows a case where the drain current has a spectrum of 2 carriers at 3 A, and FIG. 9 shows a case where the carrier current is increased to 4 carriers. As shown in FIG. 9, the intermodulation distortion deteriorates. Therefore, when the drain current is increased to 5 A and the saturation power is increased, the intermodulation distortion characteristic is improved as shown in FIG.

【0023】この特性を利用し、歪が多い場合には、バ
イアス回路部9を制御し、電流を多く流すようにする。
また、歪が少ない場合には逆に電流を減らすようにする
制御を行う。
By utilizing this characteristic, when there is a large amount of distortion, the bias circuit section 9 is controlled so that a large amount of current flows.
Further, when the distortion is small, control is performed to reduce the current.

【0024】以上説明したように、本実施例による高周
波直線増幅回路の消費電力制御回路では、出力レべルだ
けをみてトランジスタやFETに流れる電流を制御する
のではなく、実際の相互変調歪量をみて制御するので、
出力レべルに依存しない相互変調歪量の変動に対応がで
きる。これを共通増幅装置において利用した場合、キャ
リア数が少ない時や、出力電力が低い場合に消費電流を
抑えることが出来る。よって、装置および設置スペース
の小型化、無停電装置の容量低減化、装置の長寿命化、
低発電熱量化などの利点をもつ。
As described above, in the power consumption control circuit of the high frequency linear amplification circuit according to the present embodiment, the current flowing through the transistor or FET is not controlled only by looking at the output level, but the actual intermodulation distortion amount is used. To control,
It is possible to cope with fluctuations in the intermodulation distortion amount that do not depend on the output level. When this is used in the common amplifier, the current consumption can be suppressed when the number of carriers is small or when the output power is low. Therefore, downsizing of equipment and installation space, reduction of capacity of uninterruptible equipment, extension of life of equipment,
It has advantages such as low heat generation.

【0025】尚、上述の実施例は本発明の好適な実施の
一例ではあるが本発明はこれに限定されるものではな
く、本発明の要旨を逸脱しない範囲において種々変形実
施可能である。
Although the above-mentioned embodiment is a preferred embodiment of the present invention, the present invention is not limited to this, and various modifications can be made without departing from the gist of the present invention.

【0026】[0026]

【発明の効果】以上の説明より明かなように、本発明の
高周波直線増幅器の消費電力制御回路は、高周波直線増
幅によって発生する相互変調歪のレべルを検出し、相互
変調歪のレべルに応じて高周波直線増幅におけるバイア
スを調節し、高周波直線増幅手段に流れる電流値を制御
する。よって、高周波直線増幅のバイアス量が最適に維
持され、無効消費電力の発生が少なくなり、高周波直線
増幅器の消費電力が最適に制御される。消費電力の管理
・抑制により、温度検出手段を設けることなく増幅器の
温度上昇の二次的な監視も可能となる。
As is apparent from the above description, the power consumption control circuit of the high frequency linear amplifier of the present invention detects the level of the intermodulation distortion generated by the high frequency linear amplification and detects the level of the intermodulation distortion. The bias in the high-frequency linear amplification is adjusted according to the frequency, and the current value flowing through the high-frequency linear amplification means is controlled. Therefore, the bias amount of the high frequency linear amplification is optimally maintained, the amount of reactive power consumption is reduced, and the power consumption of the high frequency linear amplifier is optimally controlled. By controlling / suppressing the power consumption, it becomes possible to perform secondary monitoring of the temperature rise of the amplifier without providing a temperature detecting means.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の高周波直線増幅器の消費電力制御回路
の実施例を示すブロック構成図である。
FIG. 1 is a block diagram showing an embodiment of a power consumption control circuit of a high frequency linear amplifier according to the present invention.

【図2】図1のディレーライン8を通った後のRFキャ
リアを示すベクトル図である。
FIG. 2 is a vector diagram showing an RF carrier after passing through a delay line 8 in FIG.

【図3】図1の分配器10を通った後のRFキャリアを
示すベクトル図である。
3 is a vector diagram showing the RF carrier after passing through the distributor 10 of FIG. 1. FIG.

【図4】図1のアッテネータ11を通った後のRFキャ
リアを示すベクトル図である。
4 is a vector diagram showing the RF carrier after passing through the attenuator 11 of FIG. 1. FIG.

【図5】図1の位相器12を通った後のRFキャリアを
示すベクトル図である。
5 is a vector diagram showing the RF carrier after passing through the phase shifter 12 of FIG. 1. FIG.

【図6】図1の合成器13を通った後のRFキャリアを
示すベクトル図である。
6 is a vector diagram showing the RF carrier after passing through the combiner 13 of FIG. 1. FIG.

【図7】所定のGaAs−FETの入出力特性を表した
図である。
FIG. 7 is a diagram showing input / output characteristics of a predetermined GaAs-FET.

【図8】所定のGaAs−FETの相互変調歪特性(2
キャリアでドレイン電流3Aの時)を表した図である。
FIG. 8: Intermodulation distortion characteristics of a given GaAs-FET (2
It is a figure showing the case of drain current 3A with a carrier.

【図9】所定のGaAs−FETの相互変調歪特性(4
キャリアでドレイン電流3Aの時)を表した図である。
FIG. 9: Intermodulation distortion characteristics (4 of a given GaAs-FET)
It is a figure showing the case of drain current 3A with a carrier.

【図10】所定のGaAs−FETの相互変調歪特性
(4キャリアでドレイン電流5Aの時)を表した図であ
る。
FIG. 10 is a diagram showing the intermodulation distortion characteristics of a predetermined GaAs-FET (when the carrier current is 4 A and the drain current is 5 A).

【図11】従来の高周波直線増幅器の消費電力制御回路
の構成例を示すブロック図である。
FIG. 11 is a block diagram showing a configuration example of a power consumption control circuit of a conventional high frequency linear amplifier.

【符号の説明】[Explanation of symbols]

1 RF入力端子 2 カプラ 3 高周波直線増幅部 4 カプラ 5 RF出力端子 6 検波器 7 分配器 8 ディレーライン 9 バイアス回路部 10 分配器 11 アッテネータ 12 位相器 13 合成器 14、15 検波器 16 制御郡 1 RF input terminal 2 Coupler 3 High frequency linear amplification section 4 Coupler 5 RF output terminal 6 Detector 7 Distributor 8 Delay line 9 Bias circuit section 10 Distributor 11 Attenuator 12 Phaser 13 Combiner 14, 15 Detector 16 Control group

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 高周波直線増幅手段と、 該高周波直線増幅手段によって発生する相互変調歪のレ
べルを検出する相互変調歪検出手段と、 前記相互変調歪のレべルに応じて前記高周波直線増幅手
段のバイアスを調節し、該高周波直線増幅手段に流れる
電流値を制御するバイアス制御手段とを有することを特
徴とする高周波直線増幅器の消費電力制御回路。
1. A high-frequency linear amplification means, an intermodulation distortion detection means for detecting a level of intermodulation distortion generated by the high-frequency linear amplification means, and the high-frequency straight line according to the level of the intermodulation distortion. A power consumption control circuit for a high-frequency linear amplifier, comprising: a bias control unit that adjusts a bias of the amplification unit and controls a current value flowing in the high-frequency linear amplification unit.
【請求項2】 前記相互変調歪検出手段は、前記高周波
直線増幅手段の入出力信号の差分信号を抽出する合成手
段を有し、該抽出された差分信号の大きさに基づき前記
バイアス制御手段を制御することを特徴とする請求項1
記載の高周波直線増幅器の消費電力制御回路。
2. The intermodulation distortion detecting means has a synthesizing means for extracting a differential signal between input and output signals of the high frequency linear amplifying means, and the bias control means is controlled based on the magnitude of the extracted differential signal. It controls, It is characterized by the above-mentioned.
A power consumption control circuit for the high-frequency linear amplifier described.
【請求項3】 高周波直線増幅手段と、 該高周波直線増幅手段の入力信号および出力信号の差分
信号を抽出する差分信号抽出手段と、 該差分信号に基づく制御信号を出力する制御手段と、 前記高周波直線増幅手段のバイアスを調節し、前記高周
波直線増幅手段に流れる電流値を制御するバイアス制御
手段とを有し、 前記制御手段が出力する制御信号に基づき前記バイアス
制御手段が前記高周波直線増幅手段の動作を制御するこ
とを特徴とする高周波直線増幅器の消費電力制御回路。
3. A high frequency linear amplification means, a differential signal extraction means for extracting a differential signal between an input signal and an output signal of the high frequency linear amplification means, a control means for outputting a control signal based on the differential signal, and the high frequency. A bias control means for adjusting the bias of the linear amplification means and controlling the value of the current flowing through the high frequency linear amplification means, wherein the bias control means controls the high frequency linear amplification means based on a control signal output from the control means. A power consumption control circuit for a high-frequency linear amplifier characterized by controlling operation.
【請求項4】 前記差分信号抽出手段は、信号を分配す
る分配手段を2個と信号の遅延を行うディレ−ラインと
信号を合成する合成手段とを有し、前記入力信号および
出力信号を前記2個の分配手段でそれぞれ分配し、該分
配された入力信号を前記ディレ−ラインで遅延させ、該
遅延された入力信号と前記分配された出力信号との間の
前記差分信号を前記合成手段が検出することを特徴とす
る請求項3記載の高周波直線増幅器の消費電力制御回
路。
4. The differential signal extracting means has two distributing means for distributing signals, a delay line for delaying the signals, and a combining means for combining the signals, and the input signal and the output signal are The two distributing means respectively distribute, the distributed input signal is delayed by the delay line, and the combining means calculates the difference signal between the delayed input signal and the distributed output signal. The power consumption control circuit for a high frequency linear amplifier according to claim 3, wherein the power consumption control circuit detects the power consumption.
JP5692895A 1995-03-16 1995-03-16 Power consumption control circuit for high-frequency linear amplifier Pending JPH08256018A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5692895A JPH08256018A (en) 1995-03-16 1995-03-16 Power consumption control circuit for high-frequency linear amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5692895A JPH08256018A (en) 1995-03-16 1995-03-16 Power consumption control circuit for high-frequency linear amplifier

Publications (1)

Publication Number Publication Date
JPH08256018A true JPH08256018A (en) 1996-10-01

Family

ID=13041175

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5692895A Pending JPH08256018A (en) 1995-03-16 1995-03-16 Power consumption control circuit for high-frequency linear amplifier

Country Status (1)

Country Link
JP (1) JPH08256018A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001223541A (en) * 2000-02-09 2001-08-17 Nec Corp Feed forward amplifier

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5669907A (en) * 1979-11-12 1981-06-11 Nec Corp Linear amplifier
JPS5737909A (en) * 1980-08-18 1982-03-02 Kokusai Denshin Denwa Co Ltd <Kdd> Wide band electric power amplifier
JPS6158304A (en) * 1984-08-17 1986-03-25 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Method of operating bipolar transistor radio wave frequency power amplifier and amplifier
JPH03114307A (en) * 1989-09-28 1991-05-15 Fujitsu Ltd Method of setting bias circuit constant for microwave transistor
JPH04262608A (en) * 1990-08-30 1992-09-18 Hughes Aircraft Co Solid-state power amplifier provided with dynamic adjustment of operating point

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5669907A (en) * 1979-11-12 1981-06-11 Nec Corp Linear amplifier
JPS5737909A (en) * 1980-08-18 1982-03-02 Kokusai Denshin Denwa Co Ltd <Kdd> Wide band electric power amplifier
JPS6158304A (en) * 1984-08-17 1986-03-25 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Method of operating bipolar transistor radio wave frequency power amplifier and amplifier
JPH03114307A (en) * 1989-09-28 1991-05-15 Fujitsu Ltd Method of setting bias circuit constant for microwave transistor
JPH04262608A (en) * 1990-08-30 1992-09-18 Hughes Aircraft Co Solid-state power amplifier provided with dynamic adjustment of operating point

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001223541A (en) * 2000-02-09 2001-08-17 Nec Corp Feed forward amplifier

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