JPH08250586A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE: To enhance the density and to assure the long term reliability by electrically connecting an impurity diffused region to a metal film via a semi- insulating thin film containing a large quantity of recombination centers. CONSTITUTION: The semiconductor device comprises predetermined conductivity type impurity diffused regions 3, 4 formed on the main surface of a semiconductor substrate 1, and an insulating film 7 formed on the main surface of the substrate 1 including the regions 3, 4. Further, the device comprises a semi- insulating thin film 10 formed on the surfaces of the regions 3, 4 exposed via a contact hole 10 opened partly at the film 7 on the regions 3, 4 and containing a large quantity of recombination centers, and a metal film 11 electrically connected to the regions 3, 4 via the film 10. For example, the film 10 including a large quantity of the recombination centers of an extremely thin film of about several nm on the inner surface of a contact groove 9 by generating a high-frequency plasma in an atmosphere containing oxygen.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a structure in which a diffusion region on a main surface of a semiconductor substrate is finely contacted and a method for manufacturing the same.

[0002]

2. Description of the Related Art As a conventional semiconductor device, for example, FIG.
There is a vertical power MOSFET as shown in FIG.
-119184). This figure shows a cross-sectional structure of the cell portion, and an N-type epitaxial layer 32 serving as a drain region is formed on the upper surface of the N-type high-concentration semiconductor substrate 31. A P-type base region 33 is formed on the main surface of the N-type epitaxial layer 32, and the N-type high-concentration source region 3 is formed therein.
4 are formed. On the P-type base region 33 between the N-type epitaxial layer 32 and the source region 34,
A gate electrode 36 for inducing a channel is formed on the surface of the P-type base region 33 via a gate oxide film 35. Reference numeral 37 is an insulating film, and a contact groove 39 that penetrates the source region 34 and reaches the P-type base region 33 is formed using the spacer insulating film 38 formed on the gate sidewall as a mask. A source electrode 40 electrically connected to the source region 34 and the P-type base region 33 is formed by the contact groove 39. A drain electrode (not shown) is formed on the back surface of the N-type high-concentration semiconductor substrate 31.

[0003]

However, such a conventional semiconductor device has the following problems. That is, in a device having such a configuration
The impurity concentration of the mold base region is in the order of 10 ¹⁷ cm ⁻³ ,
It is difficult to obtain a normal ohmic contact with silicon at an impurity concentration of this level in an aluminum electrode or the like which is usually used as a source electrode, which causes a problem of poor electrical contact between the source electrode and the P-type base region. Therefore, in order to prevent this problem from occurring, in this conventional example, it is necessary to increase the size of the contact groove in order to ensure the contact with the P-type base region.
This is a major obstacle to increasing the density of the device. In order to solve such a problem, it can be considered to form a P-type high concentration diffusion region at the bottom of the contact groove. However, in order to form the P-type high-concentration diffusion region after forming the contact groove, a high-precision impurity diffusion region forming technique that does not introduce impurities into the side surface of the source region is necessary. The realized semiconductor device has a problem that the cost increases. Further, as the method, for example, considering forming this impurity diffusion region by an ion implantation method in which the implantation direction is strictly controlled,
A heat treatment of up to 1000 ° C. is required to activate the implanted impurities, which makes it difficult to design and manufacture each diffusion region including the P-type base region and the source region. Even if each diffusion region as described above can be realized, the device size becomes large due to the diffusion phenomenon. Further, since the semiconductor region and the metal are in direct contact with each other, solid phase epitaxial growth occurs at the interface, which causes a reliability problem that the contact resistance increases in long-term use of the device.

The present invention has been made in view of such conventional problems, and it is an object of the present invention to provide a semiconductor device capable of achieving high density and ensuring long-term reliability, and a manufacturing method thereof. To aim.

[0005]

In order to solve the above-mentioned problems, the invention according to claim 1 includes an impurity diffusion region of a predetermined conductivity type formed on the main surface of a semiconductor substrate, and an impurity diffusion region above the impurity diffusion region. A large number of recombination centers are formed on the surface of the impurity diffusion region exposed by the insulating film formed on the main surface of the semiconductor substrate and the contact hole formed in a part of the insulating film on the impurity diffusion region. And a metal film electrically connected to the impurity diffusion region via the semi-insulating thin film.

According to a second aspect of the present invention, the second conductivity type first impurity diffusion region is formed on the main surface of the first conductivity type semiconductor substrate, and the first conductivity type is formed in the first impurity diffusion region. Type second impurity diffusion region, an insulating film formed on the main surface of the semiconductor substrate including the first and second impurity diffusion regions, and penetrating the insulating film and the second impurity diffusion region. A semi-insulating thin film formed on the inner surface of the groove region formed to a depth reaching the first impurity diffusion region and containing a large amount of recombination centers, and the first and second semi-insulating thin films via the semi-insulating thin film. It is a gist to have a metal film electrically connected to the impurity diffusion region.

The invention according to claim 3 is the semiconductor device according to claim 1 or 2, wherein the semi-insulating thin film is a semi-insulating silicon oxide film.

According to a fourth aspect of the present invention, in the semiconductor device according to the first or second aspect, the semi-insulating thin film is a semi-insulating silicon nitride film.

According to a fifth aspect of the invention, a step of forming an impurity diffusion region of a predetermined conductivity type on the main surface of the semiconductor substrate, and a step of forming an insulating film on the main surface of the semiconductor substrate including the impurity diffusion region. , A step of forming a contact hole by digging up to the impurity diffusion region if necessary in a part of the insulating film on the impurity diffusion region, and recombining with the surface of the impurity diffusion region exposed by the contact hole. The gist is to have a step of forming a semi-insulating thin film containing a large amount of the center and a step of forming a metal film electrically connected to the impurity diffusion region through the semi-insulating thin film.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fifth aspect, the formation of the semi-insulating thin film is performed by exciting the atmosphere in an atmosphere containing at least oxygen or nitrogen. The summary is that it is a method of doing.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the excitation method is plasma processing.

The invention according to claim 8 is the method for manufacturing a semiconductor device according to claim 6, wherein the excitation method is UV.
The main point is that it is light processing.

[0013]

In the semiconductor device according to claim 1, the barrier formed on the surface of the impurity diffusion region by conduction through the recombination center in the semi-insulating thin film becomes small, and ohmic conduction between the metal film and the impurity diffusion region is possible. Becomes As a result, it is not necessary to increase the area of the contact hole for good contact, and since there is no direct contact between the semiconductor region and the metal film, solid phase epitaxial growth does not occur in the contact hole and long-term reliability is improved. Reserved.

According to a second aspect of the present invention, the impurity diffusion region is a second conductivity type first impurity diffusion region and a first conductivity type second impurity diffusion region formed in the first impurity diffusion region. The groove region is formed to a depth that penetrates the second impurity diffusion region and reaches the first impurity diffusion region, and the metal film is provided with the first and second impurities through the semi-insulating thin film containing a large amount of recombination centers. By connecting to the diffusion region, for example, in a vertical MOSFET, a structure in which a good ohmic contact between the metal film and the low-concentration second conductivity type base region is achieved in a groove region having a small area is realized.

In the semiconductor device according to claim 3, the semi-insulating thin film is realized by silicon oxide, which is often used as a material of the semiconductor device.

In the semiconductor device according to the fourth aspect, the semi-insulating thin film is also realized by silicon nitride.

In the method of manufacturing a semiconductor device according to the present invention, a step of forming a contact hole by digging a part of the insulating film on the impurity diffusion region, if necessary, to the impurity diffusion region, and exposing by the contact hole. Each step including the step of forming a semi-insulating thin film containing a large amount of recombination centers on the surface of the impurity diffusion region, and the step of forming a metal film electrically connected to the impurity diffusion region through the semi-insulating thin film. A semiconductor device in which a good ohmic contact between the metal film and the impurity diffusion region is obtained with a contact hole having a small area is manufactured.

In the method for manufacturing a semiconductor device according to claim 6, the semi-insulating thin film containing a large amount of recombination centers is processed by exciting the atmosphere in an atmosphere containing at least either oxygen or nitrogen. Is formed by.

In the method of manufacturing a semiconductor device according to claim 7, the excitation method is realized by plasma excitation.

In the method of manufacturing a semiconductor device according to claim 8, the excitation method described above is also realized by UV light excitation.

[0021]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 are views showing a first embodiment.
This embodiment is applied to a vertical power MOSFET.
First, the configuration of this embodiment will be described with reference to FIG. An N-type epitaxial layer 2 to be a drain region is formed on the upper surface of the N-type high concentration substrate 1. N type epitaxial layer 2
A P-type base region 3 is formed on the main surface of the
A source region 4 having a high impurity concentration is formed. A gate electrode 6 is formed on the P-type base region 3 between the N-type epitaxial layer 2 and the source region 4 via a gate oxide film 5. Reference numeral 7 is an insulating film made of an oxide film, and a contact groove 9 is formed as a contact hole that penetrates the source region 4 and reaches the P-type base region 3 by using the spacer insulating film 8 formed on the gate sidewall as a mask. ing. Then, the oxygen plasma damaged oxide film 1 as a semi-insulating thin film having a large amount of recombination centers on the surfaces of the P-type base region 3 and the source region 4 exposed in the contact groove 9.
0 is formed. A source electrode 11 electrically connected to the source region 4 and the P-type base region 3 via the oxygen plasma damaged oxide film 10 is formed on the insulating film 7.

The manufacturing method of this embodiment will be described with reference to FIG.

(A) The N type epitaxial layer 2 is formed on the N type high concentration substrate 1 by an epitaxial film forming method. A gate oxide film 5 is formed by a thermal oxidation method or the like, and a gate electrode 6 is formed on the upper surface of the gate oxide film 5 by, for example, a low pressure vapor phase growth method of a polycrystalline silicon film and photoetching. After the gate electrode 6 is insulation-coated with an insulating film 7 formed by a thermal oxidation method, a spacer insulating film 8 is formed on the gate sidewall by, for example, forming a silicon oxide film by a vapor phase growth method and etching back. Using the insulating film 7 on the upper surface of the gate and the spacer insulating film 8 as a mask, a contact groove 9 is formed to a depth reaching the P-type base region 3 by a method such as anisotropic plasma etching of silicon.

(B) A semi-insulating silicon oxide film containing a large amount of very thin recombination centers of about several nm on the inner surface of the contact groove 9 by generating, for example, high frequency plasma in an atmosphere containing oxygen ( Here, an oxygen plasma damage oxide film 10) is formed.

(C) The source electrode 11 is formed by sputtering aluminum, for example.

Next, the operation of the semiconductor device configured as described above will be described. Generally, when a low-concentration P-type semiconductor is brought into contact with a metal, a Schottky barrier is formed as shown in FIG. 3B, and ohmic contact does not occur. On the other hand, it has been considered that, in contacting a metal semiconductor, forming an insulating thin film such as silicon oxide on the interface of the metal semiconductor increases the contact resistance. However, as a result of experiments, it was found that the ohmic property is greatly improved by making the insulating film a semi-insulating thin film containing a large amount of recombination centers in the film as in the case of forming by oxygen plasma. The mechanism is as shown in FIG.
When a semi-insulating silicon oxide film containing a large amount of recombination centers is formed on the semiconductor surface, conduction through the levels (recombination centers) in the silicon oxide film becomes possible, so that the barrier formed on the P-type silicon surface becomes It becomes small, and ohmic conduction between the metal and the P-type semiconductor becomes possible. As a result, P
It is not necessary to increase the area of the contact groove 9 in order to obtain a good ohmic contact between the mold base region 3 and the source electrode 11, so that the device can be highly integrated. Further, since there is no direct contact between the semiconductor region and the metal, solid phase epitaxial growth does not occur in the contact groove 9, which is advantageous in terms of long-term reliability.

FIG. 4 shows a second embodiment. This embodiment is applied to a vertical MOSFET having a U-groove gate structure. Explaining the structure, a gate electrode 12 having a U-groove structure is formed by hollowing out a part of the source region 4, and a gate oxide film 13 is formed between the gate electrode 12 and the P-type base region 3. A cap oxide film 14 for capping is formed on the gate electrode 12. Then, the region sandwiched by the cap oxide film 14 penetrates the source region 4 and is dug up to reach the P-type base region 3 to form the contact groove 9. An oxygen plasma damaged oxide film 10 as a semi-insulating thin film having a large amount of recombination centers is formed on the inner surface of the contact groove 9.
A source electrode 11 electrically connected to the source region 4 and the P-type base region 3 is formed on the upper surface thereof.

This embodiment also has the same operation and effect as the first embodiment. Since the present embodiment has a UMOS structure as compared with the DMOS structure of the first embodiment, further miniaturization and higher density of the device can be achieved.

FIG. 5 shows a third embodiment. This embodiment is applied to an ordinary MOS semiconductor device.
Explaining the configuration, a high-concentration N-type drain region 16 and a source region 17 are formed on the main surface of the P-type substrate 15, and a gate oxide film 18 is formed on the P-type substrate 15 between the drain region 16 and the source region 17. The gate electrode 19 is formed via the. A contact hole 21 is formed by opening a part of the insulating film 20 formed on the gate electrode 19 and the like, and the oxygen plasma damage oxide film 22 is formed as a semi-insulating thin film on the exposed surface of the drain region 16 and the source region 17. Are formed. Formed on the insulating film 20 are a source electrode 23 and a drain electrode 24 which are electrically connected to the source region 17 and the drain region 16 via the oxygen plasma damaged oxide film 22.

This embodiment also has the same operation and effect as those of the first embodiment.

It is needless to say that the bipolar semiconductor device can have the same structure as the above in the metal semiconductor contact portion. Further, in the above description, a method using high-frequency plasma has been described as a method for producing a semi-insulating silicon oxide film containing a large amount of recombination centers. However, a thin film having the same action and effect has a UV light in an atmosphere containing oxygen. There are a semi-insulating silicon oxide film formed by treatment and a silicon nitride film formed by plasma excitation or UV light excitation. Even if these semi-insulating thin films are used, the same action and effect as described above can be obtained.

[0032]

As described above, according to the semiconductor device of the first aspect, the metal film and the impurity diffusion region are in ohmic contact with each other, so that it is not necessary to increase the area of the contact hole and the density is increased. be able to. Further, since there is no direct contact between the semiconductor region and the metal film, solid phase epitaxial growth does not occur in the contact hole, and long-term reliability can be secured.

According to the semiconductor device of the second aspect, for example, in a vertical MOSFET, a good ohmic contact can be made between the metal film and the low-concentration second conductivity type base region in the groove region having a small area. Higher density can be realized. In addition, high reliability can be ensured in the same manner as described above.

According to the semiconductor device of the third and fourth aspects, electrical connection between the impurity diffusion region and the metal film can be easily realized through the semi-insulating thin film containing a large amount of recombination centers. it can.

According to the semiconductor device manufacturing method of the fifth aspect, it is possible to manufacture a semiconductor device which can realize high density and secure long-term reliability.

According to the semiconductor device manufacturing method of the sixth aspect, a semi-insulating thin film containing a large amount of recombination centers can be formed easily and reliably.

According to the semiconductor device manufacturing method of the seventh and eighth aspects, the excitation process can be easily performed.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing a first embodiment of a semiconductor device according to the present invention.

FIG. 2 is a diagram showing a manufacturing process of the first embodiment.

FIG. 3 is a diagram for explaining the operation of the first embodiment.

FIG. 4 is a vertical sectional view showing a second embodiment of the present invention.

FIG. 5 is a vertical cross-sectional view showing a third embodiment of the present invention.

FIG. 6 is a vertical cross-sectional view of a conventional semiconductor device.

[Explanation of symbols]

1 N-type substrate 2 N-type epitaxial layer 3 P-type base region (impurity diffusion region) 4,17 Source region (impurity diffusion region) 7,20 Insulating film 9,21 Contact groove (contact hole) 10,22 Oxygen plasma damage oxidation Film (semi-insulating thin film) 16 Drain region (impurity diffusion region) 11,23 Source electrode (metal film) 24 Drain electrode (metal film)

Claims (8)

[Claims] 1. An impurity diffusion region of a predetermined conductivity type formed on a main surface of a semiconductor substrate, an insulating film formed on the main surface of the semiconductor substrate including the impurity diffusion region, and the impurity diffusion region on the impurity diffusion region. A semi-insulating thin film formed on the surface of the impurity diffusion region exposed by a contact hole formed in a part of the insulating film and containing a large number of recombination centers, and an electrical connection with the impurity diffusion region via the semi-insulating thin film. And a metal film electrically connected to each other. 2. A second conductivity type first impurity diffusion region formed on the main surface of the first conductivity type semiconductor substrate, and a first conductivity type second impurity diffusion region formed in the first impurity diffusion region. Region, an insulating film formed on the main surface of the semiconductor substrate including the first and second impurity diffusion regions, and the first impurity diffusion region penetrating the insulating film and the second impurity diffusion region. A semi-insulating thin film which is formed on the inner surface of the groove region formed to a depth reaching the depth and which contains a large amount of recombination centers, and the first and second impurity diffusion regions electrically connected through the semi-insulating thin film. And a metal film connected to the semiconductor device. 3. The semiconductor device according to claim 1, wherein the semi-insulating thin film is a semi-insulating silicon oxide film. 4. The semiconductor device according to claim 1, wherein the semi-insulating thin film is a semi-insulating silicon nitride film. 5. A step of forming an impurity diffusion region of a predetermined conductivity type on a main surface of a semiconductor substrate, a step of forming an insulating film on the main surface of the semiconductor substrate including on the impurity diffusion region, and on the impurity diffusion region. If a part of the insulating film is required, a step of digging up to the impurity diffusion region to open a contact hole, and a step of including a large amount of recombination centers on the surface of the impurity diffusion region exposed by the contact hole. A method of manufacturing a semiconductor device, comprising: forming an insulating thin film; and forming a metal film electrically connected to the impurity diffusion region via the semi-insulating thin film. 6. The semiconductor device according to claim 5, wherein the semi-insulating thin film is formed by a method of exciting and treating the atmosphere in an atmosphere containing at least oxygen or nitrogen. Production method. 7. The method of manufacturing a semiconductor device according to claim 6, wherein the excitation method is plasma processing. 8. The method of manufacturing a semiconductor device according to claim 6, wherein the excitation method is UV light treatment.