JPH08249237A - Erroneous write prevention system for data - Google Patents

Abstract

PURPOSE: To provide an erroneous write prevention system for preventing data from being written in an erroneous area inside a memory. CONSTITUTION: This system is provided with a main memory medium 2 capable of storing the plural data of pages which are the minimum write units of the data, write inhibition flags provided corresponding to the respective pages of the main memory medium 2 and provided with set/reset states whose reset state indicates write inhibition to the respective pages and a write means 1 for performing write to the corresponding page of the main memory medium 2 and turning the writ,e inhibition flag to the set state when the write inhibition flag corresponding to the page is in the reset state and not performing the write to the corresponding page of the main memory medium 2 when the write inhibition flag is in the set state when the instruction for the write to the prescribed page of the main memory medium 2 is given from the outside.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to writing data in a memory, and more particularly to an erroneous writing prevention system for preventing data from being written in an erroneous area in the memory.

[0002]

2. Description of the Related Art In a flash memory, data is written in page units. The size of the page is 256 bytes, for example. In that case, data writing is performed with 256 bytes as the minimum unit.

Data once written may not be rewritten in some cases. For example, you want to keep important data permanently instead of erasing it. In order to protect such data, a means for prohibiting writing to that area is needed thereafter.

In some memory ICs, some of the wiring pins have write protect pins. By sending a write inhibit control signal to the IC through the pin, it is possible to inhibit the write to the IC.

However, in the IC, if the number of pins is unnecessarily increased, a large number of pins are provided in the IC package, so that the IC itself becomes large and the wiring for connecting the pins to the outside becomes complicated. Moreover, if such a pin is provided, data cannot be written to all pages even if there are empty pages in the memory of the IC.
Therefore, it is not possible to write-protect only the page in which data is being stored and not allow the unstored page to be writable.

[0006]

If a pin for write protection is provided on the IC in order to protect the data recorded in the memory, the number of pins will increase. In addition, all pages are write-protected even if there are empty pages in the memory, and write-protection is also performed on unwritten pages that do not need to be protected.

An object of the present invention is to provide an erroneous write prevention system which can easily perform write protection in page units.

[0008]

An erroneous data write prevention system of the present invention corresponds to a main storage medium capable of storing a plurality of pages of data, which is the minimum writing unit of data, and each page of the main storage medium. And a set / reset state, the set state is a write-inhibit flag indicating that the page is write-inhibited, and an external instruction to write to a predetermined page of the main storage medium causes the page to be written to the page. When the corresponding write inhibit flag is in the reset state, the corresponding page of the main storage medium is written to set the write inhibit flag, and when the write inhibit flag is in the set state, the corresponding page of the main storage medium is set. And a writing unit that does not perform writing.

Further, the data erroneous writing prevention system of the present invention is provided corresponding to each page of the main storage medium and a storage medium capable of storing a plurality of pages of data, which is the minimum unit of writing data. A determination storage medium for storing a part of data on each page and a main storage medium are provided corresponding to each page and have a set / reset state, and the set state indicates write prohibition to each page. When the write-inhibit flag is in the reset state when the write-inhibit flag, the write-inhibit means for setting the write-inhibit flag to the set state, and the external instruction to write to a predetermined page of the main storage medium, Writing to a corresponding page of the medium and writing a part of the written data to the determination storage medium corresponding to the page, and writing When the stop flag is in the set state, a writing unit that does not write to the corresponding page of the main storage medium, and when a part of the page is instructed from the outside, the partial write data and the determination storage medium are stored. It is determined whether or not the written data is the same, and when they are the same, a write-protection canceling unit that sets the write-protection flag of the corresponding page to the reset state.

[0010]

When data is written to a predetermined page of the main storage medium, the write inhibit flag of the corresponding page is automatically set to the set state, and thereafter writing to the page of the main storage medium is prohibited.

If writing to a predetermined page of the main storage medium is prohibited, a predetermined part of the data stored in the page is externally instructed to be written to the same page. You can remove the write-protection to.

[0012]

1 is a block diagram showing the construction of an erroneous write prevention system according to an embodiment of the present invention.

The host 6 compares the memory IC 5 with the IC
It is possible to instruct writing or reading of data through the pin. The host 6 is, for example, a personal computer, word processor, game machine, POS, or the like. The memory IC5 is an IC chip including a memory element capable of storing data. However, the memory IC 5 is not limited to an IC chip and can be configured as a memory card.

The memory IC 5 has a control unit 1, a main memory 2, a judgment memory 3 and a register 4. The control unit 1 controls the main memory 2, the judgment memory 3 and the register 4 according to the command sent from the host 6.

The main memory 2 is a flash memory, E
It is a non-volatile memory such as an EPROM and can be written in page units. The size of the page is, for example, 256 bytes or 512 bytes. The page is usually
It is also called a block or sector. The host 6 can write data in and read data from the main memory 2. The main memory 2 is written in page units. In addition, write protection or writability of data is set in page units.

The judgment memory 3 is a non-volatile memory similar to the main memory 2. On the other hand, register 4
It may be non-volatile or volatile. A volatile SRAM or DRAM having a high access speed is preferable. The determination memory 3 is a memory for storing data for determining whether each page of the main memory 2 is write-protected.

FIG. 2 is a diagram showing a memory map of the main memory 2. The main memory 2 has a plurality of pages P0,
The area is divided into P1, P2, .... Each page stores, for example, 256 bytes of page data 10. The first byte 11 is the first 1-byte data in the page data 10, and is the key data used when releasing the page write inhibition. Details will be described later.

FIG. 3 is a diagram showing a memory map of the judgment memory 3. The determination memory 3 stores a head byte 21 and a prohibition flag 22 corresponding to each page P0, P1, P2, ... Of the main memory 2. First byte 21
Is 1 byte (8 bits), and the prohibition flag 22 is
It is 1 bit. The head byte 21 is the same data as the head byte 11 of the main memory 2 of FIG. When the host 6 instructs writing of page data, the main memory 2
The page data is written in, and at the same time, the top data of the page data is written in the determination memory 3.

The prohibition flag is for each page P0, P1, P
2, ... Are flags indicating whether or not the write is prohibited, and at least one bit is sufficient. If the prohibition flag is set = “1”), the corresponding page in the main memory 2 cannot be written. On the other hand, if the prohibition flag is reset (= "0"),
The corresponding page of the main memory 2 can be written. At the initial stage, all the pages of the main memory 2 are in the unwritten state, and the inhibition flags 22 of all the pages are reset.

A data writing method by the host 6 will be described with reference to FIG. The host 6 sends the page address and page data to the memory IC 5 together with a page write command. The control unit 1 of the memory IC 5 performs different processing depending on whether the inhibition flag 22 (FIG. 3) of the page specified by the page address is in the set state or the reset state. When the prohibition flag 22 is in the reset state, it indicates that the corresponding page in the main memory 2 is in the unwritten state, and when the prohibition flag 22 is in the set state, the corresponding page in the main memory 2 has already been written. It indicates that there is a state.

Initially, the prohibition flag 22 is in a reset state. When page writing is instructed from the host 6 to the main memory 2, page writing is performed at the designated page address. At the same time, the top data of the page data is written in the determination memory 3 and the prohibition flag 22
(Fig. 3). When the prohibit flag is set,
After that, the page cannot be written.

As described above, when a page is written in the main memory 2, the page cannot be written thereafter, and the written page data can be protected. The host 6 simply sends a page write command to the memory IC 5, and simultaneously with the page write,
Since the write protection can be set automatically, the host 6 does not need any special operation for separately prohibiting the write.

When it is desired to rewrite a page in which page writing is prohibited, the host 6 needs to once perform a write prohibiting cancel operation. Prohibition flag 2
2 is reset by performing a write-protection release operation. After the prohibition flag 22 is reset, data can be written to the page by performing the above write operation.

Next, a method for canceling the above-mentioned page write inhibition will be described. It is troublesome that the release is easily performed due to erroneous control of the host 6 or erroneous operation by the user. It is desirable to be released only when the release operation is performed with a clear release intention. Therefore, even if the operation is slightly complicated, it is necessary to perform the operation only with a clear intention to cancel.

The host 6 can release the write protection by performing the following operation.

(1) A read command for the first byte of the page to be released is sent to the memory IC5. By sending the read command, the host 6 can receive the first byte 11 of the specified page from the memory IC 5 regardless of the state of the prohibition flag 22. The first byte 11 is data read from the main memory 2.

(2) Since the read head byte itself is written again, a byte write command is issued to the memory IC.
5 The control unit 1 receives the command and determines whether the received command is a page write or a byte write. For page writing, page writing is performed in the main memory 2 in accordance with the prohibition flag 22, as described above. At the time of byte writing, the data is not written in the main memory 2 and is compared with the leading byte 21 stored in the judgment memory 3. The first byte 21 is copied from the judgment memory 3 to the register 4 and compared in the register 4. The head register 21 is the same data as the head byte 11 of the corresponding page of the main memory 2. Therefore, the leading byte 11 read from the main memory 2 by the above operation matches the leading byte 21 of the register 4. When they match, the control unit 1 resets the prohibition flag 22 to release the write prohibition. After that, writing to the page becomes possible. If they don't match,
Since the above operation has not been performed or the operation has been performed by mistake, the prohibition flag 22 is not reset and the state of the prohibition flag 22 is maintained.

Next, a processing procedure of the control unit 1 for performing the above operation will be shown. FIG. 4 is a flowchart showing the processing of the main routine performed by the control unit 1. Step SA1
Then, the command supplied from the host 6 is accepted.
In step SA2, the type of the received command is determined. If it is a read command, the process proceeds to step SA3 to perform a read process. If it is a write command,
In step SA4, the writing process is performed. Details of the read processing and the write processing will be described later. If the command is any other command, go to Step SA5,
Other processing such as data deletion is performed. When the processing according to the above command is completed, the process returns to step SA1 and the processing according to the command is repeated.

FIG. 5 is a flow chart showing details of the read processing in step SA3 of FIG. Step SB
At 1, it is checked whether the command supplied from the host 6 is a byte read command or a page read command. If the command is a byte read command, the process proceeds to step SB2. If the command is a page read command, the process proceeds to step SB4.

In step SB2, the head byte 11 of the page indicated by the page address supplied from the host 6 together with the command is read from the main memory 2 in accordance with the byte read command.

At step SB3, the read head byte 11 is sent to the host 6 and the process is terminated. Host 6
After that, the write protection of the page can be released by writing the received first byte 11 in bytes.

In step SB4, the page data of the page indicated by the page address supplied from the host 6 together with the command is read from the main memory 2 in accordance with the page read command.

At step SB5, the read page data is sent to the host 6 and the process is terminated. The above read processing is performed when the main memory 2 can perform both page read and byte read.
If the main memory 2 can only read pages, page reading can be performed, and only the first 1 byte of the page data can be taken out and replaced with byte reading.

FIG. 6 is a flow chart showing details of the write processing in step SA4 of FIG. Step SC
At 1, it is checked whether the command supplied from the host 6 is a byte write command or a page write command. If the command is a byte write command, the process proceeds to step SC3. If the command is a page write command, the process proceeds to step SC2. When determining a command, if the command itself is divided into byte writing and page writing, it can be determined by the command. When the commands themselves are the same, if the data following the command is one page (for example, 256 bytes), it is a page write command, and if the data is only one byte, it is a byte write command. A command indicating the end of data is attached to the end of the data.

In step SC2, according to the page write command, a process for writing the page data to the page of the main memory 2 indicated by the page address supplied from the host 6 together with the command is performed, and the process ends.
Details of the page writing process will be described later.

At step SC3, a byte write process is performed in accordance with the byte write command, and the process ends. The byte write process is a process for releasing the write protection without actually writing to the main memory 2. Details will be described later.

FIG. 7 is a flow chart showing details of the page write processing in step SC2 of FIG. In step SD1, the inhibition flag 22 of the page indicated by the page address is read from the determination memory 3.

At step SD2, it is checked whether the read prohibition flag 22 is in the set state or the reset state.
If the prohibition flag 22 is in the reset state, it means that the write prohibition has been released, and the process advances to step SD3 to start the writing process.

At step SD3, the page data supplied together with the command from the host 6 is written in the corresponding page of the main memory 2. In step SD4, the same 1-byte data as the first 1 byte of the page data written in the main memory 2 is used as the determination memory 3 for the corresponding page.
To the first byte 21.

At step SD5, the inhibition flag 22 of the corresponding page in the determination memory 3 is set, and the process is terminated. By setting the prohibition flag 22, writing to that page is prohibited thereafter. As mentioned above,
The prohibition flag 22 is automatically set by writing a page in the main memory 2.

In step SD2, the prohibition flag 22
Is set, it indicates that writing to the page is prohibited, and therefore the process proceeds to step SD6. At step SD6, an error command indicating that the page cannot be written because the writing to the page is prohibited is sent to the host 6, and the processing is ended. The host 6 sends the page write command to the control unit 1.
When an error command is returned after sending to
It can be determined that page writing could not be performed. At this time, if the page write command is sent again after the write-inhibit release operation is performed, writing can be performed.

FIG. 8 is a flow chart showing details of the byte write process in step SC3 of FIG. In step SE1, the top byte 21 of the page indicated by the page address supplied from the host 6 together with the command is copied and stored in the register 4 from the determination memory 3 in accordance with the byte write command.

In step SE2, the head byte 21 stored in the register 4 and the 1-byte write data received from the host 6 together with the command are compared. If the data match, it indicates that an appropriate write-protection canceling operation has been instructed by the host 6, and the process proceeds to step SE3.
In step SE3, the prohibition flag 22 of the corresponding page stored in the determination memory 3 is reset, and the process ends. When the prohibition flag 22 is reset, the write prohibition is released, and the host 6 can thereafter write to the page.

If the data do not match in step SE2, it indicates that an improper write-protection canceling operation has been instructed by the host 6, and the process proceeds to step SE4. At step SE4, an error command indicating that the write protection could not be released is sent to the host 6 and the processing is terminated.

As described above, the host 6 uses the prohibition flag 2
The page writing can be performed in the main memory 2 according to the state of No. 2. When a page is written, the prohibition flag 22 is automatically set, and the page is write-protected. As a result, it is possible to easily inhibit the writing without adding a special IC pin for instructing the writing inhibition, and it is possible to appropriately protect the written data. For example, even if the write address is garbled due to noise or the wrong address is specified due to an operation mistake, it will not be erroneously written in the area that should not be rewritten.

To cancel the write protection, the first byte of the corresponding page of the main memory 2 is read, and the first byte is used as it is for byte writing.
If it is obliged to perform such an operation, the write protection will not be released by an erroneous operation, and the write protection can be released only when the user has the intention to release the write protection.

The user can effectively protect the data in the main memory 2 by performing the release operation only when he / she is aware that the page data already written will be lost. When page writing is performed, if writing to the page is prohibited, data writing is not performed and an error command is returned to the host 6.
The host 6 may perform the release operation only when it is absolutely necessary to write.

When page writing cannot be performed,
It is not necessary to return the error command. Host 6
After performing page writing, the same page is read and the write data and the read data are verified, so that it is possible to know whether or not the writing is normally performed.

Further, in this embodiment, as a means for canceling the write protection, the case where the first byte of the main memory 2 is stored in the judgment memory 3 and the first byte is used for the byte reading and the byte writing has been described. ,
This does not have to be the first byte of the page, but may be the final data or arbitrary data of multiple bytes.

In the present embodiment, even if the above erroneous writing prevention means is provided, the number of writings to the main memory 2 does not increase, so that the life of the main memory 2 which is an EEPROM, for example, is not shortened. The number of readings increases,
Although the number of times of reading does not affect the life of the main memory 2, the present invention has been described with reference to the embodiments, but the present invention is not limited to these. For example, it will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

[0051]

As described above, according to the present invention,
When data is written to a predetermined page of the main storage medium, writing to the page is automatically prohibited, so that writing is simply prohibited without providing a new control signal line,
Data can be protected.

Further, it is possible to cancel the write prohibition to the page by externally instructing to write the predetermined partial data stored in the page to the same page, so that there is a possibility that it will be canceled by an erroneous operation or the like. Is low and can ensure data protection.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an erroneous write prevention system according to an embodiment of the present invention.

FIG. 2 is a diagram showing a memory map of a main memory.

FIG. 3 is a diagram showing a memory map of a determination memory.

FIG. 4 is a flowchart showing processing of a main routine performed by a control unit.

FIG. 5 is a flowchart showing details of a read process in step SA3 of FIG.

FIG. 6 is a flowchart showing details of the write processing in step SA4 of FIG.

FIG. 7 is a flowchart showing details of page write processing in step SC2 of FIG.

8 is a flowchart showing details of the byte write process in step SC3 of FIG.

[Explanation of symbols]

 1 Control Unit 2 Main Memory 2 3 Judgment Memory 4 Register 5 Memory IC 6 Host 10 Page Data 11, 21 First Byte 22 Write Protect Flag

Claims (5)

[Claims] 1. A main storage medium (2) capable of storing a plurality of page data, which is a minimum data write unit.
A write-prohibition flag (22) provided corresponding to each page of the main storage medium, having a set / reset state, and the set state indicating write-protection to each page; When writing to a predetermined page is instructed, if the write prohibition flag corresponding to the page is in the reset state, writing is performed to the corresponding page of the main storage medium to set the write prohibition flag, An erroneous data write prevention system having a writing means (1) that does not write to the corresponding page of the main storage medium when the write prohibition flag is in the set state. 2. A storage medium (2) capable of storing a plurality of page data, which is a minimum data write unit.
And a determination storage medium (3) provided for each page of the main storage medium, for storing a part of the data of each page, and provided for each page of the main storage medium. A write-inhibit flag (22) having a set / reset state, the set-state indicating write-inhibit to each page, and a write-inhibit unit (1) for setting the write-inhibit flag to the set state, When the writing to a predetermined page of the main storage medium is instructed, when the write prohibition flag is in the reset state, the corresponding page of the main storage medium is written and a part of the written data is Write to the determination storage medium corresponding to the page, and when the write-protect flag is set, write to the corresponding page of the main storage medium. When the writing means (1) that does not exist is instructed to write a part of the page from the outside, it is determined whether or not the partially written data and the data stored in the determination storage medium are the same. An erroneous write prevention system for data, which sometimes has a write protect canceling means (1) for setting the write protect flag of a corresponding page to a reset state. 3. The erroneous write of data according to claim 2, wherein the write prohibition unit sets the write prohibition flag of a corresponding page to a set state when the write unit writes to a corresponding page of the storage medium. Prevention system. 4. A method of inhibiting data writing to a storage medium capable of storing a plurality of pages of data, which is the minimum writing unit of data, wherein when a predetermined page of the storage medium is written, A method for inhibiting data writing, including the step of inhibiting writing to a page. 5. A method for canceling the write prohibition of data to a storage medium capable of storing a plurality of page data, which is the minimum write unit of data, which is stored in a page of the storage medium whose write protection is desired to be released. A method for canceling write-protection of data, comprising the step of canceling write-protection to the same page when an instruction to write a part of existing data to the same page is given.