JPH08242102A - Microwave phase shifter - Google Patents

Abstract

PURPOSE: To switch phase shift quantity and to reduce the difference of an insertion loss owing to the difference of phase shift circuits and fluctuation amplitude owing to the change of impedance matching by means of correction in a phase shifter controlling the phase of a microwave signal. CONSTITUTION: The phase shift circuits A, B and C of plural stages, which are provided with FET 9-20 for the both ends of reference circuit 1, 3 and 7 and delay circuits 2, 4 and 6 different in insertion phases, and a phase shift quantity control circuit 28 controlling the gate bias voltage of FET in the respective phase shift circuits are provided. Furthermore, resistances 33 and 34 inserted in parallel between FET of the adjacent phase shift circuits, FET 29 and 30 which can electrically connect and disconnect a space between the resistance and a ground conductor and an amplitude control circuit 32 controlling the gate bias voltage of FET 29 and 30 are provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microwave phase shifter, and more particularly to a microwave phased array antenna.

[0002]

2. Description of the Related Art As shown in FIG. 2, a conventional microwave phase shifter includes a reference circuit 1 and a delay circuit 2 having different insertion phases.
And the FET 9 that constitutes a single-pole multi-throw switch at both ends thereof,
A first phase shifter circuit composed of 10, 11, 12 and a reference circuit 3 and a delay circuit such that the insertion phase difference between the reference circuit and the delay circuit is twice the insertion phase difference between the reference circuit 1 and the delay circuit 2. Four
And FETs 13 that form a single-pole multi-throw switch on both ends,
A second phase shifter circuit composed of 14, 15 and 16, and a reference circuit 5 and a delay circuit such that the insertion phase difference between the reference circuit and the delay circuit is four times the insertion phase difference between the reference circuit 1 and the delay circuit 2. 6
And FET1 that constitutes a single pole multiple throw switch at both ends
A third phase-shifting circuit composed of 7, 18, 19, and 20, and a gate bias voltage Vc1 of the FET of each phase-shifting circuit and a bar Vc1.
And Vc2, Vc2 and Vc2, Vc3 and Vc3 are controlled in accordance with a phase shift amount control signal 27 input from the outside.
And have.

The insertion phase difference (phase shift amount) between the minimum bit reference circuit and the delay circuit is ½ ^N of 360 ° (N is the number of bits)
And each bit is 2 ^i-1 × 360/2 ^N (i = 1,
2, ..., N) are determined so as to have an insertion phase difference, and the combination is made such that the insertion phase of the microwave signal (RF input) is the minimum compared to the case where all the reference circuits are passed. It can be changed by 0 to 36 ° with the bit phase shift amount as a unit.

In the 3-bit configuration as in the example of FIG. 2, the phase shift amount of the reference circuit 1 and the delay circuit 2 is 45 °, the phase shift amount of the reference circuit 3 and the delay circuit 4 is 90 °, and the reference circuit 5 and the delay circuit are delayed. The phase shift amount of the circuit 6 is 180 °.

Now, as the gate bias voltage of the FET,
Vc1 and Vc1 are added to the terminals 21 and 22 so that the FET 9 and the FET 11 become 0 volt and the FET 10 and the FET 12 become -5V. At this time, FET9 and FET11
Becomes an ON state, the resistance value becomes low, and the microwave signal is passed. Also, FET10 and FET12 are OFF
Since the resistance value becomes large and the microwave signal does not pass through, the microwave signal input from the terminal 7 passes through the reference circuit 1 side.

Next, the gate bias voltage of the FET is set to F
ET9 and FET11 become -5V, FET10 and FE
Vc1 and bar Vc1 are added to the terminals 21 and 22 so that T12 becomes 0V. At this time, FET9 and FET11 are O
The FF state, the FET 10 and the FET 12 are turned on, and the microwave signal input from the terminal 7 passes through the delay circuit 2 side.

Therefore, the gate bias voltage Vc1 and the bar V
By switching c1 between 0V and -5V or -5V and 0V, the insertion phase of the microwave signal can be changed by 45 °.

The same applies to the phase shift circuits having the phase shift amounts of 90 ° and 180 °.

In this way, when the phase shift amount control signal corresponding to the required phase shift amount is externally applied to the terminal 27, Vc1, Vc1 and Vc2, Vc2 are controlled so that the required phase shift amount is obtained.
By generating the gate bias voltage of Vc3 and Vc3 and Vc3 in the phase shift amount control circuit 28, the microwave signal input from the terminal 7 is 0 to 360 at the minimum bit shift amount interval.
It can be changed by ° and taken out as an RF output from the terminal 8.

As another conventional example, there is a phase shift circuit shown in FIG. 3 (see Japanese Patent Laid-Open No. 5-291801). This is because the switching FET 47 on the reference circuit side and the delay circuit 4
6, FET35 and FET3 for switching on the delay circuit side
6, and a resistor 37 and a resistor 38 for VSWR improvement added in parallel to the input / output side of the phase shift circuit.

The microwave signal is transmitted to the FET 35 and the FET 3
When the gate bias voltage of 6 is -5V and the gate bias voltage of the FET 47 is 0V, it passes through the FET 47 on the reference circuit side, and when the gate bias voltage of the FETs 35 and 36 is 0V and the gate bias voltage of the FET 34 is -5V, it is delayed. Pass through circuit 46.

Therefore, if the insertion phase of the delay circuit is determined so that the required amount of phase shift is obtained, a phase shifter equivalent to that shown in FIG. 2 can be constructed.

An equivalent circuit of the phase shift circuit of FIG. 3 is shown in FIG.
FET 35 ON resistance 39 and FET 36 ON
The FET is made so that the sum of the resistance values 40 in the state becomes the same as the resistance value 41 in the ON state of the FET 47, and the resistance value 3
The sum of 9 and the resistance value 40 or the resistance value 41 and the resistors 37 and 38 on the input / output side constitute a large attenuator.

[0014]

However, in the conventional phase shifter, the transmission loss of the reference circuit is different from that of the delay circuit, and the VSWRs are also different from each other. Insertion loss is the difference between transmission loss and VSW
There is a problem that the side lobes of the radiation pattern of the array antenna are deteriorated because the side lobes are changed due to the difference in R. Also, by inserting a resistor in parallel with the input / output side of the phase shift circuit, the resistance when the reference circuit side FET is ON and the resistance when the delay circuit side is ON are the same, and a large attenuator is configured to improve VSWR. However, there is a problem in that an error in resistance when the FET is manufactured due to manufacturing variations of the FET and a change in insertion loss caused by a change in VSWR due to a frequency characteristic of VSWR are unavoidable.

Therefore, an object of the present invention is to provide a microwave phase shifter capable of reducing the amplitude fluctuation of the microwave signal generated at the same time as the switching of the phase shift amount.

Another object of the present invention is to provide a microwave phase shifter capable of reducing the error in the excitation distribution of the radiation aperture of the array antenna and reducing the deterioration of the side lobe level of the antenna radiation characteristic.

[0017]

According to one aspect of the present invention, there are N stages of phase shift circuits to which a microwave signal is input, and a phase shift for controlling the insertion phase by the N stages of phase shift circuits. A microwave phase shifter including a quantity control circuit,
A resistor inserted in parallel between adjacent ones of the phase shift circuits of the stages, and a ground switch means for electrically connecting or disconnecting the resistor and the ground conductor. A microwave phase shifter is obtained.

According to another aspect of the present invention, two circuits, that is, a reference circuit and a delay circuit having different insertion phases, and FETs functioning as a single-pole multi-throw switch are provided at both ends thereof, and the gate bias voltage of the FETs is provided. Microwave signal inputted by switching passes through the reference circuit or by switching or passing through the delay circuit, by using a phase shift circuit for changing the insertion phase, the minimum unit of 1/2 ^N of 360 ° age,
An N-stage phase shift circuit that generates a phase shift amount of 2 ^N times is switched by the phase shift amount control circuit according to a phase shift amount control signal input from the outside to switch the gate bias voltage of the FET to In a phase shifter that controls the insertion phase in steps, a resistor inserted in parallel between the single-pole multiple-throw switches of adjacent phase shift circuits and the resistor and ground conductor are electrically connected or disconnected. The FET that acts as a single-pole single-throw switch and the F of the single-pole single-throw switch can be controlled by the amplitude control signal.
A microwave phase shifter having an amplitude control circuit for controlling an ET gate bias voltage to correct an insertion loss is obtained.

[0019]

The present invention will be described below with reference to the drawings.

FIG. 1 is a system diagram of an embodiment of a microwave phase shifter according to the present invention.

This microwave phase shifter comprises a reference circuit 1 which serves as a reference for an insertion phase of a microwave signal (RF input), and a delay of a phase delay of 1/2 ^{3 of} 360, that is, 45 ° relative to the reference circuit 1. Circuit 2, and FET 9, FET 10 and FET 1 that form a single-pole multi-throw switch that switches whether the microwave signal passes through the reference circuit 1 or the delay circuit 2.
1 and a FET 12, a first phase shift circuit A, and a reference circuit 3 and 90 times twice the first phase shift circuit with respect to the reference circuit 3.
° Phase delay delay circuit 4, FET13 and FET14 and FET15 and FET that form a single-pole multi-throw switch
A second phase-shift circuit B composed of 16 and a reference circuit 5, a delay circuit 6 having a 180 ° phase delay which is twice the phase of the second phase-shift circuit with respect to the reference circuit 6, and a single-pole multiple-throw switch. FE
A third phase-shifting circuit C composed of T17 and FET18 and FET19 and FET20, and gate bias voltage Vc1, Vc1, Vc of the FET of the single-pole multi-throw switch of each phase-shifting circuit.
c2, bar Vc2, Vc3, bar Vc3 generated in response to the phase shift amount control signal input from the terminal 27.
And a resistor 23 inserted in parallel between the first phase shift circuit A and the second phase shift circuit B, and a FET 29 of a single-pole single-throw switch that connects or disconnects the resistor 27 with respect to the ground conductor. When,
A resistor 34 inserted in parallel between the second phase shift circuit B and the third phase shift circuit C, and a FET 30 of a single-pole single-throw switch that connects or disconnects the resistor 34 with respect to a ground conductor, Gate bias voltage VR1, V of FET of each single pole single throw switch
R2 is composed of an amplitude control circuit (voltage control circuit) 32 which generates in response to an amplitude control signal input from a terminal 31. FETs 9 to 20 constitute a path switch means,
The FETs 29 and 30 form a ground switch means.

Next, the operation principle will be described.

First, as a phase shift amount control signal to the terminal 27,
When a binary 3-bit signal of 000 representing the reference is input, the phase shift amount control circuit generates a gate bias voltage of Vc1, Vc2, Vc3 = 0V, Vc1, Vc2, Vc3 = -5V, and shifts. It is applied to the terminals 21 to 26 of the phase circuit. At this time, the FETs 9, 11, 13, 15, 17, 19 have a small drain-source resistance (ON), and the FETs 10, 1
2, 14, 16, 18, and 20 have large drain-source resistance (OFF). Therefore, the microwave signal input from the terminal 7 passes through the reference circuits 1, 3, 5 and is output to the terminal 8 as an RF output.

Next, as a phase shift amount control signal to the terminal 27,
When a binary 3-bit signal 001 is input, the phase shift amount control circuit outputs Vc1, Vc2, Vc3 = 0V, Vc1, and V
A gate bias voltage of c2, Vc3 = -5V is generated. At this time, the gate bias voltages of the second phase shift circuit B and the third phase shift circuit C do not change, but in the first phase shift circuit A, the FET 9 and FET 11 of the reference circuit 1 are OFF, and the FET 10 of the delay circuit 2 is OFF. , FET12 is turned on, so terminal 7
The microwave signal input from the signal passes through the delay circuit 2 of the first phase shift circuit A, and the phase can be relatively delayed by 45 ° with reference to the movement amount control signal 000. By sequentially switching the single-pole multi-throw switch of the phase shift circuit, 45 °
The amount of phase shift can be varied from 0 to 360 ° (360 ° is the same as 0 °) in steps.

When the phase shift amount control signal is 000,
When a binary 2-bit 00 is input to the terminal 31 as the amplitude control signal and the gate bias voltage of VR1 and VR2 = 0V is generated from the amplitude control circuit 32, the FE of the single pole single throw switch is generated.
The T29 and the FET 30 are turned on, and the resistors 33 and 34 are grounded.

At this time, the drain-source resistance of the FET 11 and the drain-source resistance of the FET 13 and the resistance 33
A resistor between the drain and source of the FET 15 and the resistor 34 form a T-type attenuator.

FIG. 5 shows an equivalent circuit of the microwave phaser shown in FIG. For example, assuming that the resistance between the drain and the source when the FET is ON is 2Ω and the characteristic impedance of the transmission line is 50Ω, the resistance 27 is selected to be 624Ω and the resistance 4
Since 4 and 45 are 2Ω, and the resistor 42 is 624Ω and are T-type attenuators of about 0.7 dB, the two T-type attenuators can control the amplitude of the microwave signal in units of 0 dB, 0.7 dB, and 1.4 dB.

The T-type attenuator is composed of FET11 and FET.
Even when 14 or FET12 and FET14 or FET12 and FET13 are turned on, it can be configured by turning on FET29, and if FET29 is turned off, the attenuator can be omitted. The same applies to the FET 30.

On the other hand, the insertion loss on the delay circuit side of each phase shift circuit is larger by 0.5 dB than that of the reference circuit, and the insertion loss due to the change of VSWR when switching the phase shift circuit is 0.
Assuming that the phase shift amount changes by 5 dB, when the phase shift amount of the phase shifter is switched to all eight states, the maximum amplitude fluctuation of about 2 dB occurs in the microwave signal.

However, the amplitude can be corrected by switching the T-type attenuator according to the insertion loss of each state simultaneously with the switching of the phase shift amount, and the fluctuation can be reduced within about 0.7 dB.

In the above description, the phase shifter has a 3-bit 3-phase phase shifter, but the same applies to the case of 4 bits or more.

The amount of attenuation per T-type attenuator can be variously selected by changing the resistance between the drain and the source of the FET for a single-pole multiple-throw switch and setting the parallel resistance accordingly.

[0033]

As described above, according to the present invention, the resistance inserted in parallel between the stages of the phase shift circuit and the grounding switch means capable of grounding or cutting off the resistance are provided, and the T-type attenuator in any state. By adding or disconnecting, it is possible to reduce the amplitude fluctuation of the microwave signal generated at the same time as the switching of the phase shift amount to the same level as the unit of the attenuation amount of the T-type attenuator,
The error of the excitation distribution of the radiation aperture of the array antenna is reduced,
This has an effect of reducing the deterioration of the side lobe level of the antenna radiation characteristic.

[Brief description of drawings]

FIG. 1 is a system diagram of a microwave phase shifter according to an embodiment of the present invention.

FIG. 2 is a system diagram showing an example of a conventional microwave phase shifter.

FIG. 3 is a system diagram showing an example of a phase shift circuit of a conventional microwave phase shifter.

FIG. 4 is an equivalent circuit of FIG.

5 is an equivalent circuit of the microwave phase shifter of FIG. 1 of FIG.

[Explanation of reference numerals] 1, 3, 5 Reference circuit 2, 4, 6 Delay circuit 7 Microwave signal input terminal 8 Microwave signal output terminal 9-20 Single pole multiple throw switch FET 21-26 Gate bias voltage terminal 27 Transfer Phase amount control signal input terminal 28 Phase shift amount control circuit 29, 30 Single pole single throw switch FET 31 Amplitude control signal input terminal 32 Amplitude control circuit 33, 34 Resistor 35, 36 Delay circuit side switch FET 37, 38 Resistor 39 ~ 41 FET drain-source resistance 42 Resistance 43 Single pole single throw switch 44, 45 FET drain-source resistance

Claims (6)

[Claims] 1. A microwave phase shifter including an N-stage phase shift circuit to which a microwave signal is input, and a phase shift amount control circuit for controlling an insertion phase by the N-stage phase shift circuit, A resistor inserted in parallel between adjacent ones of the N-stage phase-shift circuits, and a ground switch means for electrically connecting or disconnecting the resistor and the ground conductor. Microwave phase shifter. 2. The ground switch means includes an FET connected between the resistor and a ground conductor, and a voltage control circuit for controlling a gate bias voltage of the FET.
The described microwave phase shifter. 3. Each of the N-stage phase shift circuits is connected to both ends of the reference circuit and the delay circuit having different insertion phases and the reference circuit and the delay circuit, respectively, and switches a passage path of the microwave signal. 36 including a path switch means
The microwave phase shifter according to claim 1 or 2, wherein a minimum unit is 1/2 ^N of 0 °, and a phase shift amount of 2 ^N times is generated. 4. The path switching means is an FET that functions as a single-pole multi-throw switch, and switches whether the microwave signal passes through the reference circuit or the delay circuit. The microwave phase shifter according to claim 1, 2 or 3, wherein the phase amount control circuit switches the gate bias voltage of the FET that functions as the single-pole multiple-throw switch to make the insertion phase stepwise. 5. A micro-input comprising two circuits, a reference circuit and a delay circuit having different insertion phases, and a FET acting as a single-pole multi-throw switch at both ends thereof, and switching the gate bias voltage of the FET. By using a phase shift circuit that changes the insertion phase by switching whether the wave signal passes through the reference circuit or the delay circuit, 360 °
1/2 ^N of ^N is the minimum unit, and ^N produces a phase shift amount of 2 ^N times.
The phase shift circuit controls the gate bias voltage of the FET by the phase shift amount control circuit according to the phase shift amount control signal input from the outside to control the insertion phase of the microwave signal stepwise. Function, a resistor inserted in parallel between the single-pole multiple-throw switches of adjacent phase shift circuits and the function of the single-pole single-throw switch that can electrically connect or disconnect between the resistor and the ground conductor. And a amplitude control circuit for controlling the gate bias voltage of the FET of the single-pole single-throw switch by the amplitude control signal to correct the insertion loss. 6. A phased array antenna using the microwave phase shifter according to claim 1. Description: