JPH08237761A - Data transmitter and data receiver - Google Patents

Abstract

PURPOSE: To simplify an electronic device for communication by providing a charging means storing a clock signal received externally as power for data transmission to the transmitter-receiver. CONSTITUTION: With a switch 24 closed, power is supplied to a power supply circuit 17 from a battery 25, a reset signal is fed to a CPU 14 as a power supply means after a prescribed time T1 to start a CPU 14. The CPU 14 activates a transistor (TR) 18 to start charging of a capacitor 11. The CPU 14 conducts initializing with respect to communication for a time T2 from the start of power supply till the end of charging of the capacitor. After lapse of the time T2 , the CPU 14 turns on/off the TR 18 according to a prescribed frequency based on an oscillation signal from an oscillator 23 to produce a clock signal. The capacitor 11 repeats charging/discharging due to a voltage change in the clock signal, but the fluctuation in the voltage level is not less than the minimum operating voltage of a pump mount controller 4. The capacitor 11 is charged during a communication idle state and the charging/discharging is repeated during communication synchronously with the change in the clock signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission device and a data reception device, and is suitable for a control device for controlling a fuel injection amount, a fuel injection timing and the like in a fuel injection pump for supplying fuel to a diesel engine. It is a thing.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 18, adjusting resistors 63 and 64 have been mounted on a fuel injection pump 50 as means for correcting characteristic variations of a fuel injection pump for a diesel engine. In this method, the voltage drop due to the adjustment resistance value selected by the external control device 65 is captured as an analog voltage and converted into correction data, and the control device 65 outputs a drive signal to the injection amount control actuator 61 of the pump. The injection amount control is performed, and a drive signal is output to the injection timing control actuator 62 to perform the injection timing control.

However, in the method in which only the adjustment resistors 63 and 64 are mounted on the fuel injection pump 50, when the control device 65 takes in the analog data, the adjustment resistors and the number of wirings are required by the number of data (FIG. 18). In the example, there are 2 adjusting resistors and 3 wires including the ground wire. For this reason, if the number of data is increased to make the correction finer, the number of adjustment resistors and wirings will increase, which will not be a realistic configuration. Conversely, if the adjustment resistance is about 2 to 3, the number of correction data will be 2 to 3 data. Therefore, the degree of freedom is extremely limited.

As a method for solving this, there is a technique of mounting a control device including a memory element on the fuel injection pump in order to correct the characteristic variation of the fuel injection pump for a diesel engine (for example, Japanese Patent Laid-Open Publication No. Sho. 61-1832
Issue). To explain this technique in more detail, as shown in FIG. 19, a control device 51 is mounted on the fuel injection pump 50, and the control device 51 has a CPU 52 and a communication buffer 53.
, Interface signal input / output buffer 54, power supply circuit 55, input signal buffer 56, and characteristic variation storage element 5
7 and an actuator drive circuit 58. The power supply circuit 55 receives power from the battery 59 and supplies a predetermined voltage to each device. Further, the CPU 52 fetches various sensor signals via the input signal buffer 56 and performs data communication with the external control device 60 via the communication buffer 53. Further, the CPU 52 is provided with an external control device 60 via an interface signal input / output buffer 54.
And interface signals (flag data such as an abnormality flag and a start start flag). The CPU 52 uses the data stored in the characteristic variation storage element 57 to output a drive signal to the injection amount control actuator 61 via the actuator drive circuit 58 to control the injection amount and also to control the injection timing via the actuator drive circuit 58. A drive signal is output to the control actuator 62 to control the injection timing.

To further describe this technique, in the diesel fuel injection pump, mechanical factors such as component processing accuracy and assembly accuracy of constituent parts, or an injection amount control actuator 61 mounted on each pump. Or the responsiveness of the injection timing control actuator 62, or the electrical characteristics such as the output characteristics of various sensors mounted on each pump,
There are variations in performance among individuals due to magnetic factors.
Therefore, the characteristic variation storage element 5 mounted on the injection pump 5
In No. 7, in order to keep the actual fuel injection amount or the fuel injection timing within the appropriate target tolerance with respect to the control command value of the fuel injection amount or the fuel injection timing, and to improve the control accuracy thereof, a diesel engine with standard characteristics is used. The correction data peculiar to each injection pump is stored from the characteristic difference from the fuel injection pump for use, and this is reflected in the control.

[0006]

However, when the control device 51 is mounted on the fuel injection pump 50 as shown in FIG. 19, the mounting environment (vibration, temperature, water, dust, etc.) is severe, and wiring is difficult. From the viewpoint of the above reliability, there is a demand to realize a function with a minimum configuration. That is, the control device 51 has a large scale including the memory element 57, the CPU 52 (arithmetic means), the power supply circuit 55, the communication buffer 53, the actuator drive circuit 58, and the like, which increases concern about reliability. It will be.

Further, it is necessary to provide a CPU for each of the devices 51 and 60, which complicates the structure. Therefore, it is conceivable that a CPU is provided only in the control device 60, the data of the storage element 57 is transferred to the CPU of the control device 60, and the CPU controls the actuators 61 and 62 based on this data. , Control device 51
Various problems remain in power supply means or data transfer between the control device 60 and the control device 60. For example, no specific method has been established regarding the establishment of a technique for reliably transferring data or the labor saving of electric energy.

Therefore, a first object of the present invention is to simplify an electronic device for communication. It is a second object of the present invention to provide an electronic device that simplifies an electronic device that performs communication and that can optimize the data transfer when performing the data transfer.

[0009]

According to the data transmitting apparatus of the first aspect, data prepared in advance is transmitted according to a clock signal transmitted from the outside. At this time, the charging means uses the clock signal. Is stored as electric power for the data transmission.

As described above, since power is supplied using the clock signal, a dedicated power supply line can be eliminated,
In addition, the structure is simplified without providing a power supply circuit inside.

According to the data transmitting apparatus of the fourth aspect, the backflow of the current is prevented by the backflow prevention means. According to the data transmission device of the fifth aspect, the charging means is composed of a capacitor, and the configuration is simple. Further, the charging means is composed of a charge pump circuit and can boost the voltage.

According to the data transmitting apparatus of the sixth aspect, data is stored in the storage element of the data transmitting apparatus. This data is transferred to an external control device by serial communication, and the external control device drives the electric actuator using the data.

At the time of the above-mentioned communication, the data continuous sending means continuously sends the data of the storage element from the data sending device to the external control device in the form of giving the leading identifier, and the external control device sends the leading identifier After confirming the reception, the data in the storage element is read. At this time, even if the head identifier cannot be received for some reason, the data is fetched again based on the data sent next. In this way, the data in the storage element is surely fetched. As a result, it is possible to simplify the electronic device that performs communication and further optimize the data transfer.

According to the data transmitter of the seventh aspect, the data of the data transmitter is transferred to the external control device, and the external control device drives the electric actuator by using the data.

At the time of the above-mentioned communication, the power supply control means supplies the power from the external control device to the data transmission device prior to the data transfer, and terminates the power supply at the end of the data transfer. As a result, the power consumption is minimal. In this way, the electronic device for communication can be simplified and the data transfer can be optimized.

According to the data receiving apparatus of the thirteenth aspect, a clock signal line for transmitting a clock pulse signal of a predetermined potential when executing serial communication to an external communication device, and a power supply of the external communication device. It is shared with the line.
As described above, since power is supplied using the clock signal line, a dedicated power supply line can be eliminated, and the configuration can be simplified without providing a power supply circuit inside the external communication device. It

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings.

The present embodiment is embodied as a control device for a fuel injection pump in a diesel engine mounted on an automobile. FIG. 1 shows the overall configuration of a fuel injection pump control device.

In the diesel fuel injection pump 1 (control target) for supplying fuel to the diesel engine, an injection amount control actuator 2 and an injection timing control actuator 3 are provided for electronically controlling the fuel injection amount and the fuel injection timing. Is provided. The control device for controlling the diesel fuel injection pump 1 includes a pump-mounted control device 4 (characteristic variation storage device) mounted on the pump 1 and a pump-non-mounted control device 5 (control device main body) not mounted on the pump 1. Consists of. The pump-uninstalled side control device 5 is packaged as an electronic control unit (ECU).

The pump-mounted control device 4 and the non-pump-mounted control device 5 are designed to be capable of clock-synchronous serial communication.
The correction data stored in the ROM 6 is transferred to the non-pump side control device 5 and stored in the backup memory 7 of the non-pump side control device 5, and the actuators (electrical actuators) 2 and 3 are stored using the correction data. It is designed to be driven and controlled.

In the present embodiment, the pump-mounted control device 4 is used as a data transmission device, and the non-pump-mounted control device 5 is used as a data reception device. Further, for the pump mounting side control device 4, the pump non-mounting side control device 5 is an external control device, and for the pump non mounting side control device 5, the pump mounting side control device 4 is an external communication device.

The details will be described below. The pump-mounted control device 4 includes an OTPROM (characteristic variation storage element) 6 as a storage element, a serial communication interface 8 as continuous data transmission means, and a communication buffer 9.
, An input filter (noise filter) 10, a power supply capacitor 11, and backflow prevention diodes 12 and 13. The OTPROM 6 is a writable non-volatile storage element, and the OTPROM 6 stores information on the machine difference for each fuel injection pump. This data is obtained by actually injecting fuel at the time of the shipping inspection process from the factory of the fuel injection pump 1 to check the injection characteristic, and the data corresponding to the deviation from the standard injection characteristic of the pump is stored as correction data. It was what I had. The OTPROM 6 is an element that does not require a power supply for holding data but needs a power supply for access.

FIG. 2 shows the data stored in the OTPROM 6. In the head identification data storage area A1, 1-byte head identification data 1, 1-byte head identification data 2,
... 1-byte head identification data M (M; predetermined integer) is stored. Further, in the correction data storage area A2, 1-byte correction data 1, 1-byte correction data 2,
... 1-byte correction data N (N; predetermined integer) is stored. Further, the checksum storage area A3 stores a 1-byte checksum for the above-mentioned correction data.

The communication buffer 9 shown in FIG. 1 is for performing signal level conversion or impedance conversion. As described above, the control device 4 is mounted on the diesel fuel injection pump 1, and even if the diesel fuel injection pump 1 is replaced, it is not necessary to readjust the control unit.
It is managed integrally with the diesel fuel injection pump 1.

Incidentally, instead of the OTPROM 6, EPRO
Other non-volatile storage elements such as M, EEPROM and flash memory may be used. Control device 5 without pump
Is for performing various calculations related to control of the diesel fuel injection pump 1, and includes a CPU 14, an input signal buffer 15, an analog-digital converter (ADC) 16
, Power supply circuit 17, PNP transistor 18, resistor 19, communication buffer 20, actuator drive circuit 21, and RO
It has an M22 and a backup memory 7. The power supply circuit 17 receives power from the battery 25 via the ignition key switch 24 and supplies a predetermined voltage to each device (circuit) of the non-pump side control device 5. C
The PU 14 takes in various sensor signals via the input signal buffer 15. When the sensor signal is an analog signal, the ADC 16 converts it into a digital value and fetches it. This sensor signal is an accelerator opening signal from an accelerator opening sensor, an engine speed signal from an engine speed sensor (crank angle sensor), an intake pressure signal from an intake pressure sensor, an intake temperature signal from an intake temperature sensor, A water temperature signal from the engine cooling water temperature sensor and the like.

The ROM 22 stores compatibility data for each engine model (control data when there is no machine difference between pumps). That is, the ROM 22 functions as a storage element for storing the central value control data. ROM22 is CP
Although it is an external ROM of U14, it may be a ROM with a built-in CPU.

The backup memory 7 is a writable storage element in which data is retained by power supply from the battery 25 even when the ignition key switch 24 is turned off, and the OTPROM 6 of the pump-side control device 4 is provided.
The correction data transferred from is stored. This is because the correction data once received by communication is supplied with power only to the backup memory 7 when the ignition key switch 24 is turned off as well as when the power is supplied while the engine is operating. This is to save the correction data and minimize the frequency of communication. That is,
The backup memory 7 functions as a storage element for storing correction data. Although the backup memory 7 is an external memory of the CPU 14, a memory built in the CPU or an E memory.
A rewritable non-volatile memory such as an EPROM or a flash memory may be used.

The pump non-mounting side control device 5 and the pump mounting side control device 4 are connected by three signal lines L1 to L3 for communication. PNP of non-pump side controller 5
The power supply voltage Vcc (5
Volt) and PNP transistor 18
The base terminal of is connected to the CPU 14. further,
The collector terminal of the PNP transistor 18 is connected to the capacitor 11 via the input filter 10 and the diode 12 of the pump-mounted control device 4 through the resistor 19 through the power supply / clock signal line L1. At the same time, the power supply / clock signal line L1 is branched on the upstream side of the diode 12 inside the pump-mounted control device 4 and connected to the serial communication interface 8. In the pump-mounted control device 4, the power supply capacitor 11 is connected to the OTPROM 6 via the diode 13, and
It is connected to the serial communication interface 8. Then, the CPU 14 turns on / off the transistor 18 to send a pulse signal of L level (ground potential) and H level (Vcc potential; 5 V) to the pump-mounted control device 4 through the power supply / clock signal line L1. . This pulse signal is sent to the serial communication interface 8 after removing noise through the input filter 10. The signal is a clock signal for the serial communication interface 8. The pulse signal from the power supply / clock signal line L1 serves as a power source for the OTPROM 6 and the serial communication interface 8. That is, power is stored by the power supply capacitor 11, and the OTPROM 6
Then, power is supplied to the serial communication interface 8.

The serial communication interface 8 of the pump-equipped side control device 4 includes a communication buffer 9, a serial communication line L2, and a communication buffer 2 in the non-pump-side control device 5.
It is connected to the CPU 14 via 0. Further, the ground line L3 directly connects the ground potential of the non-pump side control device 5 side and the ground potential of the pump side control device 4 and uses them as operation reference potentials.

During data communication during normal control, by connecting only these three lines L1, L2, L3, a writable OTP in the pump-side control device 4 can be obtained.
The correction data previously written in the ROM 6 can be transmitted to the pump non-mounting side control device 5. Further, the write voltage supply line L4 is provided as a terminal of the pump-mounted side control device 4, and this terminal is stored in the writable OTPROM 6 in the pump-mounted side control device 4 at the time of shipment from the factory or after shipment. Used only when writing or rewriting. That is, the data input tool 26 shown by the alternate long and short dash line in FIG. 1 is connected to L1 to L4, and a write voltage is applied to the write voltage supply line L4 to input data. In this example, the serial communication line L2 is used as the input signal line for write data, but an input signal line used only during writing may be separately provided.

At the time of communication, the non-pump side control device 5
In synchronization with the clock signal output from the so-called clock, correction data is sequentially output from the OTPROM 6 in the pump-side control device 4 to the serial communication line L2 via the serial communication interface 8 and the communication buffer 9 bit by bit. Synchronous communication is performed. At this time, the serial communication interface 8 repeatedly sends the data of the OTPROM 6 as long as the power supply and the clock signal are supplied. That is, the head identification data is added before the correction data, and a checksum is added after the correction data so that the correction data is repeatedly and continuously sent.

The actuator drive circuit 21 of the non-pump side control device 5 and the injection amount control actuator 2 of the diesel fuel injection pump 1 are connected by a drive line 35, and the actuator drive circuit 21 and injection timing control The actuator 3 is connected by a drive line 36.

The CPU 14 of the non-pump side control device 5 performs an operation using the compatible data for each engine model stored in the ROM 22 (data assuming that there is no pump difference) by various sensor signals, and the operation is performed. Based on the result, the injection amount control actuator drive signal SG1 and the injection timing control actuator drive signal SG2 are output through the actuator drive circuit 21 so that the fuel injection amount and fuel injection timing required according to the engine operating state are obtained. To do. The drive signals SG1 and SG2 drive the injection amount control actuator 2 and the injection timing control actuator 3.

At this time, since the diesel fuel injection pump 1 has characteristic variations among individuals due to machining accuracy and assembly accuracy, even if the same drive signal is output in the same engine operating state, The actual fuel injection amount and the fuel injection timing vary depending on the difference between the fuel injection pumps. Therefore, the OTP stored in the backup memory 7
The correction data is stored in the ROM 6 so that the characteristic variations are finely corrected, and the performance of the engine is improved by setting the fuel injection amount and the fuel injection timing as close to the required values as possible.

As described above, the CPU 14 uses the OTPROM 6
The actuators 2 and 3 of the diesel fuel injection pump 1 are drive-controlled using the information on the machine difference for each fuel injection pump. The details of the operation of the control device for the fuel injection pump will be described below with reference to the flowcharts of FIGS. 3, 4 and 5 and the time chart of FIG.

3 and 4 show a processing routine for reading communication data sent from the pump-mounted control device 4 after the ignition key switch 24 is turned on. Further, FIG. 5 shows a processing routine for controlling the drive of the transistor 18. These processes are started only once after the ignition key switch 24 is turned on.

When the ignition key switch 24 is turned on (timing t1 in FIG. 6), power is supplied from the battery 25 to the power supply circuit 17, and when a predetermined time T1 elapses (timing t2 in FIG. 6), the power supply is turned on. A reset signal is output from the circuit 17 to the CPU 14. The reset signal activates the CPU 14 to start the processing of FIGS. In FIG. 5, the CPU 14 executes step 151.
Then, when the reset signal is input, the transistor 18 is immediately turned on to start charging the capacitor 11 via the resistor 19, the power supply / clock signal line L1, the input filter 10 and the diode 12. CPU14 is step 15
In step 2, it is determined whether or not the predetermined time T2 has elapsed. If not, the process returns to step 151. This predetermined time T2 is the time required from the start of power supply to the completion of capacitor charging, during which initialization related to communication such as flags and counters is performed. Then, the CPU 14 proceeds to step 15
When a predetermined time T2 has elapsed in 2 (timing of t3 in FIG. 6), in step 153 the transistor 1 is driven at a frequency determined in advance based on the oscillation signal from the oscillator 23 in FIG.
8 is turned on / off and a clock signal is sent out. After that, the operation of transmitting the clock signal is continuously performed.

The capacitor 11 is repeatedly charged and discharged due to the voltage change of the clock signal, but the fluctuation of the voltage level is set so as not to fall below the minimum operating voltage of the pump-mounted control device 4. This will be described with reference to FIG. Figure 7
Shows a relationship between a clock signal line operation waveform supplied to the pump mounting side control device 4 by the power supply / clock signal line L1 and a charge / discharge waveform of the power supply capacitor 11 as a conceptual diagram. Operating power supply voltage (Vcc
= 5 V) Allowable voltage fluctuation range ΔV (for example,
0.5 volt, communication clock cycle T (for example, 20 μ
s) is shown in the figure.

The charging / discharging waveform of the power supply capacitor is synchronized with the clock signal line operating waveform, and is charged at the H level and discharged at the L level, and this is repeated. At this time, the H level means the supply of the operating power supply voltage, and the current supply capacity thereof is larger than the current consumption of the pump-mounted control device 4. or,
The L level is the ground level of the communication system, but the voltage drop due to the discharge at that time does not fall below the minimum operating voltage during the L level period. The power supply capacitor 11 is charged in the communication idle state, and charging and discharging are repeated in synchronization with the change of the clock signal during communication.

As long as the voltage drop due to the discharge during communication does not exceed the allowable voltage fluctuation range of the operating power supply voltage of the pump-mounted side control device 4, it is possible to operate with such a simple power supply. At this time, the required capacity of the power supply capacitor 11 is determined by the communication clock cycle and the current consumption of the entire pump-mounted control device 4.

Specific numerical examples are shown below. First, the load impedance corresponding to the entire pump-mounted control device 4 is _RL [Ω], the electrostatic capacity of the power supply capacitor 11 is C [F], and the operating power supply voltage of the pump-mounted control device 4 is V _cc [V] above V _If the allowable fluctuation width for _cc is ΔV [V] and the communication clock cycle is T [sec], then V _cc · exp (−T / 2R _L C) = V _cc −ΔV, so if this is modified, C = −T / (2R _L ln (1-ΔV / V _cc )) where R _L = 250 [Ω], V _cc = 5 [V], ΔV =
Assuming that the required capacity C is 0.5 [V] and T = 20 [μs], C = −20 · 10 ⁻⁶ /(2·250·ln(1−0.5/5))=3 Since it is 8 · 10 ⁻⁷ [F], a relatively small capacity and small capacitor can be operated without problems.

In this calculation example, the PNP transistor 1
8, the voltage drop in the current path of the resistor 19, the signal line L1, the input filter 10, the diode 12, etc. is ignored. In the serial communication interface 8, the data stored in the OTPROM 6 by this clock signal is transferred in the order of the head identification data, the correction data, and the checksum.
It is continuously and repeatedly sent through the serial communication line L2.

On the other hand, the CPU 14 in FIG.
The data reading is started at the timing of 4. CP
In step 101, U14 checks whether the check code of the backup memory 7 (correction data storage storage element) is normal. This check code is for checking whether the data stored in the backup memory 7 is valid, and is performed by a sum check or the like. Note that this check may be performed by a mirror check. Alternatively, the block check character BCC for checking the correction data may be a horizontal parity other than the checksum.

If the CPU 14 is normal, the processing is terminated without any processing in order to minimize the communication frequency. If the check code is abnormal, the CPU 14 proceeds to step 102.
Move to and permit reception. CPU14 is step 10
At 3, the data for 1 byte is received. At this time, an error check such as parity, framing, or overrun may be performed on 1-byte data. In step 104, the CPU 14 determines whether the head identification completion flag F1 is "1". Initially, F1 = 0 due to initialization, so C
The PU 14 proceeds to step 105 and determines whether or not the 1-byte received data is the head identification data, and if it is the head identification data (timing t5 in FIG. 6), the PU 14 sets the head identification data counter C1 in step 106. Increment by "1". Then, in step 107, it is judged whether or not the count value by the head identification data counter C1 is "M" (the number of bytes of the head identification data), and if the count value is not "M", the processing returns to step 103.

In this way, steps 103 → 104 → 1
Repeat step 05 → 106 → 107 → 103 and step 1
When the count value of the head identification data counter C1 reaches "M" in 07 (timing t6 in FIG. 6), the process proceeds to step 108, the head identification completion flag F1 is set to "1", and the process returns to step 103.

In this way, the leading identification data is identified by the processing of steps 105 to 108. If an error occurs during the reception of the head identification data, step 105
To step 109, the flags F1, F2, F
3. Clear all counters C1, C2 and sum value (=
0) and shifts to step 103. As a result, the data read operation is performed again by the same procedure as described above.

Since the head identification completion flag F1 is "1" in the next step 104 after the reception of the head identification data is completed, the process proceeds to step 110 of FIG. 4 and the correction data reception completion flag F2 is set to "1". It is determined whether it is "1". Initially, F2 = 0 due to initialization, so
The CPU 14 proceeds to step 111, stores the received data of 1 byte in the backup memory 7, and stores it in step 11
In step 2, the sum value is added to the received data to update the sum value.
At this time, in order to limit the number of digits, only the lower 8 bits are enabled and the other upper digits are disabled. Initially, the sum value is "0" due to initialization. Furthermore, CP
The U14 increments the correction data counter C2 by "1" in step 113. Initially, the count value of the correction data counter C2 is "0" due to initialization.
Then, the CPU 14 determines in step 114 whether the count value of the correction data counter C2 is "N" (the number of bytes of the correction data), and if the count value is not "N", the CPU 14 proceeds to step 103 of FIG. Return.

In this way, steps 103 → 104 → 1
10 → 111 → 112 → 113 → 114 → 103 is repeated, and in step 114, the correction data counter C2
Becomes "N" (timing of t7 in FIG. 6), the CPU
14 shifts to step 115 to set the correction data reception completion flag F2 to "1" and returns to step 103.

In the next step 110, since the correction data reception completion flag F2 is "1", CP
The U14 proceeds to step 116 and determines whether or not the sum value as the data sent and the sum value at step 112 match, and if they match, the check sum value sent at step 117 is stored in the backup memory 7. Then, the data reception completion flag F3 is set to "1" at step 118 (timing t8 in FIG. 6). Then step 1
Reception is prohibited at 19.

As described above, until the data reception completion flag F3 becomes "1", the CPU 14 has no data to be reflected in the correction, so that the R of the pump non-mounting side control device 5 is R.
The control based on the central value control data stored in the OM 22 is continuously executed.

On the other hand, if the checksum value sent in step 116 and the sum value in step 112 do not match, the CPU 14 determines that an error has occurred due to noise or the like during the transmission of the correction data, and the step of FIG. In step 109, the flags F1, F2, F3, the counters C1, C2 and the sum value are all cleared (= 0),
Control goes to step 103. As a result, the data read operation is performed again by the same procedure as described above (data read at t8 to t9 indicated by the alternate long and short dash line in FIG. 6).

FIG. 8 is a data flow chart showing a process up to calculation of the fuel injection amount in the CPU 14 of the non-pump side control device 5 (control device main body). First, the basic injection amount calculation unit 27 calculates the basic injection amount Qa from the accelerator opening and the engine speed. On the other hand, the basic maximum injection amount calculation unit 28 calculates the basic maximum injection amount Qb from the engine speed and the intake pressure, and the correction calculation unit 29 further uses the correction coefficient K1 based on the intake air temperature and the correction coefficient K2 based on the water temperature. After correcting the amount Qb, the corrected basic maximum injection amount Qb '
(= Qb · K1 · K2) is calculated. Then, the selector 30 selects the smaller one of the basic injection amount Qa and the corrected basic maximum injection amount Qb ', and the addition unit 31 performs acceleration correction based on the accelerator opening degree on the minimum value.

On the other hand, the machine difference correction calculator 32 receives the correction data received as serial communication data by the pump-mounted control device 4, the engine speed, and the basic injection amount calculator 27.
A machine difference variation correction value ΔQ is calculated from the basic injection amount Qa according to Then, the adder / subtractor 33 compares the output value of the adder 31 with the machine difference variation correction amount Δ from the machine difference correction calculator 32.
Q is added or subtracted to make a correction according to the variation in machine difference between injection pumps. Further, the addition / subtraction unit 34 adds / subtracts various correction values to / from the output value of the addition / subtraction unit 33, and then outputs the calculation result as the final injection amount.

As described above, the pump-mounted control device 4 corrects the characteristic variation correction data received as the serial communication data according to the variation in the machine difference between the injection pumps, and reflects it in the final injection amount.

Here, as the correction method using the correction data, in the example of FIG. 8, the basic injection amount is used as a parameter in calculating the fuel injection correction amount (machine difference variation correction value ΔQ) corresponding to each engine speed. As a result, fine correction control can be performed for various engine operating conditions, and performance can be improved.

With respect to the fuel injection timing, the same correction can be performed although the method is not particularly limited. Also, based on the respective calculation results, the pulse output ON / OFF timing, ON / OFF duty, etc. are directly converted into a signal form for driving the actuators 2 and 3 and output. It is also possible to correct characteristics such as a few responsiveness.

As described above, in the present embodiment, the pump-mounted control device 4 has the OTPROM 6 (storage element) storing the information on the machine difference for each fuel injection pump and the signal lines L1 to L3.
Serial communication interface 8 for transferring the information of OTPROM 6 to the non-pump side control device 5 using
(Communication means) and the signal line L1 in the signal lines L1 to L3 that sends a signal from the pump non-installation side control device 5 to the pump installation side control device 4 is used to store the power supplied from the pump non installation side control device 5. , A power supply capacitor 11 (charging means) for driving the entire pump-mounted control device 4 with this electric power, and the pump-non-mounted control device 5 is OT
A CPU 14 (control means) for driving and controlling the actuators 2 and 3 of the fuel injection pump 1 using the information of the machine difference of each fuel injection pump of the PROM 6 is provided. That is, the power supplied from the pump non-mounting side control device 5 is stored in the power supply capacitor 11 (charging means) using the clock signal line L1, and the whole pump mounting side control device 4 is driven by this power. did. In this way, the pump-side control device 4 does not need to be provided with a wiring for exclusive use of power supply or has a power supply circuit internally, and thus the OTPROM 6, the serial communication interface 8, the communication buffer 9, and the input filter 10 are not used. It is composed of only the power supply capacitor 11 and the backflow prevention diodes 12 and 13. as a result,
The equipment installed in the pump can be simplified as much as possible, and the function can be maintained while withstanding the harshness of the installation environment (vibration, temperature, water, dust, etc.) and ensuring the reliability of wiring.

Further, in the configuration shown in FIG. 18, information can be prepared only for the adjustment resistance, but in this configuration, OT
A large amount of information can be prepared using the PROM 6 and serial communication.

Further, since the synchronous serial communication is performed by receiving the supply of the clock signal from the non-pump side controller 5, the clock signal line is required but the clock source is not required and the configuration is simplified. It

Further, since the diode 12 (backflow prevention means) is provided, the backflow of current to the input filter 10 on the downstream side of the power supply capacitor 11 is prevented. or,
Since the charging means is the capacitor 11, the structure is simple.

Further, the pump mounting side control device 4 and the pump non-mounting side control device 5 supply power and also serve as a clock signal line L1.
In the system connected by the serial communication line L2 and the serial communication line L2, the serial communication interface 8 as the continuous data sending means transfers the data of the OTPROM 6 (storage element) from the pump-side control device 4 in the form of adding the head identification data as the head identifier. The data is continuously sent to the non-pump side control device 5, and the CPU 14 reads the data in the OTPROM 6 after confirming the reception of the head identification data. Therefore, when fetching the data, for some reason (for example, a momentary power interruption occurs when the top identification data is transmitted).
Even if the head identification data could not be received due to
The process proceeds from step 105 to 109 in FIG. 3 to clear the flags and counters, and then proceeds to step 103 to fetch the data again based on the data sent next. In this way, the data in the OTPROM 6 is surely fetched. As a result, the electronic device for communication can be simplified and the data transfer can be optimized.

Further, although it is necessary to identify the head identification data, no special measures are taken on the pump-non-installed side control device 5 side,
Data can be received. That is, it is possible to eliminate the need for processing such as synchronizing with the control line and outputting a request command. (Second Embodiment) Next, the second embodiment will be described focusing on the differences from the first embodiment. In the present embodiment, as shown in FIG. 9, a charge pump circuit 37 is used instead of the capacitor 11 as the charging means. In FIG. 9, the charge pump circuit 37 is NP
N-transistor 38, resistor 39, diodes 40, 41
The coil 42, the capacitors 43 and 44, and the Zener diode 45. The charge pump circuit 37 operates in synchronization with the clock signal, and the clock signal supplied from the non-pump side control device 5 constantly outputs a pulse, and the clock signal of the non-pump side control device 5 is supplied. This is effective when the amplitude (H-level voltage value based on 0 volt) is smaller than the operating power supply voltage of the pump-mounted control device 4.

That is, since the clock signal is turned on / off, the energy stored in the coil 42 when it is turned on causes OF
Since it is possible to charge by using the surge waveform generated at the time of F, the operating power supply voltage of the pump-mounted side control device 4 (for example, the voltage of the clock signal amplitude (H-level voltage value at 0 volt reference)) 10 volt specification) can be secured. Therefore, regardless of the method of providing wiring for supplying special power or providing a power supply circuit inside,
It is possible to enable the operation of the pump-mounted control device 4. (Third Embodiment) Next, the third embodiment will be described focusing on the differences from the first embodiment.

FIG. 10 shows the OTP in this embodiment.
The data stored in the ROM 6 are shown. There is no head identification data storage area A1, but a correction data storage area A2 and a checksum storage area A3 are prepared. Also, during communication, data output after power supply is always performed from the beginning (correction data 1). In other words, it is not necessary for the other side (reception side) to synchronize with the head identification data.

Then, the processing shown in FIGS. 11 and 12 is executed. FIG. 11 shows a data read processing routine, and FIG.
Reference numeral 2 is a processing routine for controlling the driving of the transistor 18. Further, FIG. 13 shows a time chart.

When the ignition key switch 24 is turned on (timing t11 in FIG. 13), the power supply circuit 17
Is supplied with power from the battery 25 for a predetermined time T11.
When (time t12 in FIG. 13) has elapsed, the power supply circuit 17 outputs a reset signal to the CPU 14. The CPU 14 is started by the input of the reset signal and executes the processing of FIGS.

In FIG. 12, the CPU 14 executes step 25.
At 1, system initialization processing including flags and counters is performed. In this example, T12 indicates the processing time. T
When 12 has passed (timing t13 in FIG. 13), C
In step 252, the PU 14 turns on the transistor 18 to supply the capacitor 1 through the power supply / clock signal line L1.
1 charging starts. Then, the CPU 14 executes step 2
At 53, it is determined whether the predetermined time T13 has elapsed, and if not, the process returns to step 252. The predetermined time T13 is the time required from the start of power supply to the completion of capacitor charging. When the predetermined time T13 has elapsed (t in FIG.
14 timing), the CPU 14 turns on / off the transistor 18 in step 254 to send out a clock signal. After that, the operation of transmitting the clock signal is continuously performed.

In the serial communication interface 8, the data stored in the OTPROM 6 is sent out through the serial communication line L2 in the order of correction data and checksum in response to this clock signal.

On the other hand, the CPU 14 in FIG.
Data reading is started at the timing of t14 (start of transmission of clock signal). In step 201, the CPU 14 checks in advance whether the check code of the backup memory 7 (correction data storage storage element) is normal. If the CPU 14 is normal, the processing ends without any processing in order to minimize the communication frequency. Therefore, in this case, the process for reading data after the timing t13 in FIG. 13 is not performed. If the check code is abnormal, the CPU 14 proceeds to step 202 and permits reception.

The CPU 14 receives one byte of data in step 203, determines in step 210 whether the correction data reception completion flag F2 is "1",
If it is not "1", the process proceeds to step 211, the received data is stored in the backup memory 7, and step 21
In step 2, the sum value is added to the received data to update the sum value.
Further, in step 213, the correction data counter C2 is incremented by "1". Then, the CPU 14 determines in step 214 whether the count value of the correction data counter C2 is "N" (the number of bytes of the correction data), and if the count value is not "N", the step 2
Return to 03.

In this way, steps 203 → 210 → 2
11 → 212 → 213 → 214 → 203 is repeated, and the correction data counter C2 is “N” in step 214.
Then (timing t15 in FIG. 13), the CPU 14
Shifts to step 215, sets the correction data reception completion flag F2 to "1", and returns to step 203.

In the next step 210, since the correction data reception completion flag F2 is "1", the sum value sent in step 216 and step 2
It is determined whether or not the sum value of 12 matches the sum value. If they match, the sum value sent in step 217 is stored in the backup memory 7, and the data reception completion flag F3 is set to "1" in step 218 (see FIG. 13). timing of t16). Further, reception is prohibited in step 219.

If the sum value sent in step 216 and the sum value in step 212 do not match, the CPU 14 bypasses steps 217 to 218 and sets the retransmission request flag F4 to "1" in step 220 to set step 219. After the reception is prohibited by, the processing ends. At the same time, also in step 255 of FIG. 12, the process is forcibly moved to step 256 to turn off the transistor. Also, if any abnormality occurs during communication, step 20
If F3 = 0 remains in spite of a lapse of a predetermined time from the start of communication due to the failure of reception at 3
The transistor is turned off by forcibly shifting to step 256 in FIG. Due to the occurrence of such an abnormality, F3 =
Since it remains 0, and there is no data to be reflected in the correction, the CPU 14 performs control using the central value control data stored in the ROM 22 of the non-pump side control device 5. However, although not shown in the figure, when the flag F4 is "1", communication is tried again by the same procedure after a certain time has elapsed.

The CPU 14 monitors the data reception completion flag F3 in step 255 of FIG. 12, and when the data communication is normally completed, F3 = 1, so that step 2
Moving to 56, the transistor 18 is turned off. As a result, the supply of the clock signal and the power supply are terminated.

As described above, according to this embodiment, the CPU 14 as the power supply control means uses the power supply / clock signal line L1 to transfer power from the pump non-mounting side control device 5 to the pump mount side control prior to data transfer. It is supplied to the device 4 (steps 251, 252, 253, FIG. 12).
254), the power supply is terminated when the data transfer is completed (steps 255 and 256 in FIG. 12). As a result, the power consumption is minimal. In this way, the electronic device for communication can be simplified, and the data transfer can be optimized.

At the start of data transfer, the CPU 14 supplies a clock signal from the pump non-mounting side control device 5 to the pump mounting side control device 4 by using the power supply / clock signal line L1 (steps 253 and 254 in FIG. 12). ),
When the data transfer is completed, the supply of the clock signal is completed (steps 255 and 256 in FIG. 12). Therefore, the clock signal is minimized. In this way, the output of the clock signal is also minimized, so that it is possible to prevent the clock signal from radiating from the wire to cause noise and adversely affect other electronic devices.

In the present embodiment as well, in order to improve reliability by considering various kinds of errors, the same head identifier as in the first embodiment may be added. (Fourth Embodiment) Next, the fourth embodiment will be described focusing on the differences from the third embodiment.

The data stored in the OTPROM 6 in this embodiment is the same as that shown in FIG. In this example, the process shown in FIG. 14 is executed instead of the process shown in FIG. The processing shown in FIG. 11 is the same. Furthermore, FIG. 15 shows a time chart.

In the present embodiment, the CPU 14 turns on the transistor in step 351 of FIG. 14 prior to the system initialization processing. After that, in step 354, on / off control of the transistor is performed. The data reception completion flag F3 is monitored in step 355, and when F3 = 1 (timing at t26 in FIG. 15), the process proceeds to step 356 to turn on the transistor 18. As a result, the output of the clock signal is terminated and the power supply is continued. (Fifth Embodiment) Next, a fifth embodiment will be described with reference to FIG.
The case of implementation with the configuration shown in FIG. 6 will be described focusing on the differences from the third embodiment.

The data stored in the OTPROM 6 in this embodiment is the same as that shown in FIG. In this example, communication is performed by the configuration shown in FIG. 16 instead of the configuration shown in FIG.

FIG. 16 differs from FIG. 1 in the serial communication line L.
5, the communication control line L6 is added. On the other hand, the ground line L3 is abolished as an example in which fluctuations in the ground potential of the pump-mounted control device 4 and the pump-non-mounted control device 5 do not pose a problem, and the ground line L3 is passed from the pump-mounted control device 4 to the fuel injection pump 1 It is indirectly connected to the ground potential common to the non-pump side control device 5.

The serial communication line L5 is a communication line that enables data transmission from the pump-mounted control device 4 to the pump-non-mounted control device 5 and realizes bidirectional communication. The communication control line L6 is a control line for permitting the communication of the pump-mounted control device 4 only during the communication period, and is for performing more reliable bidirectional communication.

FIG. 17 is a flow chart showing the procedure when communication is performed with the configuration shown in FIG. Differences from FIG. 11 will be mainly described.

First, in step 221, the CPU 14 sets the communication control line L6 to the permission side. Also, the CPU 14
In step 222, a data address as a data request command is transmitted, and in step 203, one byte of data is received as corresponding received data. By doing so, the requested data can be directly received, so that the identification of the data becomes clearer. C
In step 223, the PU 14 increments the data request address in order to receive the data sequentially.

In step 224, the CPU 14 inhibits the reception after the completion of the series of communication procedures, and then the communication control line L
Set 6 to the prohibited side.

[Brief description of drawings]

FIG. 1 is an overall view of a control device for a diesel fuel injection pump.

FIG. 2 is an explanatory diagram showing data storage contents according to the first embodiment.

FIG. 3 is a flowchart showing a data reading process according to the first embodiment.

FIG. 4 is a flowchart showing a data reading process according to the first embodiment.

FIG. 5 is a flowchart showing a driving process of a transistor according to the first embodiment.

FIG. 6 is a time chart showing various kinds of processing in the first embodiment.

FIG. 7 is a relationship diagram between a clock signal line operation waveform and a charge / discharge waveform.

FIG. 8 is a data flow chart showing a process up to calculation of a fuel injection amount.

FIG. 9 is a configuration diagram of a pump-mounted side control device according to the second embodiment.

FIG. 10 is an explanatory diagram showing data storage contents.

FIG. 11 is a flowchart showing a data reading process.

FIG. 12 is a flowchart showing a transistor driving process according to the third embodiment.

FIG. 13 is a time chart showing various types of processing in the third embodiment.

FIG. 14 is a flowchart showing a transistor driving process in the fourth embodiment.

FIG. 15 is a time chart showing various processes according to the fourth embodiment.

FIG. 16 is an overall configuration diagram according to a fifth embodiment.

FIG. 17 is a flowchart showing processing according to the fifth embodiment.

FIG. 18 is an overall view of a conventional control device for a fuel injection pump.

FIG. 19 is an overall view of a conventional control device for a fuel injection pump.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Diesel fuel injection pump, 2 ... Injection amount control actuator, 3 ... Injection timing control actuator, 4
... Pump-side control device as data transmission device, 5 ...
Pump non-installed side control device as data receiving device, 6 ...
OTPROM as storage element, 7 ... Backup memory, 8 ... Serial communication interface as continuous data sending means, 9 ... Capacitor for power supply as charging means, 12 ... Diode as backflow prevention means, 14 ... As power supply control means CPU, 20 ... communication buffer,
21 ... Actuator drive circuit, 37 ... Charge pump circuit as charging means, L1 ... Power supply and clock signal line.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location F02D 45/00 380 F02D 45/00 380 395 395Z

Claims (14)

[Claims] 1. A data transmission device for transmitting data prepared in advance according to a clock signal transmitted from the outside, comprising a charging means for storing the clock signal as electric power for the data transmission. Data transmission device. 2. The data transmission device according to claim 1, wherein the data transmission device is mounted on a device having an electric actuator controlled by an external control device. 3. The data transmission device according to claim 1, wherein the data transmission device is coupled to an external control device via a serial communication line, and the data transmission device and the external control device are synchronous according to the clock signal. It is for serial communication. 4. The backflow prevention unit according to claim 1, further comprising: a backflow prevention unit that prevents a backflow of a current downstream of the charging unit in a signal line to which power is supplied. 5. The charging means according to claim 1, comprising a capacitor or a charge pump circuit. 6. The storage element according to claim 2, wherein the data transmission device stores data for transferring to the external control device by serial communication to drive the electric actuator, and a head identifier. And a continuous data transmission means for continuously transmitting the data of the storage element from the data transmission device to an external control device in a form of adding, and the external control device confirms reception of the head identifier. After that, the data in the storage element is read. 7. The external control device according to claim 2, wherein power for the data transmission device is supplied from the external control device to the data transmission device prior to data transfer from the data transmission device. At the same time, it has a power supply control means for ending the supply of the power when the data transfer is completed. 8. The power supply control means according to claim 7, wherein the power supply control means transmits the power for supplying to the data transmitting device to the data transmitting device as the clock signal, and supplies the clock signal. A clock signal line for coupling between the data transmission device and the external control device. 9. The data transmission device and the external control device according to claim 8, wherein the data transmission device and the external control device are connected by a line for synchronous serial communication, and at least one of the lines is the power supply and the clock signal. Also used as a line for supply. 10. The electric actuator according to claim 2, wherein the electric actuator is an actuator for supplying fuel to an engine, and the data transmission device stores machine difference data for each device in which the actuator is mounted. The external control device has a storage element, receives the data stored in the storage element from the data transmission device, and uses the machine-difference data to generate an electric actuator according to the engine operating state. It is to drive. 11. The apparatus according to claim 10, wherein the data transmission device is mounted on a fuel injection pump, and the external control device is not mounted on the fuel injection pump, and is stored in the storage element. The electric actuator is controlled according to data and a signal from a sensor that detects an operating state of the engine. 12. The storage element according to claim 11, wherein the storage element is an OTPROM. 13. An actuator drive circuit for driving an electric actuator, a memory for storing control data for controlling the electric actuator, and an external communication device for serial communication in synchronization with a clock signal. A communication buffer for executing the control data of the electric actuator from an external communication device and storing it in the memory; and a shared power supply line for the external communication device, A data receiving device, comprising: a clock signal line for transmitting a clock pulse signal of a predetermined potential when executing serial communication. 14. The external communication device according to claim 13, wherein the external communication device stores a device-specific control data in which the electric actuator is mounted, and a device-specific control data stored in the memory device. , A serial communication interface for transmitting to the communication buffer in synchronization with the timing of the clock pulse signal.