JPH08237077A - 90× phase shifter - Google Patents

Abstract

PURPOSE: To extract stably output signals having an accurate phase difference of 90 deg.. CONSTITUTION: The phase shifter is made up of a 90 deg. phase shift circuit section 1 comprising a 1/2 frequency divider employing a T flip-flop and receiving an input signal and a complementary input signal with duty ratio is kept to be 50% at its two input terminals and extracting output signals having a phase difference of 90 deg., a 90 deg. phase comparator 2 comparing phases of the output signals of the phase shift circuit section 1, and a feedback section that extracts a DC component corresponding to a phase deviation of the outputs of the 90 deg. phase shift circuit section 1 from an output of the 90 deg. phase comparator 2 and feeds back the DC component to input terminals 9, 10 of the 90 deg. phase shift circuit section 1 so as to correct the phase deviation in the outputs, and the feedback section is made up of a low pass filter 3 and a DC component amplifier 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a 90 ° phase shifter using a T flip-flop, and more particularly to a high frequency 90 ° phase shifter for a quadrature modulator / demodulator in digital communication.

[0002]

2. Description of the Related Art In digital communication, QPSK
A modulation / demodulation method such as (quadrature phase modulation) is used. In such a modulation / demodulation method, a quadrature modulator which uses a phase difference of 90 ° with each other is used, and the signal of the 90 ° phase difference is required to be a signal having a highly accurate phase difference. Therefore, the quadrature modulator requires a 90 ° phase shifter that operates with high precision and high frequency.

Various types of 90 ° phase shifters have been conventionally proposed. FIG. 4 shows a 90 ° phase shifter using a T flip-flop as a first conventional example. This 90 ° phase shifter is composed of a T flip-flop composed of four signal input transistors Tr1 to Tr4 and eight bi-differential transistors Tr5 to Tr12, and the duty ratio of the input terminals 21 and 22 is kept at 50%. By inputting the dropped input signal IN and the complementary input signal (bar of IN), the bi-differential transistor Tr5
0 to 90 ° from the output terminals 23, 24, 25 and 26 by four load resistors R1 to R4 of
The four-phase signals of ° and 270 ° are taken out.

Further, a device capable of correcting a phase shift in a 90 ° phase shifter is disclosed in JP-A-3-149915 and JP-A-3-149915.
It is proposed in each publication of No. 159305.

First, as a second conventional example, Japanese Patent Laid-Open No. 3-14
The 90 ° phase shifter described in 9915 is shown in FIG. In this 90 ° phase shifter, the input signal IN1 and the first reference voltage V1
Comparator 30 for obtaining the first output signal Vo1 whose waveform is shaped by comparing with the integrator 31 for integrating the input signal IN1
And a second comparator 32 for generating a trigger pulse by comparing the integrated output with the second reference voltage V2, and having the same shape as the waveform of the first output signal Vo1 based on the phase of the trigger pulse and having a 90 ° angle. Second output signal Vo2 having a phase difference
Latch 33 for taking out the first and second output signals Vo1,
The phase comparator 34 for comparing the phase difference of Vo2 and the output (error voltage) VPD of this phase comparator 34 are used as the first reference voltage V1.
Adder / subtractor 3 for adding and subtracting to generate a second reference voltage V2
It is composed of 5.

Here, the first reference voltage V1 is the voltage Vref from the reference voltage source 36 multiplied by K by the amplifier 37, and the second reference voltage V2 obtained from the adder / subtractor 35.
Is K times the voltage obtained by adding and subtracting the error voltage VPD to the voltage Vref from the reference voltage source 36.

In the 90 ° phase shifter thus constructed,
The phase error caused by the parasitic capacitance of the integrator 31 and the delay of the comparator 32 is converted into a DC component by the phase comparator 34 and taken out, and this DC component (error voltage) is fed back to the reference voltage of the comparator 32 to obtain an accurate signal. An output signal having a 90 ° phase difference is obtained.

Next, as a third conventional example, Japanese Patent Laid-Open No. 3-1
A 90 ° phase shifter described in 59305 is shown in FIG.
In this 90 ° phase shifter, an approximate 90 ° phase shifter 40 for obtaining an output obtained by shifting the input signal IN1 by 90 ° and a synchronous detector for synchronously detecting the input signal IN1 using the output signal V01 of the adder 41 as a reference signal. 42, a multiplier 43 that multiplies the detection output by the input signal IN1, and an adder 41 that adds the multiplication output and the output of the synchronous detector 42 to obtain an output signal V01. In the 90 ° phase shifter configured in this way,
By comparing the output signal V01 with the input signal IN1 and feeding back the deviation from 90 ° to the output signal, the output signal V having a correct 90 ° phase difference is automatically corrected for the deviation of the output phase.
I am taking out 01.

[0009]

In the above-mentioned first conventional example, the duty ratio between the input signal and the complementary input signal must be exactly 50%, the duty ratio deviation and the DC offset of the input signal. There is a problem in that the deviation of is directly output as a deviation of the phase from 90 °. Also,
In the second and third conventional examples, since the circuit is configured by using the comparator and the operational amplifier, there is a problem that the current consumption is low and stable operation cannot be performed at a high frequency. Therefore, a 90 ° phase shifter using a T flip-flop has been used, but it has the above-mentioned problems.

The present invention has been proposed in order to solve the problems of the prior art as described above, and it is precisely 9
It is an object of the present invention to provide a 90 ° phase shifter capable of stably extracting an output signal having a 0 ° phase difference.

[0011]

In order to achieve this object, a 90 ° phase shifter according to the present invention is constituted by a 1/2 frequency divider using a T flip-flop, and has a duty ratio of two input terminals. Is compared with the 90 ° phase shift circuit section for extracting an output signal having a 90 ° phase difference by inputting the input signal maintaining 50% to 50% and the output phase of the 90 ° phase shift circuit section. A DC component corresponding to the phase shift from the 90 ° phase comparator and the output of the 90 ° phase shift circuit from 90 ° is extracted from this 90 ° phase comparator, and this DC component is output so that the output phase shift can be corrected. And a feedback section for feeding back to the input terminal of the 90 ° phase shift circuit section, and preferably the feedback section is composed of a low-pass filter and a DC component amplifier.

Here, the T flip-flop can be said to be a 1/2 frequency divider because one output pulse is obtained for every two input pulses and the number of input pulses is halved. Therefore, by using the input signal with a duty ratio of 50% and the complementary input signal, an output signal with a 90 ° phase difference can be taken out.

[0013]

When the two input waveforms input to the 90 ° phase shift circuit section have a DC offset or the duty ratio is kept at 50% due to the waveform distortion, the output of the 90 ° phase shift circuit section is output. It appears as a phase shift from 90 °. The phase shift from 90 ° is detected by the 90 ° phase comparator, and the DC component corresponding to the phase shift is taken out by the low pass filter. After this DC component is amplified by the DC component amplifier, the
Since it is fed back to the input end of the phase shift circuit section as an input bias, it is locked in a state where the phase shift is zero, and an output signal with an accurate 90 ° phase difference can be taken out.

[0014]

Embodiments of the present invention will now be described in detail with reference to the drawings. The circuit diagram of FIG. 1 shows an embodiment of a 90 ° phase shifter according to the present invention. The 90 ° phase shifter shown in FIG. 1 includes a 90 ° phase shift circuit unit 1, a 90 ° phase comparator 2, a low pass filter 3 and a DC component amplifier 4.

First, the 90 ° phase shift circuit section 1 is composed of a 1/2 frequency divider using a T flip-flop, as shown in FIG.
Similar to the conventional 90 ° phase shifter shown in FIG. 4, four signal input transistors Tr1 to Tr4 and eight bi-differential transistors Tr5 are provided.
Through Tr12. Explaining the connection relationship of these transistors, the input terminal 5 into which the input signal IN is input is connected to the bases of the signal input transistors Tr1 and Tr4 via the electrostatic capacitance C1, and the input terminal 6 into which the complementary input signal (IN bar) is input. Is a signal input transistor Tr via a capacitance C2.
2, connected to the base of Tr3. A current source 7 is connected between the commonly connected emitters of the signal input transistors Tr1 and Tr2 and the ground, and a current source 8 is connected between the commonly connected emitters of the signal input transistors Tr3 and Tr4 and the ground.

The collector of the signal input transistor Tr1 is
The bi-differential transistors Tr5 and Tr8 are connected to the commonly connected emitters, and the collector of the signal input transistor Tr2 is connected to the commonly connected emitters of the bi-differential transistors Tr6 and Tr7. Also, the signal input transistor Tr3
Is connected to the commonly connected emitters of the dual differential transistors Tr9 and Tr12, and the collector of the signal input transistor Tr4 is connected to the commonly connected emitters of the dual differential transistors Tr10 and Tr11.

The DC power supply Vc is connected to the commonly connected collectors of the bi-differential transistors Tr5 and Tr6 via the load resistor R1, and the bi-differential transistor Tr via the load resistor R2.
7 and Tr8 are connected to the commonly connected collectors. Further, the DC power supply Vc is connected to the commonly connected collectors of the bi-differential transistors Tr9 and Tr10 via a load resistor R3, and the bi-differential transistors Tr11 and T11 via a load resistor R4.
Connected to the commonly connected collector of r12.

The base of the bi-differential transistor Tr5 is connected to the base of the bi-differential transistor Tr10, and the base of the bi-differential transistor Tr6 is connected to the base of the bi-differential transistor Tr12. Twin differential transistor Tr7
Is connected to the base of the bi-differential transistor Tr9, and the base of the bi-differential transistor Tr8 is connected to the base of the bi-differential transistor Tr11.

The commonly connected collectors of the bi-differential transistors Tr5 and Tr6 are connected to the output terminal 11 and to the base of the bi-differential transistor Tr7.
The commonly connected collectors of the bi-differential transistors Tr7 and Tr8 are connected to the output terminal 12 and the base of the bi-differential transistor Tr6.

The commonly connected collectors of the bi-differential transistors Tr9 and Tr10 are connected to the output terminal 13 and the base of the bi-differential transistor Tr11 so that the bi-differential transistors Tr11 and Tr12 are commonly connected. The collector thus connected is connected to the output terminal 14 and also to the base of the bi-differential transistor Tr10.

In such a 90 ° phase shift circuit unit 1, by keeping the duty ratio of the input signal IN and the complementary input signal (bar of IN) input to the input terminals 5 and 6 at 50%, the output terminal Four-phase signals having a phase difference of 0 °, 90 °, 180 °, and 270 ° can be extracted from 11, 12, 13, and 14, respectively.

The four-phase output signal of the 90 ° phase shift circuit section 1 is input to the 90 ° phase comparator 2. 90 ° phase comparator 2
After passing through the low-pass filter 3, the output of is amplified by the DC component amplifier (DC amplifier) 4. One output terminal 4a of the DC amplifier 4 is connected to a common connection point of the bases of the signal input transistors Tr2 and Tr3, which is one input terminal 9 of the T flip-flop, and the other output terminal 4b is T
It is connected to the common connection point of the bases of the signal input transistors Tr1 and Tr4 which are the other input terminal 10 of the flip-flop. Here, the low pass filter 3 and the DC amplifier 4 form a feedback unit for a feedback loop.

In the 90 ° phase shifter thus constructed,
When the input waveforms A and B have a DC offset at the input terminals 9 and 10 or the input waveform is distorted and the duty ratio is not kept at 50%, a phase shift from 90 ° occurs and a four-phase output occurs. Appear in the signal. The phase shift of the four-phase output signal is detected by being input to the 90 ° phase comparator 2. The output of the 90 ° phase comparator 2 consists of the DC component corresponding to the phase shift from 90 ° and the nth harmonic of the input signal. The output of the 90 ° phase comparator 2 is passed through the low-pass filter 3 to cut the nth harmonic,
Only the DC component is amplified by the DC amplifier 4. The output of the DC amplifier 4 is fed back to the input terminals 9 and 10 of the 90 ° phase shift circuit unit 1 as an input bias so that the 90 ° phase shift is corrected.

As a result, the input waveform is locked when the DC offset is eliminated (or the duty ratio is held at 50%), and the four-phase output signals having an accurate 90 ° phase difference are output terminals 11 and 12. , 13, 14 can be taken out. Thus, in this 90 ° phase shifter,
It has a PLL configuration having a feedback loop by a feedback section and can automatically correct phase fluctuations.

Next, the operation of the 90 ° phase shifter of this embodiment will be described in more detail by taking a concrete signal waveform as an example. Now, at the input terminals (input terminals of the T flip-flop) 9 and 10 of the 90 ° phase shift circuit unit 1, two input waveforms are applied to the DC offset ΔD as shown in the time chart of FIG.
Suppose C1 occurs. These input waveforms having a DC offset are designated as A'and B '. Then, as for the switching time of the signal input transistor of the input stage of the 90 ° phase shift circuit unit 1, the switching time of the transistors Tr1 and Tr4 is T1, and the switching time of the transistors Tr2 and Tr3 is T2.
Then, T1 ≠ T2.

As a result, each output terminal 1 of the 90 ° phase shifter is
0 °, 90 °, 18 obtained from 1, 12, 13, 14
The output signals of 0 ° and 270 ° are a, b, c and d in FIG.
And the delay from the output of a to the output of c is t1,
The delay from the output of c to the output of b is t2. Due to the circuit configuration of the 90 ° phase shift circuit unit 1 including T flip-flops,
Since the outputs of a and b keep the difference of exactly 180 °, t1 ≠
The state of t2 means the deviation from the 90 ° output.

When the signal in this state is input to the 90 ° phase comparator 2, a double wave such as e and f in FIG. 2 and a DC offset ΔDC2 corresponding to the phase shift from 90 ° are generated. Note that such a 90 ° phase comparator 2 can be easily manufactured in an IC (integrated circuit) by a double balanced mixer circuit.

The output of the 90 ° phase comparator 2 is passed through a low pass filter 3 to cut the doubled wave and then amplified by a DC amplifier 4. The output of this DC amplifier 4 is 90 ° in the direction in which the deviation from the 90 ° phase difference is corrected.
Since it is fed back to the input bias of the phase shift circuit unit 1, the input waveforms A and B have no DC offset, that is, ΔD.
It is locked in the state of C1 = 0, T1 = T2, t1 = t2, and .DELTA.DC2 = 0. As a result, the output terminals 11, 12, 13, and 14 of the 90 ° phase shifter are always stable at 0 °,
An output signal having a 90 ° phase difference of 90 °, 180 ° and 270 ° can be obtained.

Next, the waveforms A'and B'shown in FIG. 3A in which the input waveform is distorted and the duty ratio is not 50% are input to the input terminals 9 and 10 of the 90 ° phase shift circuit section 1. The case will be described. When such input waveforms A ′ and B ′ are input, the switching time T3 of the signal input transistors Tr2 and Tr3 and the switching time T4 of the signal input transistors Tr1 and Tr4 become T3 ≠ T4.

Even in such a case, the low-pass filter 3
And the feedback function of the feedback section of the DC amplifier 4 operates, the input waveforms A and B are maintained with the duty ratio of 50%, and the switching times T3 and T4 are T3 = T4. , 13 and 14 can accurately extract signals having a 90 ° phase difference.

In the 90 ° phase shifter shown in FIG. 1, T
Although the 90 ° phase shift circuit unit 1 including a flip-flop is configured by using a bipolar transistor, the 90 ° phase shift circuit unit 1 may be configured by using a field effect transistor (FET).

[0032]

As described above, in the 90 ° phase shifter of the present invention, a 90 ° phase shift circuit section is constructed using T flip-flops, and the 90 ° phase comparator shifts the output phase from 90 °. The phase shift is detected as a DC component by a low-pass filter, amplified by a DC component amplifier, and then fed back to the input end of the 90 ° phase shift circuit in a direction in which the output phase shift can be corrected. , Input signal is D
Even if there are variations in the C offset and the duty ratio, there is an effect that an output signal with an accurate 90 ° phase difference can be obtained.

Further, since the circuit is not formed by using the comparator and the operational amplifier as in the conventional case, the operation does not become unstable at a high frequency. By using a transistor capable of high-speed switching in the T flip-flop, stable operation can be achieved even in a high frequency band.

Therefore, the 90 ° phase shifter according to the present invention is suitable as a high frequency 90 ° phase shifter for a quadrature modulator / demodulator that requires signals with an accurate 90 ° phase difference. Also,
A 90 ° phase shifter according to the present invention comprises a T flip-flop, a 9
Since it can be composed of a 0 ° phase comparator, a low-pass filter and a DC component amplifier, there is also an advantage that the circuit structure is simple.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a 90 ° phase shifter according to the present invention.

FIG. 2 is a time chart showing operation waveforms of the 90 ° phase shifter of FIG.

FIG. 3 is a waveform diagram showing an input signal of the 90 ° phase shifter, where (a) shows a duty ratio of 50 due to distortion of the input waveform.
Shows the state in which the duty ratio of the input waveform is kept at 50% due to the feedback function.

FIG. 4 is a circuit diagram showing a conventional 90 ° phase shifter.

FIG. 5 is a block diagram showing another conventional 90 ° phase shifter.

FIG. 6 is a block diagram showing still another conventional 90 ° phase shifter.

[Explanation of symbols]

 1 90 ° phase shift circuit section 2 90 ° phase comparator 3 low-pass filter 4 DC amplifier 5, 6 input terminal 7, 8 current source 9, 10 input terminal 11, 12, 13, 14 output terminal Tr1 to Tr4 signal input transistor Tr5 To Tr12 dual differential transistor R1 to R4 load resistance Vc DC power supply

Claims (2)

[Claims] 1. A ½ frequency divider that uses a T flip-flop, and an input signal whose duty ratio is kept at 50% and a complementary input signal are input to two input terminals, so that 90 ° A 90 ° phase shift circuit section for extracting the output signal of the phase difference, a 90 ° phase comparator for comparing the output phases of the 90 ° phase shift circuit section, and a 90 ° phase shift circuit section for the output of the 90 ° phase comparator A feedback unit for extracting a DC component corresponding to the phase shift of the output of 90 ° from 90 ° and feeding back this DC component to the input end of the 90 ° phase shift circuit unit so that the phase shift of the output can be corrected. A characteristic 90 ° phase shifter. 2. The 90 ° phase shift according to claim 1, wherein the feedback section comprises a low pass filter for extracting a DC component from the output of the 90 ° phase comparator and a DC component amplifier for amplifying the output of the low pass filter. vessel.