JPH08236580A - Connecting method of ic chip to wiring substrate and micro-ic connector - Google Patents

Connecting method of ic chip to wiring substrate and micro-ic connector

Info

Publication number
JPH08236580A
JPH08236580A JP7061996A JP6199695A JPH08236580A JP H08236580 A JPH08236580 A JP H08236580A JP 7061996 A JP7061996 A JP 7061996A JP 6199695 A JP6199695 A JP 6199695A JP H08236580 A JPH08236580 A JP H08236580A
Authority
JP
Japan
Prior art keywords
chip
terminal
terminals
board
welding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7061996A
Other languages
Japanese (ja)
Inventor
Katsusato Fujiyoshi
克聡 藤好
Masasuke Fujiyoshi
巨介 藤好
Morimichi Fujiyoshi
盛道 藤好
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JUSTY KK
Original Assignee
JUSTY KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JUSTY KK filed Critical JUSTY KK
Priority to JP7061996A priority Critical patent/JPH08236580A/en
Publication of JPH08236580A publication Critical patent/JPH08236580A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To weld-fix terminals and conductor wires firmly without fail by a method wherein at least exceeding one each of conductor wires of one end part of a micro connector is brought into contact with IC chip terminals in the alignment state as well as the conductor wires of the other end part are also brought into contact with the terminals of the wiring substrate in the alignment state for pressure-welding the contact part by welding electrodes. CONSTITUTION: An incidence solder 6 is fixed on a substrate terminal 5 connected respectively to a chip terminal 3 arranged on an IC chip 2 at a narrow pitch as well as another chip terminal 3 of a wiring substrate 4 whereon this chip 2 is fixed. Next, the substrate 4 fitted with a guide pin is fixed to the base plate 16 of a welding jig 15 and simultaneously guide pin 10 is inserted into the guide hole of a semiconductor 8 for making alignment. Furthermore, a welding electrode fitting body 19 lowered so that conductor wires 9 may be pressure-welded onto the solder 6 of the chip 3 and the terminal 5 respectively by welding electrodes 20 and 21. Through these procedures, many conductive wires can be firmly weld-fixed without fail a short time.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はICチップの多ピン狭ピ
ッチで配置された端子と配線基板の端子とを結線するI
Cチップと配線基板の結線方法および該結線に用いるマ
イクロICコネクタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is to connect terminals of a multi-pin IC chip arranged at a narrow pitch to terminals of a wiring board.
The present invention relates to a method for connecting a C chip and a wiring board and a micro IC connector used for the connection.

【0002】[0002]

【従来の技術】従来、ICチップの端子と配線基板の端
子との接続はワイヤーボンディング法で行なうのが一般
に行なわれている。
2. Description of the Related Art Conventionally, the connection between the terminals of an IC chip and the terminals of a wiring board is generally performed by a wire bonding method.

【0003】[0003]

【本発明が解決しようとする課題】従来のワイヤーボン
ディング法では汎用ボンダーの位置検索のキャパは並列
ピッチ間距離が0.2ミリメートル以上であるため、
0.2ミリメートル未満のピッチのステッチボンドはレ
ーザー検索不能となり、高価な特別仕様のオートボンダ
ーが必要になるという欠点があった。また、ボンディン
グ媒体は高耐蝕性、高導電性の信頼性から純金線や純ア
ルミ線が使用されているが、界面接合の為に接合強度が
弱く、外部からの振動で、接合界面の脱離しやすく、コ
スト高になるとともに、狭ピッチで端子数の増大化によ
って配線に時間がかかり、効率のよい配線ができないと
いう欠点があった。
In the conventional wire bonding method, since the position searching capacity of the general-purpose bonder has a distance between parallel pitches of 0.2 mm or more,
A stitch bond having a pitch of less than 0.2 mm cannot be searched by laser, and an expensive special auto bonder is required. Also, as the bonding medium, pure gold wire or pure aluminum wire is used because of its high corrosion resistance and high conductivity, but the bonding strength is weak due to the interface bonding, and the bonding interface is detached due to external vibration. There is a drawback that the wiring is time-consuming due to an increase in the number of terminals with a narrow pitch, and an efficient wiring cannot be performed.

【0004】本発明は以上のような従来の欠点に鑑み、
狭ピッチで端子数が増大化しても、短時間に効率よく結
線することができるとともに、結線の接合強度も十分に
得られるとともに、結線の狭いピッチ化を図ることがで
きるICチップと配線基板の結線方法およびマイクロI
Cコネクタを提供することを目的としている。
In view of the above-mentioned conventional drawbacks, the present invention has been made.
Even if the number of terminals is increased with a narrow pitch, it is possible to efficiently connect the wires in a short time, to obtain a sufficient bonding strength of the wires, and to narrow the pitch of the wires. Connection method and micro I
It is intended to provide a C connector.

【0005】本発明の前記ならびにそのほかの目的と新
規な特徴は次の説明を添付図面と照し合せて読むと、よ
り完全に明らかになるであろう。ただし、図面はもっぱ
ら解説のためのものであって、本発明の範囲を限定する
ものではない。
The above and other objects and novel characteristics of the present invention will become more fully apparent when the following description is read in view of the accompanying drawings. However, the drawings are for explanation only and do not limit the scope of the present invention.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に、本発明は配線基板に取付けられたICチップの狭ピ
ッチで配置された多数個のICチップ端子と、このIC
チップ端子とそれぞれ接続される前記配線基板に所定の
狭ピッチで形成された多数個の基板端子との結線におい
て、前記ICチップ端子と前記基板端子とに少なくとも
1本以上接触するように配置された多数本の導電線、こ
れらの導電線を所定位置に固定する両端部に切断可能に
一体成形された接続部およびこの接続部の両端部を連結
する連結部に形成された位置決め用のガイド孔あるいは
ガイド溝が形成されたマイクロICコネクタを用い、該
マイクロICコネクタの導電線がICチップ端子と基板
端子とに位置決め用のガイド孔あるいはガイド溝で位置
決めする位置決め工程と、この位置決め工程後にICチ
ップ端子に導電線を溶接電極で押し圧して溶接するとと
もに、基板端子に導電線を溶接電極で押し圧して溶接す
る溶接工程と、この溶接工程後にマイクロICコネクタ
の接続部および連結部を切断除去する切断除去工程とで
ICピッチと配線基板の結線方法を構成している。
In order to achieve the above object, the present invention provides a large number of IC chip terminals arranged on a wiring board at a narrow pitch, and IC chips mounted on the wiring board.
At least one or more of the IC chip terminals and the board terminals are arranged in contact with each other in connection with a large number of board terminals formed at a predetermined narrow pitch on the wiring board, which are respectively connected to the chip terminals. A large number of conductive wires, a connecting portion integrally cuttable at both ends for fixing these conductive wires at predetermined positions, and a positioning guide hole formed in a connecting portion for connecting both end portions of this connecting portion, or A positioning step of using a micro IC connector in which a guide groove is formed, and a conductive wire of the micro IC connector is positioned in the IC chip terminal and the substrate terminal by a positioning guide hole or guide groove, and an IC chip terminal after this positioning step. Welding process in which the conductive wire is pressed and welded by the welding electrode and the conductive wire is pressed and welded to the board terminal by the welding electrode. It constitutes a cutting removing step of cutting and removing the connecting portion and connecting portion of the micro IC connector after welding process IC pitch and the connection of a wiring board.

【0007】また、本発明はICチップ端子と基板端子
とに両端部がそれぞれ少なくとも1本以上接続される金
ロウメッキ、半田メッキ、光沢金メッキ等が施された多
数本の導電線と、これらの導電線を所定位置に固定する
両端部に切断可能に一体成形された接続部と、この接続
部の両端部を連結する連結部と、この連結部のほぼ中央
部にそれぞれ形成された位置決め用のガイド孔あるいは
ガイド溝とでマイクロICコネクタを構成している。
Further, according to the present invention, a large number of conductive wires plated with gold brazing, solder plating, bright gold plating, etc., in which at least one or both ends are connected to the IC chip terminal and the board terminal, respectively, and these conductive wires A connecting portion integrally cuttable at both ends for fixing the wire at a predetermined position, a connecting portion for connecting both end portions of the connecting portion, and a positioning guide formed at substantially the center of the connecting portion. The hole or the guide groove constitutes a micro IC connector.

【0008】[0008]

【作用】上記のように構成されたICチップと配線基板
の結線方法は、マイクロICコネクタの一端部の導電線
をICチップの端子に位置決め状態で少なくとも1本以
上接触させるとともに、他端部の導電線を配線基板の端
子に位置決め状態で接触させ、該接触部を溶接電極で押
し圧溶接することにより、端子と導電線を強固で確実に
溶接固定される。
In the method of connecting the IC chip and the wiring board configured as described above, at least one or more conductive wires at one end of the micro IC connector are brought into contact with the terminals of the IC chip in a positioned state, and at the other end The conductive wire is brought into contact with the terminal of the wiring board in a positioned state, and the contact portion is pressed and welded by the welding electrode, whereby the terminal and the conductive wire are firmly and reliably welded and fixed.

【0009】[0009]

【本発明の実施例】以下、図面に示す実施例により、本
発明を詳細に説明する。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in detail below with reference to the embodiments shown in the drawings.

【0010】図1ないし図10の本発明の第1の実施例
において、1はバンブ加工工程で、このバンブ加工工程
1は図2および図3に示すように、ICチップ2に狭ピ
ッチに配置された多数個のICチップ端子3と、このI
Cチップ2が固定されるプリント基板やセラミックス基
板等の配線基板4の前記多数個のICチップ端子3とそ
れぞれ接続される狭ピッチに配置された基板端子5とに
金ロウ、半田等の迎えロウ6をそれぞれ固定するもので
ある。
In the first embodiment of the present invention shown in FIGS. 1 to 10, reference numeral 1 denotes a bumping process, which is arranged on the IC chip 2 at a narrow pitch as shown in FIGS. And a large number of IC chip terminals 3
Gold solder, solder, etc. are applied to the plurality of IC chip terminals 3 of the wiring board 4 such as a printed circuit board or a ceramics board to which the C chip 2 is fixed and the board terminals 5 arranged at a narrow pitch. 6 are fixed respectively.

【0011】7は前記ICチップ2の多数個のICチッ
プ端子3のロウ6と、前記配線基板4の基板端子5のロ
ウ6とを図4に示すように、マイクロICコネクタ8の
導電線9でそれぞれ接続できるように位置決めする位置
決め工程で、この位置決め工程7で使用されるマイクロ
ICコネクタ8は図5に示すように、例えば厚さが25
ミクロンのコバール、42アロイ、燐青銅、洋白等の長
方形状のメタルフレーム材を用いて電子ビーム、エキシ
マレーザ、マシニング、エッチング、精密プレス等で両
端ほぼ中央部に形成された、前記配線基板4に設けたガ
イドピン10、10と係合するガイド孔11、11ある
いは仮想線で示すようにガイド溝11a、11aと、こ
のガイド孔11、11あるいはガイド溝11a、11a
間のメタルフレーム材12に両側部に接続部13、13
を残して形成した前記ICチップ端子3のピッチと同じ
ピッチあるいは数分の1のピッチおよび前記基板端子5
のピッチと同じピッチあるいは数分の1のピッチとなる
ように形成した、例えば最小寸法が30〜40ミクロン
ピッチで配置される多数本の導電線9と、前記メタルフ
レーム材12の外周部に形成された前記接続部13、1
3およびガイド孔11、11形成部を除去するための4
対の切欠部14、14、14、14とからなり、下地と
してニッケルメッキをした後、半田メッキを施したり、
あるいは下地としてニッケルメッキをした後、金メッキ
と錫メッキを施したものが使用されている。
As shown in FIG. 4, a row 6 of a large number of IC chip terminals 3 of the IC chip 2 and a row 6 of the board terminals 5 of the wiring board 4 are electrically conductive wires 9 of a micro IC connector 8. In the positioning step of positioning so that they can be connected to each other, the micro IC connector 8 used in this positioning step 7 has a thickness of, for example, 25 as shown in FIG.
The wiring board 4 is formed in a substantially central portion of both ends by electron beam, excimer laser, machining, etching, precision press or the like using a rectangular metal frame material such as micron Kovar, 42 alloy, phosphor bronze, nickel silver and the like. The guide holes 11 and 11 engaging with the guide pins 10 and 10 provided in the guide holes 11a and 11a and the guide holes 11 and 11 or the guide grooves 11a and 11a.
The metal frame material 12 between the connecting portions 13, 13 on both sides
The same pitch as or a fraction of the pitch of the IC chip terminals 3 and the substrate terminals 5
Formed on the outer peripheral portion of the metal frame member 12 and a large number of conductive wires 9 which are formed to have the same pitch or a fraction of a pitch, for example, the minimum dimension is 30 to 40 μm pitch. The connection parts 13, 1
3 and 4 for removing the guide holes 11 and 11 forming parts
It consists of a pair of notches 14, 14, 14, 14 and is plated with nickel as a base and then soldered.
Alternatively, nickel plating is used as a base, and then gold plating and tin plating are applied.

【0012】前記位置決め工程7では、図6および図7
に示すようにガイドピン10、10を取付けた前記配線
基板4を溶接治具15のベース板16に固定するととも
に、ガイドピン10、10に前記マイクロICコネクタ
8のガイド孔11、11を挿入させる。
In the positioning step 7, FIG. 6 and FIG.
The wiring board 4 having the guide pins 10 and 10 attached thereto is fixed to the base plate 16 of the welding jig 15, and the guide holes 11 and 11 of the micro IC connector 8 are inserted into the guide pins 10 and 10 as shown in FIG. .

【0013】この状態でマイクロICコネクタ8の多数
本の導電線9の一方はICチップ2のICチップ端子3
のロウ6とそれぞれ接触し、導電線9の他方の基板端子
5のロウ6とそれぞれ接触した状態となる。この場合、
ICチップ端子3のピッチと同じピッチに導電線9が形
成されている場合には1本の導電線9が1個のICチッ
プ端子3に接触し、ICチップ端子3のピッチの数分の
1のピッチに導電線9が形成されている場合には複数本
の導電線9が1個のICチップ端子3に接触する状態と
なる。
In this state, one of the many conductive wires 9 of the micro IC connector 8 is connected to the IC chip terminal 3 of the IC chip 2.
Of the conductive wire 9 and the solder 6 of the other substrate terminal 5 of the conductive wire 9 respectively. in this case,
When the conductive wires 9 are formed at the same pitch as the IC chip terminals 3, one conductive wire 9 contacts one IC chip terminal 3 and is a fraction of the pitch of the IC chip terminals 3. When the conductive lines 9 are formed at the pitch of 1, the plurality of conductive lines 9 are in contact with one IC chip terminal 3.

【0014】17は前記位置決め工程7後に行なう溶接
工程で、この溶接工程17は図8に示すように前記ベー
ス板16に立設させた支柱18に上下移動可能に取付け
られた溶接電極取付体19を下降させ、ICチップ端子
3のロウ6に導電線9をそれぞれ溶接電極20で押し圧
するとともに、基板端子5のロウ6に導電線9をそれぞ
れ溶接電極21で押し圧し、電圧を0.002秒間程印
加して250°C〜300°Cに昇温し、溶接する。
Reference numeral 17 denotes a welding step performed after the positioning step 7. This welding step 17 is a welding electrode attachment body 19 which is vertically movably attached to a column 18 standing on the base plate 16 as shown in FIG. And the conductive wires 9 are pressed to the solder 6 of the IC chip terminal 3 by the welding electrodes 20 respectively, and the conductive wires 9 are pressed to the solder 6 of the substrate terminals 5 by the welding electrodes 21, respectively, and the voltage is set to 0.002 seconds. The temperature is increased to 250 ° C. to 300 ° C. and welding is performed.

【0015】22は前記溶接工程17後に溶接固定され
たマイクロICコネクタ8の接続部13、13を、図9
に示すように折り曲げたり、ハサミ、カッターナイフ等
で導電線9部位で切断除去する切断除去工程で、この切
断除去工程22でマイクロICコネクタ8の接続部1
3、13を除去することにより、図10に示すように各
導電線9がICチップ端子3と基板端子5とそれぞれ接
続された状態となる。
Reference numeral 22 designates the connecting portions 13, 13 of the micro IC connector 8 welded and fixed after the welding step 17, as shown in FIG.
In the cutting and removing step of bending or cutting at the conductive wire 9 portion with scissors, a cutter knife or the like as shown in FIG.
By removing 3 and 13, the conductive lines 9 are connected to the IC chip terminal 3 and the substrate terminal 5, respectively, as shown in FIG.

【0016】なお、ICチップ2の他の辺に配置された
ICチップ端子も前述と同様な方法で結線される。ま
た、マイクロICコネクタ8はエレクトロフォーミング
法によって形成したものを使用してもよい。
The IC chip terminals arranged on the other side of the IC chip 2 are also connected by the same method as described above. Further, the micro IC connector 8 may be formed by an electroforming method.

【0017】[0017]

【本発明の異なる実施例】次に図11ないし図22に示
す本発明の異なる実施例につき説明する。なお、これら
の本発明の異なる実施例の説明に当って、前記本発明の
第1の実施例と同一構成部分には同一符号を付して重複
する説明を省略する。
Different Embodiments of the Present Invention Next, different embodiments of the present invention shown in FIGS. 11 to 22 will be described. In the description of these different embodiments of the present invention, the same components as those of the first embodiment of the present invention will be designated by the same reference numerals and redundant description will be omitted.

【0018】図11ないし図13の本発明の第2の実施
例において、前記本発明の第1の実施例と主に異なる点
は、位置決め工程7Aで使用するマイクロICコネクタ
8Aで、このマイクロICコネクタ8Aは絶縁材製のフ
ィルム23の表面にICチップ端子3のピッチと同じピ
ッチでかつ基板端子5のピッチと同じピッチの導電線9
が形成されている。このように形成されたマイクロIC
コネクタ8Aを使用することにより、切断除去工程が不
要、あるいはガイド孔11、11が形成されたフィルム
23の端部だけを切断除去するだけの簡単な切断除去作
業だけで結線作業を行なうことができる。
The second embodiment of the present invention shown in FIGS. 11 to 13 is mainly different from the first embodiment of the present invention in the micro IC connector 8A used in the positioning step 7A. The connector 8A has a conductive wire 9 formed on the surface of the insulating film 23 and having the same pitch as the pitch of the IC chip terminals 3 and the pitch of the board terminals 5.
Are formed. Micro IC formed in this way
By using the connector 8A, the cutting / removing step is unnecessary, or the wiring work can be performed only by a simple cutting / removing work of cutting and removing only the end portion of the film 23 in which the guide holes 11, 11 are formed. .

【0019】図14ないし図16の本発明の第3の実施
例において、前記本発明の第1の実施例と主に異なる点
は、位置決め工程7Bで使用するマイクロICコネクタ
8Bで、このマイクロICコネクタ8Bは接続部13、
13の切断除去を容易に行なえるように導電線9の両端
部と接続部13、13とを該導電線9の寸法よりも小寸
法の切断部24、24を形成している。このように形成
されたマイクロICコネクタ8Bを使用することによ
り、切断除去工程22を楽に行なうことができ、結線作
業をさらに楽に行なうことができる。
The third embodiment of the present invention shown in FIGS. 14 to 16 is mainly different from the first embodiment of the present invention in the micro IC connector 8B used in the positioning step 7B. The connector 8B has a connecting portion 13,
Both ends of the conductive wire 9 and the connecting portions 13, 13 are formed with cut portions 24, 24 having a size smaller than the size of the conductive wire 9 so that the conductive wire 9 can be easily cut and removed. By using the micro IC connector 8B thus formed, the cutting / removing step 22 can be performed easily, and the connection work can be performed more easily.

【0020】図17ないし図19の本発明の第4の実施
例において、前記本発明の第1の実施例と主に異なる点
は、位置決め工程7Cで使用するマイクロICコネクタ
8Cで、このマイクロICコネクタ8CはICチップ端
子3のピッチと基板端子5のピッチが異なる場合でも結
線できるように導電線9の一方をICチップ端子3のピ
ッチと同一ピッチに形成され、導電線9の他方を基板端
子5のピッチと同じピッチとなるように導電線9をメタ
ルフレーム材12に形成している。このように形成され
たマイクロICコネクタ8Cを使用することにより、I
Cチップ端子3のピッチと基板端子5のピッチが異なっ
ても、同様な操作で結線作業を行なうことができる。
The fourth embodiment of the present invention shown in FIGS. 17 to 19 is mainly different from the first embodiment of the present invention in the micro IC connector 8C used in the positioning step 7C. The connector 8C is formed such that one of the conductive wires 9 has the same pitch as the pitch of the IC chip terminals 3 and the other of the conductive wires 9 is a substrate terminal so that the connector 8C can be connected even when the pitch of the IC chip terminals 3 and the pitch of the board terminals 5 are different. The conductive wires 9 are formed on the metal frame material 12 so as to have the same pitch as the pitch of 5. By using the micro IC connector 8C thus formed, I
Even if the pitch of the C chip terminals 3 and the pitch of the substrate terminals 5 are different, the wiring operation can be performed by the same operation.

【0021】図20ないし図22の本発明の第5の実施
例において、前記本発明の第1の実施例と主に異なる点
は、ICチップ2のICチップ端子3に金メッキ、半田
メッキあるいは半田を形成するメッキ加工工程1Aを行
うとともに、配線基板4の基板端子5に金メッキ、半田
メッキあるいは半田を形成したものを用いてマイクロI
Cコネクタ8を用いて位置決め工程7Dを行なうととも
に、半田を端子に形成した場合にはN+Hの場合、
ガス中で溶接工程17Aを行なった点で、このようにし
て結線を行なっても前記本発明の第1の実施例と同様な
作用効果が得られる。
The fifth embodiment of the present invention shown in FIGS. 20 to 22 is mainly different from the first embodiment of the present invention in that the IC chip terminal 3 of the IC chip 2 is gold-plated, solder-plated or soldered. The plating process 1A for forming the substrate is performed, and the substrate terminal 5 of the wiring substrate 4 is plated with gold, solder, or solder is used to form a micro I
When the positioning step 7D is performed using the C connector 8 and N 2 + H 2 is used when solder is formed on the terminals,
Since the welding step 17A is performed in a gas, even if the connection is performed in this manner, the same operational effect as that of the first embodiment of the present invention can be obtained.

【0022】[0022]

【本発明の効果】以上の説明から明らかなように、本発
明にあっては次に列挙する効果が得られる。
As is apparent from the above description, the following effects can be obtained in the present invention.

【0023】(1)配線基板に取付けられたICチップ
の狭ピッチで配置された多数個のICチップ端子と、こ
のICチップ端子とそれぞれ接続される前記配線基板に
所定の狭ピッチで形成された多数個の基板端子との結線
において、前記ICチップ端子と前記基板端子とに少な
くとも1本以上接触するように配置された多数本の導電
線、これらの導電線を所定位置に固定する両端部に切断
可能に一体成形された接続部およびこの接続部の両端部
を連結する連結部に形成された位置決め用のガイド孔あ
るいはガイド溝が形成されたマイクロICコネクタを用
い、該マイクロICコネクタの導電線がICチップ端子
と基板端子とに位置決め用のガイド孔あるいはガイド溝
で位置決めする位置決め工程と、この位置決め工程後に
ICチップ端子に導電線を溶接電極で押し圧して溶接す
るとともに、基板端子に導電線を溶接電極で押し圧して
溶接する溶接工程と、この溶接工程後にマイクロICコ
ネクタの接続部および連結部を切断除去する切断除去工
程とからなるので、狭ピッチで配置されたICチップ側
端子や基板側端子に接続される導電線の両端部に接続部
を設け、多数本の導電線を正確にICチップ側端子と基
板側端子に位置決めし、全体を同時に溶接固定すること
ができる。したがって、多数本の導電線を短時間に結線
することができる。
(1) A large number of IC chip terminals mounted on the wiring board at a narrow pitch and a plurality of IC chip terminals formed on the wiring board connected to the IC chip terminals at a predetermined narrow pitch. In the connection with a large number of board terminals, a large number of conductive wires arranged so as to contact at least one or more of the IC chip terminal and the board terminal, and at both ends for fixing these conductive wires at predetermined positions. A micro IC connector having a connecting portion integrally formed so that it can be cut and a positioning guide hole or guide groove formed in the connecting portion connecting both ends of the connecting portion is used, and a conductive wire of the micro IC connector is used. Positioning step for positioning the IC chip terminal and the board terminal in the positioning guide hole or guide groove, and after the positioning step, A welding step of pressing and welding an electric wire with a welding electrode and a conductive wire to a substrate terminal by a welding electrode, and a cutting and removing step of cutting and removing a connecting portion and a connecting portion of a micro IC connector after this welding step. Therefore, a connecting portion is provided at both ends of the conductive wire connected to the IC chip side terminal and the board side terminal arranged at a narrow pitch, and a large number of conductive wires are accurately connected to the IC chip side terminal and the board side terminal. , And the whole can be welded and fixed at the same time. Therefore, a large number of conductive wires can be connected in a short time.

【0024】(2)前記(1)によって、導電線と端子
とを溶接固定するので、確実に固定され、GHZ帯の超
高周波による微小超振動を受けても、接合部が外れる断
線事故を効率よく防止することができ、商品の信頼性の
向上を図ることができる。
(2) According to the above (1), the conductive wire and the terminal are welded and fixed, so that the wire is securely fixed, and even if a micro super vibration due to a super high frequency of the GHZ band is received, a disconnection accident in which the joint is dislodged is efficient. This can be well prevented, and the reliability of the product can be improved.

【0025】(3)前記(1)によって、ガイドピンに
マイクロICコネクタのガイド孔あるいはガイド溝を挿
入することによって位置決めを図ることができるので、
短時間に正確に導電線を端子部に位置させることがで
き、効率よく結線作業を行なうことができる。
(3) According to the above (1), the positioning can be achieved by inserting the guide hole or the guide groove of the micro IC connector into the guide pin.
The conductive wire can be accurately positioned in the terminal portion in a short time, and the wiring work can be performed efficiently.

【0026】(4)前記(1)によって、狭ピッチで多
配線化を極めて容易に図ることができる。
(4) Due to the above (1), it is possible to extremely easily increase the number of wirings with a narrow pitch.

【0027】(5)請求項2〜6も前記(1)〜(4)
と同様な効果が得られる。
(5) Claims 2 to 6 are also the above (1) to (4).
The same effect can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す工程図。FIG. 1 is a process drawing showing a first embodiment of the present invention.

【図2】ロウを固定した状態の拡大要部側面図。FIG. 2 is an enlarged side view of an essential part with a wax fixed.

【図3】ロウを固定した状態の拡大要部平面図。FIG. 3 is an enlarged plan view of an essential part with a wax fixed.

【図4】位置決め工程の説明図。FIG. 4 is an explanatory diagram of a positioning process.

【図5】マイクロICコネクタの平面図。FIG. 5 is a plan view of a micro IC connector.

【図6】溶接治具に取付けた状態の正面図。FIG. 6 is a front view showing a state where the welding jig is attached.

【図7】溶接治具に取付けた状態の側面図。FIG. 7 is a side view showing a state of being attached to a welding jig.

【図8】溶接工程の説明図。FIG. 8 is an explanatory view of a welding process.

【図9】切断除去工程の説明図。FIG. 9 is an explanatory diagram of a cutting and removing step.

【図10】結線状態を示す正面図。FIG. 10 is a front view showing a connected state.

【図11】本発明の第2の実施例を示す工程図。FIG. 11 is a process drawing showing the second embodiment of the present invention.

【図12】本発明の第2の実施例のマイクロICコネク
タの説明図。
FIG. 12 is an explanatory diagram of a micro IC connector according to a second embodiment of the present invention.

【図13】本発明の第2の実施例の溶接工程の説明図。FIG. 13 is an explanatory diagram of a welding process according to the second embodiment of the present invention.

【図14】本発明の第3の実施例を示す工程図。FIG. 14 is a process drawing showing the third embodiment of the present invention.

【図15】本発明の第3の実施例のマイクロICコネク
タの説明図。
FIG. 15 is an explanatory diagram of a micro IC connector according to a third embodiment of the present invention.

【図16】本発明の第3の実施例の切断除去工程の説明
図。
FIG. 16 is an explanatory diagram of a cutting and removing step according to the third embodiment of the present invention.

【図17】本発明の第4の実施例を示す工程図。FIG. 17 is a process drawing showing the fourth embodiment of the present invention.

【図18】本発明の第4の実施例のマイクロICコネク
タの説明図。
FIG. 18 is an explanatory diagram of a micro IC connector according to a fourth embodiment of the present invention.

【図19】本発明の第4の実施例の結線状態を示す正面
図。
FIG. 19 is a front view showing a connection state of a fourth embodiment of the present invention.

【図20】本発明の第5の実施例を示す工程図。FIG. 20 is a process drawing showing the fifth embodiment of the present invention.

【図21】本発明の第5の実施例の結線する部位の拡大
側面図。
FIG. 21 is an enlarged side view of a connecting portion according to the fifth embodiment of the present invention.

【図22】本発明の第5の実施例の溶接工程の説明図。FIG. 22 is an explanatory diagram of a welding process according to the fifth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1:バンブ加工工程、 1A:メッキ加工工程、 2:ICチップ、 3:ICチップ端子、 4:配線基板、 5:基板端子、 6:ロウ、 7、7A、7B、7C、7D:位置決め工程、 8、8A、8B、8C:マイクロICコネクタ、 9:導電線、 10:ガイドピン、 11:ガイド孔、 12:メタルフレーム材、 13:接続部、 14:切欠部、 15:溶接治具、 16:ベース板、 17、17A:溶接工程、 18:支柱、 19:溶接電極取付体、 20:溶接電極、 21:溶接電極、 22:切断除去工程、 23:フィルム、 24:切断部。 1: Bumping process, 1A: Plating process, 2: IC chip, 3: IC chip terminal, 4: Wiring board, 5: Board terminal, 6: Row, 7, 7A, 7B, 7C, 7D: Positioning process, 8, 8A, 8B, 8C: Micro IC connector, 9: Conductive wire, 10: Guide pin, 11: Guide hole, 12: Metal frame material, 13: Connection part, 14: Notch part, 15: Welding jig, 16 : Base plate, 17, 17A: Welding process, 18: Struts, 19: Welding electrode attachment body, 20: Welding electrode, 21: Welding electrode, 22: Cutting removal process, 23: Film, 24: Cutting part.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 配線基板に取付けられたICチップの狭
ピッチで配置された多数個のICチップ端子と、このI
Cチップ端子とそれぞれ接続される前記配線基板に所定
の狭ピッチで形成された多数個の基板端子との結線にお
いて、前記ICチップ端子と前記基板端子とに少なくと
も1本以上接触するように配置された多数本の導電線、
これらの導電線を所定位置に固定する両端部に切断可能
に一体成形された接続部およびこの接続部の両端部を連
結する連結部に形成された位置決め用のガイド孔あるい
はガイド溝が形成されたマイクロICコネクタを用い、
該マイクロICコネクタの導電線がICチップ端子と基
板端子とに位置決め用のガイド孔あるいはガイド溝で位
置決めする位置決め工程と、この位置決め工程後にIC
チップ端子に導電線を溶接電極で押し圧して溶接すると
ともに、基板端子に導電線を溶接電極で押し圧して溶接
する溶接工程と、この溶接工程後にマイクロICコネク
タの接続部および連結部を切断除去する切断除去工程と
を含むことを特徴とするICチップと配線基板の結線方
法。
1. A large number of IC chip terminals arranged on a wiring board at a narrow pitch, and I
At least one or more of the IC chip terminals and the board terminals are arranged in contact with each other in connection with a large number of board terminals formed at a predetermined narrow pitch on the wiring board, which are respectively connected to the C chip terminals. A large number of conductive wires,
A connecting portion integrally formed to be cuttable at both ends for fixing these conductive wires at predetermined positions and a positioning guide hole or guide groove formed at the connecting portion for connecting both end portions of the connecting portion are formed. Using a micro IC connector,
A positioning step in which the conductive wire of the micro IC connector is positioned in the IC chip terminal and the board terminal by a positioning guide hole or guide groove, and an IC after this positioning step.
Welding process in which the conductive wire is pressed and welded to the chip terminal with the welding electrode, and the conductive wire is pressed and welded to the substrate terminal with the welding electrode, and the connecting portion and the connecting portion of the micro IC connector are cut and removed after this welding step. A method of connecting an IC chip and a wiring board, comprising:
【請求項2】 配線基板に取付けられたICチップの狭
ピッチで配置された多数個のICチップ端子と、このI
Cチップ端子とそれぞれ接続される前記配線基板に所定
の狭ピッチで形成された多数個の基板端子との結線にお
いて、前記ICチップ端子と前記基板端子とに少なくと
も1本以上接触するように配置された多数本の導電線お
よびこれらの導電線を所定位置に固定する両端部に位置
決め用のガイド孔あるいはガイド溝が形成された絶縁材
製のシートで形成されたマイクロICコネクタを用い、
該マイクロICコネクタの導電線がICチップ端子と基
板端子とに位置決め用のガイド孔あるいはガイド溝で位
置決めする位置決め工程と、この位置決め工程後にIC
チップ側端子に導電線を溶接電極で押し圧して溶接する
とともに、基板端子に導電線を溶接電極で押し圧して溶
接する溶接工程とを含むことを特徴とするICチップと
配線基板の結線方法。
2. A plurality of IC chip terminals arranged at a narrow pitch of IC chips mounted on a wiring board, and the IC chip terminals.
At least one or more of the IC chip terminals and the board terminals are arranged in contact with each other in connection with a large number of board terminals formed at a predetermined narrow pitch on the wiring board, which are respectively connected to the C chip terminals. Using a large number of conductive wires and a micro IC connector formed of an insulating material sheet having positioning guide holes or guide grooves formed at both ends for fixing these conductive wires at predetermined positions,
A positioning step in which the conductive wire of the micro IC connector is positioned in the IC chip terminal and the board terminal by a positioning guide hole or guide groove, and an IC after this positioning step.
A method for connecting an IC chip and a wiring board, which comprises a welding step of welding a conductive wire to a chip-side terminal by pressing it with a welding electrode and welding a conductive wire to a board terminal by pressing it with a welding electrode.
【請求項3】 配線基板に取付けられたICチップの狭
ピッチで配置された多数個のICチップ端子と、このI
Cチップ端子とそれぞれ接続される前記配線基板に所定
の狭ピッチで形成された多数個の基板端子との結線にお
いて、前記ICチップ端子と前記基板端子とに金ロウ、
半田等の迎えロウのバンブ加工を施すバンブ加工工程
と、このバンブ加工工程が施された前記ICチップ端子
と前記基板端子とに少なくとも1本以上接触するように
配置された金ロウメッキ、半田メッキ、光沢金メッキ等
が施された多数本の導電線、これらの導電線を所定位置
に固定する両端部に切断可能に一体成形された接続部お
よびこの接続部を連結する連結部に形成された位置決め
用のガイド孔あるいはガイド溝が形成されたマイクロI
Cコネクタを用い、該マイクロICコネクタの導電線が
ICチップ端子のバンブと基板端子のバンブとに位置決
め用のガイド孔あるいはガイド溝で位置決めする位置決
め工程と、この位置決め工程後にICチップ端子のバン
ブに導電線を溶接電極で押し圧して溶接するとともに、
基板端子のバンブに導電線を溶接電極で押し圧して溶接
する溶接工程と、この溶接工程後にマイクロICコネク
タの接続部および連結部を切断除去する切断除去工程と
を含むことを特徴とするICチップと配線基板の結線方
法。
3. A plurality of IC chip terminals arranged at a narrow pitch of IC chips mounted on a wiring board, and the IC chip terminals.
In connection with a large number of board terminals formed at a predetermined narrow pitch on the wiring board, which are respectively connected to C chip terminals, gold solder is connected to the IC chip terminals and the board terminals,
A bumping step of subjecting solder or the like to a bumping step of a solder, and a gold brazing plating, a solder plating, arranged so as to contact at least one or more of the IC chip terminal and the board terminal subjected to the bumping step, A large number of conductive wires that have been plated with bright gold, connecting parts that are integrally molded so that they can be cut at both ends that fix these conductive wires in place, and positioning that is formed on the connecting parts that connect these connecting parts Micro I with guide holes or guide grooves
A positioning step of using the C connector to position the conductive wire of the micro IC connector in the bump of the IC chip terminal and the bump of the board terminal by the positioning guide hole or guide groove, and after the positioning step, the bump of the IC chip terminal While pressing the conductive wire with the welding electrode to weld it,
An IC chip comprising: a welding step of welding a conductive wire to a bump of a substrate terminal by pressing it with a welding electrode; and a cutting and removing step of cutting and removing a connecting portion and a connecting portion of a micro IC connector after the welding step. And wiring board connection method.
【請求項4】 配線基板に取付けられたICチップの狭
ピッチで配置された多数個のICチップ端子と、このI
Cチップ端子とそれぞれ接続される前記配線基板に所定
の狭ピッチで形成された多数個の基板端子との結線にお
いて、前記ICチップ端子と前記基板端子とに金ロウ、
半田等の迎えロウのバンブ加工を施すバンブ加工工程
と、このバンブ加工工程が施された前記ICチップ端子
と前記基板端子とに少なくとも1本以上接触するように
配置された多数本の導電線およびこれらの導電線を所定
位置に固定する両端部に位置決め用のガイド孔あるいは
ガイド溝が形成された絶縁材製のシートで形成されたマ
イクロICコネクタを用い、該マイクロICコネクタの
導電線がICチップ端子と基板端子とに位置決め用のガ
イド孔あるいはガイド溝で位置決めする位置決め工程
と、この位置決め工程後にICチップ側端子に導電線を
溶接電極で押し圧して溶接するとともに、基板端子に導
電線を溶接電極で押し圧して溶接する溶接工程とを含む
ことを特徴とするICチップと配線基板の結線方法。
4. A large number of IC chip terminals arranged at a narrow pitch of IC chips mounted on a wiring board and I
In connection with a large number of board terminals formed at a predetermined narrow pitch on the wiring board, which are respectively connected to C chip terminals, gold solder is connected to the IC chip terminals and the board terminals,
A bumping step of subjecting solder or the like to a bumping step of a solder, and a large number of conductive wires arranged so as to contact at least one or more of the IC chip terminal and the board terminal subjected to the bumping step; A micro IC connector formed of a sheet made of an insulating material in which positioning guide holes or guide grooves are formed at both ends for fixing these conductive wires at predetermined positions is used, and the conductive wires of the micro IC connector are IC chips. A positioning step of positioning the terminal and the board terminal with a positioning guide hole or guide groove, and after this positioning step, the conductive wire is pressed and welded to the IC chip side terminal by a welding electrode, and the conductive wire is welded to the board terminal. A method of connecting an IC chip and a wiring board, which comprises a welding step of welding by pressing with an electrode.
【請求項5】 ICチップ端子と基板端子とに両端部が
それぞれ少なくとも1本以上接続される金ロウメッキ、
半田メッキ、光沢金メッキ等が施された多数本の導電線
と、これらの導電線を所定位置に固定する両端部に切断
可能に一体成形された接続部と、この接続部の両端部を
連結する連結部と、この連結部のほぼ中央部にそれぞれ
形成された位置決め用のガイド孔あるいはガイド溝とか
らなることを特徴とするマイクロICコネクタ。
5. Gold brazing, wherein both ends are connected to at least one IC chip terminal and at least one board terminal, respectively.
A large number of conductive wires that have been plated with solder, bright gold, etc., a connecting portion that is integrally cuttable at both ends that fix these conductive wires in place, and both ends of this connecting portion are connected. A micro IC connector comprising a connecting portion and a positioning guide hole or a guide groove formed in substantially the center of the connecting portion.
【請求項6】 両端部に位置決め用のガイド孔あるいは
ガイド溝が形成された絶縁材製のシートと、この絶縁材
製のシートの位置決め用のガイド孔あるいはガイド溝と
の間にICチップ端子と基板端子とに両端部がそれぞれ
少なくとも1本以上接続されるように配置された多数本
の導電線とからなることを特徴とするマイクロICコネ
クタ。
6. An IC chip terminal is provided between an insulating sheet having positioning guide holes or guide grooves formed at both ends and a positioning guide hole or guide groove of the insulating sheet. A micro IC connector comprising a board terminal and a large number of conductive wires arranged so that at least one or both ends thereof are connected to each other.
JP7061996A 1995-02-24 1995-02-24 Connecting method of ic chip to wiring substrate and micro-ic connector Pending JPH08236580A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7061996A JPH08236580A (en) 1995-02-24 1995-02-24 Connecting method of ic chip to wiring substrate and micro-ic connector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7061996A JPH08236580A (en) 1995-02-24 1995-02-24 Connecting method of ic chip to wiring substrate and micro-ic connector

Publications (1)

Publication Number Publication Date
JPH08236580A true JPH08236580A (en) 1996-09-13

Family

ID=13187334

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7061996A Pending JPH08236580A (en) 1995-02-24 1995-02-24 Connecting method of ic chip to wiring substrate and micro-ic connector

Country Status (1)

Country Link
JP (1) JPH08236580A (en)

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