JPH08227328A - Information processing system - Google Patents

Abstract

PURPOSE: To provide a system capable of automatically masking a reset signal outputted from a communication equipment connected to an information processor without requiring manual operation once the processor is started and preventing a user from feeling uncomfortable. CONSTITUTION: In the information processing system provided with an information processor 101 to 111, 150 to 153 and a communication equipment 120 to 128, 154, 155 connected to the processor, the processor is provided with a reset signal generating part for generating a reset signal to the equipment and the equipment is provided with a reset signal receiving part for receiving the reset signal generated from the reset signal generating part and a detection part for detecting the normal start of the equipment itself. When the detection part detects the normal start of the communication equipment, the equipment is prevented from being reset even when the reset signal is received by the reset signal receiving part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing system capable of resetting hardware or software of an information processing device.

[0002]

2. Description of the Related Art In an information processing apparatus such as a computer, when it is desired to add a function which the information processing apparatus does not have, or when another information processing apparatus having the function is connected, the function is realized as a system. Often done.

For example, a personal computer (hereinafter,
If you want to add a data communication function to your PC)
It has been done to connect the modem board to the expansion bus.

At this time, when the PC is reset, the connected board is usually reset. This is because if the data communication software which may be operating on the PC is reset but the modem board is not reset, the states are different from each other and accurate operation cannot be expected. Also, it means not only the state in software but also the state of individual hardware parts.

Therefore, normally, in order to reset the board in response to the reset of the PC, the reset signal generated in the PC is supplied to the board.

However, the board may not always be reset.

For example, Japanese Patent Application No. 6-264460 (hereinafter referred to as a prior application) describes an information processing apparatus and a circuit switching unit accommodated in the information processing apparatus as an embodiment. As in this example, when the information processing apparatus main body and the part connected to the information processing apparatus operate independently, for example, when the extension terminal and the outside line are in a voice call regardless of the operation of the PC, the PC The circuit switching unit cannot be reset simply by resetting. In other words, the reset of the circuit switching unit causes an inconvenience that the call is interrupted.

Therefore, in order to avoid this inconvenience, the above-mentioned prior application discloses a method of masking a reset signal by data setting from an extension terminal, and a method of masking according to a monitoring result of a usage state of an extension line or an extension line. There is.

[0009]

However, the above conventional example has the following inconveniences.

In the method of masking the reset signal by setting the data from the extension terminal, the circuit switching section is reset by the reset of the PC unless the data is set. Since this is a very dangerous state, it is necessary to set the data for masking from the extension terminal after the circuit switching unit is once started up. This is a very cumbersome operation.

Further, the method of masking the reset signal according to the monitoring result of the usage state of the extension line or the outside line may cause an unpleasant situation for the user. That is, according to the method described above, it is possible to avoid the situation of resetting the circuit switching unit due to the reset of the PC during a call. However, at the moment the extension terminal makes a call or receives a call from an outside line, if the PC is reset when the means for monitoring the usage state of the inside and outside lines has not yet transmitted the monitoring result to the means for outputting the reset signal, The replacement part is reset. As a result, the operation of the user is canceled, which causes discomfort.

Further, even if the inside / outside line is not used,
There is also a drawback due to the loss of temporary data. That is, even if the line switching unit is reset, setting data such as abbreviated dial data for each extension terminal is stored in many switching devices. However, auto repeat (when the other party is talking,
Data such as settings for automatically redialing multiple times), camp-on settings, and designated time call settings are stored as temporary data in many exchange devices, and temporary data is erased by resetting. Therefore, the reset of the PC may cancel the auto-repeat setting set by a certain extension terminal.

Therefore, according to the present invention, after the information processing apparatus is once started up, a reset signal from the information processing apparatus connected to the information processing apparatus can be automatically masked without human intervention, and further the user is uncomfortable. It is an object to provide an information processing device that does not exist.

[0014]

The first invention of the present application is
In an information processing system having a first information processing device and a second information processing device, the first information processing device has a reset signal generating means, and the second information processing device has a reset signal generating means. It has a reset signal receiving means for receiving the generated reset signal and a detecting means for detecting that the second information processing apparatus has normally started up, and the detecting means has normally started up the second information processing apparatus. When this is detected, the second information processing device is not reset even if the reset signal is received by the reset signal receiving means.

According to the second invention of the present application, the second information processing device is reset in order to enable resetting in the second information processing device even after the second information processing device has normally started up. In addition to the configuration of the first aspect of the invention, a reset means for resetting the second information processing device is provided.

[0016]

FIG. 1 is a block diagram showing a configuration example of an information processing system in an embodiment of the present invention. That is,
This figure shows an information processing device (101 to 111, 15) such as a PC.
0 to 153) and the communication devices (120 to 128, 154, 155) connected to the expansion bus thereof.

In FIG. 1, a CPU 101 controls the entire information processing apparatus (first information processing apparatus), and a power supply 102 supplies electric power to the information processing apparatus and the apparatus connected to the expansion bus. To do. The reset circuit 103 supplies a reset signal to an information processing device including the CPU 101 and a device connected to the expansion bus. The bus control unit 104 causes the CPU bus 15 to operate.
0, the internal bus 151, and the expansion bus 153 are controlled.

The CRT 105 is a display unit of the information processing apparatus, and the CRT controller 106 controls the CRT 105. The RTC 107 is a real-time clock that serves as a clock for the information processing device, and the FDC 108
Is a floppy disk controller to which a floppy disk drive (not shown) which is a data input / output device for the information processing apparatus is connected.

A ROM 109 stores a program for operating the CPU 101, and a RAM 110.
Stores temporary data and the like necessary for the CPU 101 to operate. Keyboard interface (i /
f) 111 is connected to a keyboard (not shown) which is an input device for the information processing device, and the expansion bus i / f 120 is an interface between the information processing device and a device connected to the expansion bus. It will be.

The CPU 121 controls the entire communication device (second information processing device), and the reset circuit 12
2 generates a reset signal for resetting the communication device. The reset signal control circuit 123 collectively controls the reset signal from the expansion bus and the reset signal from the reset circuit 122, and the exchange switch 124 exchanges the time slot of the highway 154 and outputs a voice signal from the communication device. It realizes data circuit switching.

The extension i / f 125 is an interface for accommodating a communication terminal, and the external line i / f 126 is an interface for accommodating a network. ROM 127
Indicates a program for operating the CPU 121, and the RAM 128 stores temporary data necessary for the CPU 121 to operate. The telephone 129 is an example of a communication terminal accommodated in the extension i / f 125, and the PSTN 130 is an example of an analog network accommodated in the outer line i / f 126. Also, the internal bus 155
Is a data transmission bus in the communication device, and the highway 154 is a time-division communication path for transmitting voice data and the like.

The communication device receives a call from the telephone 129, analyzes the call destination, and controls an extension call or makes a call to an outside line. It also controls incoming calls. Also, voice data when making a call is put on a highway 154, which is a time-division call path, and the exchange switch 124 controls the exchange between an extension line and an outside line. On the internal bus 155, since the control data in the communication device exchanges with each other irregularly, it is impossible to pass the continuous voice data.
I am using 54. In FIG. 1, the communication device accommodates only one line for each of the telephone 129 and the PSTN 130, but it is possible to accommodate the number required for the system.

FIG. 2 is a block diagram showing an example of the reset signal control circuit 123.

As shown, the reset signal from the expansion bus i / f 120 and the port (PORT) X of the CPU 121
The output signal from the AND circuit 202 is input to the AND circuit 202
The output of the circuit 202 is input to the OR circuit 201 together with the reset signal from the reset circuit 122, and its output is C
It is connected to the RESET terminal of PU121. Also,
Although not shown, the final reset signal output from the OR circuit 201 is also supplied to other components in the communication device.

The operation logic of the circuit is that the reset circuit 122
If the reset signal from the
When the communication device including U121 is reset and the reset signal from the expansion bus i / f120 is supplied,
The communication device is reset only when the output signal of the port X of the CPU 121 is "L".

The operation of the information processing apparatus having such a configuration will be described below.

First, when a power switch (not shown) is turned on, electric power starts to be supplied from the power source 102 to each unit in the information processing apparatus. Immediately after the switch is turned on, the power supply voltage is unstable, and normal operation of each part cannot be expected. Therefore, until a stable voltage is obtained, the reset signal “L” is supplied from the reset circuit 103 having a certain time constant. This time constant is determined in consideration of a time sufficient for the voltage of the power supply 102 to stabilize.

While the reset signal is "L", the CPU 101 cannot operate even if power is supplied. When the reset signal becomes “H” after the time determined from the time constant has elapsed, the CPU 101 and the peripheral circuit to which the reset signal is supplied start operating. This also applies to devices connected to the expansion bus i / f 120.

In this embodiment, immediately after the start of power supply,
Until the reset is released, that is, until the CPU 121 starts to operate, the port X is "L" as the initial state of the CPU 121. At this time, the expansion bus i / f1
Since the reset signal from 20 is "L", A
The output signal of the ND circuit 202 is also "L", that is, active, and the CPU 121 is reset. When the reset signal from the reset circuit 103 is released, the CPU 121 and each unit of the communication device also start operating.

When the operation is started, the CPU 121 first initializes each part of the communication device. ROM 127 and RAM 1
28 check, initial data setting in the RAM 128, initial hook state detection of the telephone 129 at the extension i / f 125, and external line state detection at the external line i / f 126.

As a result of performing these initial operations, if there is no abnormality, the communication device becomes operable and the telephone 129
It becomes a situation in which the outgoing call and the incoming call from the PSTN 130 are accepted. Here, the CPU 121 sets the output to the port X to “H”.

Next, the operation when the reset signal becomes "L" in the information processing apparatus which has normally started up by the above procedure will be described.

When a reset switch (not shown) or a predetermined key on the keyboard is pressed in the information processing apparatus, the information processing apparatus can be reset regardless of whether the power switch is OFF or ON, and the operation is performed from the beginning. You can start over.

For example, in the case of a PC, the CPU 101 sometimes runs out of control and hangs up due to a bug in the running software. In this case, there is no alternative but to reset to return to the normal state, but turning the power switch off and on puts a load on the electric circuit, so the method of pressing the reset switch is often used.

In the method of pressing the reset switch, the power supply voltage does not change, and only the reset signal is supplied from the reset circuit 103. The operation at the time of supply is the same as that at the time of turning on the power supply, and the information processing apparatus restarts the operation from the initial state.

However, in this case, the communication device in this embodiment is not reset. That is, the reset signal “L” from the expansion bus i / f 120 generated by pressing the reset switch is input to the AND circuit 202, but the CPU 1 which is the input of the other AND circuit 202.
This is because the output from the port X of No. 21 is "H" when the CPU 121 normally starts up, and this is held as it is.

Therefore, the output terminal of the AND circuit 202 becomes "H", and the CPU 121 and each part of the communication device are not reset.

After the communication device is normally started up, the telephone 129 is called, the PSTN 130 is called,
All the exchange control accompanying it is performed by the control of the CPU 121 and each part of the communication device, and has no direct relation to the operation of the CPU 101. Further, the CPU 101 may be operating software that is not related to the operation of the communication device.

Therefore, in the communication device, the telephone 129
It is possible that the CPU 101 hangs up while a call is being made, and if the reset signal from the reset circuit 103 is directly supplied to the communication device, communication is performed by pressing the reset switch. The device restarts from the beginning and the call is forcibly disconnected. In addition, C that is not related to the operation of the communication device
It is very inconvenient to forcibly disconnect the call due to a bug in the software running the PU 101.

Therefore, with the above-mentioned configuration, it is possible to avoid forcibly resetting the communication device by pressing the reset switch, so that such an inconvenience does not occur.

However, when an abnormality occurs in the communication device itself, the reset switch of the information processing device does not work, and it is troublesome if there is no means for resetting.

Therefore, a reset switch (not shown) that resets only the communication device is pressed. As a result, the reset signal is supplied from the reset circuit 122,
This is unconditionally supplied to the CPU 121 and each unit of the communication device, and the entire communication device is reset.

In the above first embodiment, the configuration of FIG. 2 is shown as an example of the configuration of the reset signal control circuit 123, but the configuration is not limited to this. In the configuration in FIG. 2, it is determined whether the output signal from the port X of the CPU 121 validates or invalidates the reset signal from the expansion bus i / f120. However, the CPU 121
Some types do not have an I / O port, and even if they have an I / O port, their output signals may be undefined immediately after power is supplied.

In such a case, the configuration shown in FIG. 3 can be used as the configuration of the reset signal control circuit 123. 3, the same members as those in FIG. 2 are indicated by the same numbers.

2 is different from FIG. 2 in that, as the input of the AND circuit 202, the output from the port X of the CPU 121 is input as it is in FIG.
This is the point where the output of 1 is entered. Register 301 and CP
U121 is connected by an internal bus 155 of the communication device.

The operation of the second embodiment will be described below.

Immediately after the power is turned on in the information processing apparatus, "L" is output to the terminal connected to the AND circuit 202 of the register 301. As a result, the expansion bus i / f
The reset signal from 120 becomes valid and the communication device is reset.

After the communication device has normally started up, the CPU 121 is transferred to the register 301 arranged in the I / O space or the memory space of the CPU 121 through the internal bus 155.
Outputs a predetermined value. This value is a value determined by the configurations of the register 301 and a decoding circuit (not shown). When this predetermined value is output from the CPU 121, the register 30
1 outputs an “H” signal to the AND circuit 202.
And hold it. This allows the expansion bus i /
The reset from f120 is not required.

After the communication device is normally started up,
If it is desired to set the reset signal from the expansion bus i / f 120 to be valid, the output signal of the register 301 may be set to "L" when the CPU 121 outputs a predetermined value to the register 301.

If the above operation is performed by a predetermined operation on the telephone 129, the telephone 129
It is also possible to reset the communication device by a combination of the above operation and pressing the reset switch of the information processing device.
If you just want to reset the communication device,
As shown in the first embodiment, it is easier to operate by providing the individual reset switch, but for the cost reduction, the individual reset switch and the reset circuit 12 are provided.
If it is desired to reduce the number 2, it is possible to adopt such a configuration.

Also, the operation of validating the reset signal from the expansion bus i / f 120 can be performed by the configuration shown in FIG. It suffices that the "L" signal is output from the port X simply by a predetermined operation of the telephone 129.

Although the configurations of the reset signal control circuit 123 have been described above with reference to the configurations of FIGS. 2 and 3, the configuration is not limited to these. In short, the AND circuit 2 may be any circuit as long as it performs the operation logic described above.
02 and OR circuit 201 are not limited to such a configuration.

In the above embodiment, the telephone 12 is used as the second information processing apparatus connected to the first information processing apparatus.
9 and the PSTN 130 are described as an example of a communication device, the present invention is a device that operates independently of the information processing device body, and is a device that does not want to be reset at any timing on the information processing device body side. However, it is not limited to the communication device.

[0054]

According to the first aspect of the present invention, after the second information processing apparatus is normally started up, the reset signal from the first information processing apparatus connected to the second information processing apparatus is automatically masked. Therefore, the first information processing apparatus can be reset at an arbitrary timing without affecting the second information processing apparatus. Moreover, there is an effect that no special operation is required.

According to the second aspect of the present invention, since the means for resetting the second information processing apparatus is provided regardless of the first information processing apparatus main body, the second information processing apparatus is Even after the normal startup, the second information processing device can be reset.

[Brief description of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a reset signal control circuit of the above embodiment.

FIG. 3 is a block diagram showing another example of the reset signal control circuit of the above embodiment.

[Explanation of symbols]

 101, 121 ... CPU, 102 ... Power supply, 103, 122 ... Reset circuit, 104 ... Bus control part, 105 ... CRT, 106 ... CRT controller, 107 ... RTC, 108 ... FDC, 109, 127 ... ROM, 110, 128 ... RAM, 111 ... Keyboard i / f, 120 ... Expansion bus i / f, 123 ... Reset signal control circuit, 124 ... Exchange switch, 125 ... Extension line i / f, 126 ... Outer line i / f, 129 ... Telephone, 130 ... PSTN , 150 ... CPU bus, 151, 155 ... Internal bus, 153 ... Expansion bus, 154 ... Highway.

Claims (2)

[Claims] 1. An information processing system having a first information processing device and a second information processing device, wherein the first information processing device has a reset signal generating means for generating a reset signal, The information processing apparatus includes a reset signal receiving means for receiving the reset signal generated by the reset signal generating means, and a detecting means for detecting that the second information processing apparatus has normally started up. Even if the reset signal is received by the reset signal receiving means when the means detects that the second information processing apparatus has normally started up,
An information processing system, wherein the second information processing device is not reset. 2. The information processing system according to claim 1, wherein the second information processing apparatus has a reset unit that resets the second information processing apparatus independently.