JPH0822671A - Digital audio recorder - Google Patents

Abstract

PURPOSE:To obtain a digital audio recorder capable of performing the digital dubbing by freely selecting a 2nd sampling frequency fs2 for recording regardless of a 1st sampling frequency fs1 of an input signal. CONSTITUTION:The 1st sampling frequency fs1 extracted from a digital input demodulating circuit 17 and the 2nd sampling frequency fs2 selected by a recording rate changeover means 24 are inputted to a sample rate converter 18, and the sample rate of input audio data is converted to the 2nd sampling frequency fs2 from the 1st sampling frequency fs1 by the digital calculation. By this procedure, the conversion error and analog noise accompanied with the use of DA/AD converter are eliminated, then the digital dubbing is attained without detriorating the tone quality.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital audio recorder for inputting a digital interface signal for digital recording.

[0002]

2. Description of the Related Art In recent years, BS, CS broadcasting including CD as a soft medium as an audio source have been generalized, and digital audio recorders such as DAT, DCC, MD are becoming popular as recording devices. Digital signals are not easily affected by noise on the transmission path, dust and scratches on the recording medium, so digital technology is often used for signal processing in audio equipment, and it is expected that digitization will continue to progress in the future. It

By the way, an audio signal is originally an analog signal, and in order to be a digital signal, it is necessary to convert an analog value into a digital value at a constant time interval. The reciprocal of this fixed interval time is called the sampling frequency, and the upper limit of the frequency band when returning to an analog signal is determined. For this reason, the sampling frequency is desired to be as high as possible,
Due to the limited capacity of transmission lines and recording media, 32kHz, 44.1kHz, 48kHz are currently available depending on the intended use.
Three types of kHz are commonly used.

However, the presence of a plurality of sampling frequencies is a major obstacle in handling data of different sampling frequencies. For example, the sampling frequency for digital dubbing with a digital audio recorder is based on the sampling frequency clock extracted from the input digital interface signal, and data processing for recording is performed with this clock. Therefore, when recording at a sampling frequency different from the sampling frequency of the input digital interface signal, digital data is once converted into an analog signal by a DA converter and then converted into digital data by an AD converter operating at a different sampling frequency. Must be reconverted and recorded (eg
No. 124967, Japanese Utility Model Laid-Open No. 04-054065).

An example of a conventional digital audio recorder will be described below with reference to the drawings. In FIG. 6, 1 is a digital input terminal for inputting a digital interface signal, 2 is a digital input demodulation circuit for extracting a first sampling frequency fs1 clock and data demodulation from the input signal of the digital input terminal 1, and 3 is a digital input demodulation circuit. A DA converter for converting the audio data of the output of 2 into an analog signal, 4 is a low-pass filter (LPF) for preventing aliasing noise in smoothing and resampling of the output waveform of the DA converter 3, and 5 is a DA passed through the low-pass filter 4. An AD converter for reconverting the analog signal output from the converter 3 into a digital signal, and 6 is a record for adding an error correction / detection code and auxiliary data to the output data of the AD converter 5 and processing the data in the recording format of the recording medium. Signal processing circuit, 7 is described A rotary head block having recording heads 9 and 10 for recording the output of the recording signal processing circuit 6 on a magnetic tape 8 as a medium, and 11 recording for selecting a sampling frequency fs2 used by the AD converter 5 and the recording signal processing circuit 6. A rate switching means, 12 is a system controller that controls each component from the information of the recording rate switching means 11, 13 is a clock generation circuit that generates a sampling frequency fs2 clock, and 14 is a tape drive motor 15 that runs the magnetic tape 8. It is a motor control circuit that controls the rotation of the rotary head block 7.

From the digital interface signal (see the data format in FIG. 4) input to the digital input terminal 1, the digital input demodulation circuit 2 extracts the first sampling frequency fs1 clock, which is the reference of data demodulation, and outputs the audio data as audio data. Information of each bit of V (validity flag), U (user data), C (channel status), and P (parity bit) is demodulated. The demodulated audio data is DA converter 3
Is converted into an analog signal by the DA, and the low pass filter 4 DA
In order to smooth the output waveform of the converter 3 and prevent aliasing noise in resampling, high frequency components are attenuated and reconverted into digital data by the AD converter 5. Regarding the second sampling frequency fs2 clock input to the AD converter 5, the system controller 12 uses the second sampling frequency fs2 information selected by the recording rate switching means 11 to cause the clock generation circuit 1
3 is generated and controlled. The output data of the AD converter 5 is processed by a recording signal processing circuit 6 operating at the same second sampling frequency fs2 clock into a recording format to which error correction / detection codes and auxiliary data are added, and the magnetic recording heads 9 and 10 perform the processing. It is recorded on the magnetic tape 8 which is controlled by the motor control circuit 14 and runs at a constant speed.

[0007]

However, in the above-mentioned conventional configuration, the D used in order to convert digital data into an analog signal once and then convert it into digital data again.
It is recorded as digital data on which the conversion error noise of the A converter and the AD converter, the noise of the analog circuit, and the like are superimposed. The conversion error of the DA / AD converter occurs regardless of the signal level and has a frequency component that is irrelevant to the audio signal, so that there is a problem that the sound quality is deteriorated particularly at a low level. The present invention solves such a conventional problem and provides a digital audio recorder capable of digital dubbing by converting the sampling frequency without returning the digital data to an analog signal.

[0008]

In order to achieve this object, a digital audio recorder of the present invention has a digital input terminal for inputting a digital interface signal, a first sampling frequency fs1 clock extraction from the digital interface input signal, and data extraction. Digital input demodulation circuit for demodulation and second sampling frequency fs2 for recording data from a plurality of sampling frequencies
Recording rate switching means, a system controller for controlling each component from the information of the recording rate switching means, a clock generation circuit for generating the second sampling frequency fs2 clock, and first and second samplings. By inputting the frequencies fs1 and fs2 clocks, the sampling rate of the audio data output from the digital input demodulation circuit is changed to the first sampling frequency fs1.
To a second sampling frequency fs2 for output and a recording signal processing circuit for processing the output data of the sample rate converter into a format for recording on a recording medium.

[0009]

In the digital audio recorder of the present invention, the second sampling frequency fs2 different from the first sampling frequency fs1 of the digital interface input signal is selected by the recording rate switching means, and the sampling rate of the audio data of the digital interface input signal is selected. The first sampling frequency fs1 to the second sampling frequency f are digitally calculated by the sample rate converter.
By converting the data into s2 data, it is possible to perform digital dubbing with very few errors due to data conversion.

[0010]

1 is a block diagram of a digital audio recorder according to an embodiment of the present invention. In FIG.
Reference numeral 16 is a digital input terminal for inputting a digital interface signal, 17 is a digital input demodulation circuit for extracting a first sampling frequency fs1 clock and data demodulation from the digital interface input signal of the digital input terminal 16, and 18 is a first and second By inputting the sampling frequency, the sampling rate of the audio data output from the digital input demodulation circuit 17 is changed from the first sampling frequency fs1 to the second sampling frequency fs2.
A sample rate converter for converting and outputting to a recording medium, a recording signal processing circuit 19 for processing the output data of the sample rate converter 18 into a format for recording on a recording medium, a recording head 22 for recording data on a magnetic tape 21, Rotary head block equipped with 23, 2
Reference numeral 4 is a recording rate switching means for selecting the second sampling frequency fs2 for recording data from a plurality of sampling frequencies, 25 is a system controller for controlling each component from the information of the recording rate switching means 24, 2
6 is a clock generation circuit for generating a second sampling frequency fs2 clock, 27 is a tape drive motor 28 for running the magnetic tape 21, and a rotary head block 20.
Is a motor control circuit for controlling the rotation of the.

FIG. 4 shows a data format 1 of the digital interface signal input to the digital input terminal 16.
This is an example, and of the 32 bits of the L channel (subframe), 20 bits are assigned to audio data, and 1 bit is assigned to each of the validity flag V, user data U, channel status C, and parity bit P.

FIG. 5 is a waveform diagram showing a conversion example of a data waveform at the time of sampling frequency conversion. FIG. 5A shows a state in which an analog signal is converted into a digital signal at the sampling frequency fs1 (a), and the sampling frequency fs1 changes to the sampling frequency. (b) showing a digitally converted state when changed to fs2 is shown.

A digital input demodulation circuit 17 extracts a first sampling frequency fs1 clock from the digital interface signal input to the digital input terminal 16 and demodulates audio data and V, U, C and P bit information. It The demodulated audio data is input to the sample rate converter 18 together with the first sampling frequency fs1 clock. On the other hand, the sampling frequency fs2 selected by the recording rate switching means 24
The clock is generated by the clock generation circuit 26 under the control of the system controller 25 and input to the sample rate converter 18. The sample rate converter 18 uses the first sampling frequency f as shown in the data waveform of FIG.
The sample rate of the input data (a) quantized with the s1 clock is converted into the output data (b) requantized with the second sampling frequency fs2. The data (b) sample rate converted by the sample rate converter 18 is processed by a recording signal processing circuit 19 into a recording format to which error correction / detection codes, auxiliary data, etc. are added, and the magnetic recording heads 22 and 23 perform magnetic tape 21. Recorded in.

Next, a block diagram of another embodiment is shown in FIG. In FIG. 2, reference numeral 29 is a recording mode switching means for selecting a long time mode for doubling the recording time on the magnetic tape 21 as compared with the normal mode. This recording time information is the second sampling frequency of the recording rate switching means 24. It is input to the system controller 25 together with the fs2 information. The other components are the same as those in the block diagram of FIG. The flow of audio data demodulated from the digital interface signal input to the digital input terminal 16 is similar to that in the embodiment of FIG. Here, the setting of the second sampling frequency fs2 performed by the system controller 25 based on the information of the recording mode switching means 29 and the recording rate switching means 24 and control to other components will be described. When the recording mode switching means 29 is set to the normal mode, the system controller 25 generates the second recording sampling frequency fs2 clock for recording set by the recording rate switching means 24 as in the embodiment of FIG. The signal is generated by the circuit 26, and the recording signal processing circuit 19 issues a processing command to make the recording format of the second sampling frequency fs2. On the other hand, when the recording mode switching unit 29 is set to the long time mode, the system controller 25 sets the second sampling frequency fs2 to the lowest length from the plurality of sampling frequencies regardless of the setting information of the recording rate switching unit 24. A clock generation circuit 26 generates a sampling frequency clock of 32 kHz for the time mode, and outputs a processing command for compressing audio data to 12-bit data to the recording signal processing circuit 19. At this time, the bit rate of the audio data processed by the recording signal processing circuit 19 is 32 kHz x 12 bits x 2ch = 768.
It becomes k bits / sec, and the bit rate at 48 kHz is 48 kHz x 16 bits x 2ch = 1536.
Since it is 1/2 for k bits / sec, the motor control circuit 27 is halved for the motor rotation speed so that the recording density of the magnetic tape 21 is the same as the sampling frequency of 48 kHz. Output a control command to enter the long-time recording mode.

As described above, according to the present embodiment, when the digital dubbing by the digital interface signal is performed, the input data is supplied by supplying the first sampling frequency fs1 clock of the input data and the second sampling frequency fs2 clock to be recorded. First sample rate
By providing the sample rate converter 18 for converting the sampling frequency fs1 of the above into the data of the second sampling frequency fs2, the second sampling frequency fs2 to be recorded is freely selected by the recording rate switching means 24 and inputted. Audio data having a sampling frequency fs1 of 1 can be freely converted into data having a second sampling frequency fs2 by digital calculation, and digital dubbing without conversion error is possible. When the recording mode switching means 29 is provided and the long-time recording mode is set, the second sampling frequency fs2 to be recorded is set to 3
By fixing it to 2 kHz and compressing the number of bits of audio data, it is possible to freely perform digital dubbing in long time mode on digital input data of any sampling frequency.

Further, FIG. 3 showing a block diagram of still another embodiment shows a second sampling in which the first sampling frequency fs1 of the input data demodulated by the digital input demodulation circuit 17 is recorded.
Of the sampling frequency fs2 and the output of the comparator 30 are fs1 =
At the time of fs2, the data selector 31 that bypasses the input data to the recording signal processing circuit 19 and switches to the output data of the digital input demodulation circuit 17 and the sampling frequency of the recording signal processing circuit 19 to bypass the first sampling frequency fs1 The components are the same as those in the block diagram of FIG. 2 except that a clock selector 32 for switching to is provided.

In FIG. 3, the first sampling frequency fs1 information of the channel status C bit of the digital data demodulated by the digital demodulation circuit 17 and the second recording are recorded.
If the sampling frequency information of the sampling frequency comparison circuit 30 that compares the sampling frequency fs2 information of the same, the input data of the recording signal processing circuit 19 and the sampling frequency clock are input to the digital input demodulation circuit
7 output data and the first sampling frequency fs1
By providing a bypass data selector 31 and a clock selector 32 that switch to a clock, by bypassing the sample rate converter 18 in a recording mode that does not require sample rate conversion, it is possible to perform digital dubbing without unnecessary sample rate conversion. Can be

[0018]

As described above, according to the present invention, when a digital audio recorder such as a digital audio tape recorder (DAT) performs digital dubbing by digital interface signal input, two kinds of sampling frequency clocks are input. Thus, by incorporating a sample rate converter that converts the sample rate of the input data, the user can freely select the sampling frequency to be recorded regardless of the sampling frequency of the input data. This allows
When creating one work (for example, CD conversion) from sound sources having a plurality of sampling frequencies, it is no longer necessary to temporarily convert it into an analog signal by a conventional DA / AD converter. Conversion errors and analog noise will not be superimposed, and digital dubbing will be possible without any deterioration in sound quality. If you select the long time mode,
For example, since it is automatically converted to a long-time sampling frequency of 32 kHz regardless of the input sampling frequency, even a long-time program such as B mode of BS broadcasting sent at a sampling frequency of 48 kHz is the highest within the characteristics of the long-time mode. You can record quality.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a digital audio recorder according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a digital audio recorder according to a second embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a digital audio recorder according to a third embodiment of the present invention.

FIG. 4 is a data format diagram of a digital interface signal.

FIG. 5 is a waveform diagram showing conversion of a data waveform when converting a sampling frequency.

FIG. 6 is a block diagram showing a configuration of a conventional digital audio recorder.

[Explanation of symbols]

 1 Digital Input Terminal 2 Digital Input Demodulation Circuit 3 DA Converter 4 Low Pass Filter (LPF) 5 AD Converter 6 Recording Signal Processing Circuit 7 Rotary Head Block 8 Magnetic Recording Tape 9 Recording Head 10 Recording Head 11 Recording Rate Switching Means 12 System Controller 13 Clock Generation circuit 14 Motor control circuit 15 Tape drive motor 16 Digital input terminal 17 Digital input demodulation circuit 18 Sample rate converter 19 Recording signal processing circuit 20 Rotary head block 21 Magnetic recording tape 22 Recording head 23 Recording head 24 Recording rate switching means 25 System controller 26 clock generation circuit 27 motor control circuit 28 tape drive motor 29 recording mode switching means 30 sampling frequency comparator 31 data selector 2 clock selector

Claims (3)

[Claims] 1. A digital input terminal for inputting a digital interface signal, a digital input demodulation circuit for extracting a first sampling frequency fs1 clock and data demodulation from the digital interface input signal, and recording data from a plurality of sampling frequencies. Recording rate switching means for selecting the second sampling frequency fs2, a system controller for controlling each component from the information of the recording rate switching means, and a clock generation circuit for generating the second sampling frequency fs2 clock. First and second sampling frequencies fs1 and fs
A sample rate converter for converting the audio data of the digital input demodulation circuit output from the first sampling frequency fs1 to the second sampling frequency fs2 by inputting two clocks and outputting the same, and a recording medium for the output data of the sample rate converter. A recording signal processing circuit for processing into a format for recording to, and selecting the second sampling frequency fs2 to be recorded to change the sampling rate of the audio data of the digital interface signal from the first sampling frequency fs1 to the second sampling frequency fs1. Digital audio recorder that converts to frequency data and digitally dubbs. 2. A recording mode switching means for selecting a recording time on a recording medium is provided, and the information from the recording mode switching means is input to a system controller together with the information of the recording rate switching means, and the recording mode switching means is used for a long time. The digital audio according to claim 1, wherein when the time mode is selected, the second sampling frequency fs2 is set to the lowest frequency of the plurality of sampling frequencies that can be generated by the clock generation circuit regardless of the information of the recording rate switching means. Recorder. 3. A sampling frequency comparator for comparing the first sampling frequency fs1 information and the second sampling frequency fs2 information, and a first sampling frequency fs.
The first sampling frequency f is provided with a clock selector that selects the first and second sampling frequencies fs2, and a data selector that selects the audio output data of the digital input demodulation circuit and the sample rate converter output data.
When the s1 information is equal to the second sampling frequency fs2 information, the clock selector switches the sampling frequency of the recording signal processing circuit to the first sampling frequency, and the data selector switches the audio data input to the demodulation circuit output data. Item 1. A digital audio recorder according to item 1.