JPH08205157A - Method and device for decoding image signal - Google Patents

Abstract

PURPOSE: To obtain a restored image of high picture quality by finding difference values between mutually adjacent pixels in a unit block and between adjacent unit blocks, deciding the difference values on the basis of a specific threshold value, and performing a smoothing process between adjacent unit blocks when a difference value is less than the threshold value. CONSTITUTION: If a specific expression holds when the difference between two pixels supplied from a selecting circuit 22 is less than a specific threshold value of decision circuits 24-26, the values of the two pixels are supplied as noise processed decision data S28-S30 to smoothing circuits 28-30. If the specific expression holds when the difference between the values of two pixels which adjoin to each other across the border line between the front half blocks of the two pixels and the rear half blocks of the two pixels is larger than the specific threshold value with respect to circuits 24-26, noise unprocessed data S31-S33 are supplied to a composing circuit 27. The circuits 28-30 smooth the values of pixels of a block where a block noise is generated to remove the block noise.

Description

Detailed Description of the Invention

[0001]

[Table of Contents] The present invention will be described in the following order. Field of Industrial Application Conventional Technology Problems to be Solved by the Invention Means for Solving the Problems (FIGS. 1 to 14) Actions (FIGS. 1 to 14) Embodiments (1) Configuration of Image Processing Device (FIG. 1) (FIG. 6) (2) Processing procedure of the post-processing unit (FIGS. 7 to 11) (3) Configuration of the post-processing unit when processing in units of 4 × 4 pixels (FIGS. 7 and 8) (4) 2 × Configuration of Post-Processing Unit When Processing in Two-Pixel Unit (FIGS. 7, 8 and 12 to 14) (5) Operation and Effect of Embodiment (FIGS. 7 and 8) (6) Other Embodiments Invention Effect of

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal decoding method and an image signal decoding apparatus, for example, remote transmission of an image signal by a recording medium having a limited transmission capacity and reproduction from a tape recorder / disc recorder or the like. It is suitable to be applied to.

[0003]

2. Description of the Related Art Conventionally, in a so-called image signal transmission system for transmitting an image signal to a remote place such as a video conference system, or an apparatus for recording an image signal into a video tape recorder or a video disc recorder for reproduction. In order to efficiently use the transmission path and the recording medium, the correlation between the digitized image signals is used to efficiently encode the significant information to reduce the transmission information amount and the recording information amount, thereby reducing the transmission efficiency and It is designed to improve recording efficiency. As a coding method using the correlation, for example, a predictive coding method, a discrete cosine transform (DCT (discrete
The orthogonal transform coding method such as te cosine transform)), the sub-band coding method or the wavelet transform method is used in which the image signal is divided into a plurality of components and then quantized and transmitted.

The predictive coding method is easy to implement and suitable for coding with a relatively low compression rate, but if the compression rate is increased, deterioration of image quality is easily detected. Orthogonal transform coding methods such as DCT are widely used because relatively high image quality can be obtained even at a high compression rate. However, mosaic block distortion is noticeable at the boundary of blocks that are processing units of orthogonal transform. Cheap. Also especially DC
T requires a large amount of calculation and requires large-scale hardware.

Further, in the division coding method for band components such as the sub-band coding method and the wavelet transform method, the components are divided by a digital filter which divides into a low-order component and a high-order component, and each component is divided. In the wavelet transform based on the Haar basis, division coding into band components can be transformed in block units, and the device can be realized with an extremely simple configuration.

In the wavelet transform method, component division is recursively performed on low-order side components or low-frequency side components, and the components obtained as a result, that is, each coefficient is encoded according to its characteristics. As a filter for the division and reconstruction, as a filter using a Haar basis, a 1-sample delay circuit, a multiplication circuit, and an addition circuit can be combined in a predetermined pattern and used properly according to various applications. Has been done.

[0007]

By the way, conventionally, as a method of removing noise generated in an image, a method of smoothing a simple window or a method of smoothing by using a low-pass filter in a spatial frequency domain has been proposed. Has been done.
Further, as a method of removing noise of a video signal without damaging important information of an image such as an edge, special processing for selective local averaging or removal of a minute amplitude component is considered.

However, since these methods are processes for removing the noise that is uniformly generated over the entire screen regardless of the image contents, the wavelet conversion method based on the Haar basis as described above is used for each block. When applied in the case of removing the block noise that regularly occurs for each block in the image compressed state, there is a possibility that a part of the image other than the block noise at the block boundary may be removed as noise. In this case, there is a problem that the image deteriorates.

The present invention has been made in consideration of the above points, and an image signal decoding method and a image signal decoding method capable of effectively removing only noise components from a compression-coded image signal to obtain a restored image of high quality. It is intended to propose an image signal decoding device.

[0010]

In order to solve the above problems, the present invention decodes a compressed image signal formed by blocking an input image signal according to a signal component and compression-coding in block units. In the image signal decoding method, a decoding step of decoding a compressed image signal by a method reverse to the compression encoding method to form a decoded image signal, a division step of dividing the decoded image signal into predetermined unit blocks, and a division step. The level fluctuation detection step for detecting whether or not the pixel level in the unit block divided by is changing, and the unit block for which the level fluctuation in the unit block is not detected in the level fluctuation detection step, The difference value between adjacent pixels between adjacent unit blocks is calculated, and the difference value is set to a predetermined threshold value. And Noizuburotsuku determination step determines Noizuburotsuku by threshold determination, so and a smoothing step in which the difference value is subjected to smoothing processing between less than the threshold Atsuta adjacent unit block in Noizuburotsuku determination step.

Further, according to the present invention, in the image signal decoding apparatus 1 for decoding the compressed image signal formed by blocking the input image signal according to the signal component and compression-encoding the block unit, the compressed image signal Is decoded by a method opposite to the compression coding method to obtain a decoded image signal S9.
, A dividing means 20 for dividing the decoded image signal S9 into predetermined unit blocks, and a dividing means 20.
The level fluctuation detecting means 21 for detecting whether or not the pixel level in the unit block divided by is changed, and the unit block for which the level fluctuation detecting means 21 has not detected the level fluctuation in the unit block. Noise block determination means 22, 24 to 26 for determining a noise block by determining a difference value between pixels adjacent to each other between the block and the adjacent unit block, and determining the difference value with a predetermined threshold value, and noise block determination. Smoothing means 28 for performing smoothing processing between adjacent unit blocks whose difference values are less than the threshold value in the means 22 and 24 to 26.
~ 30 and so on.

[0012]

The restored image signal S9 is divided into predetermined unit blocks, and it is detected whether or not the pixel level in the divided unit block is changed, and the level change in the unit block is not detected. Regarding the unit block, the difference value between the adjacent pixels between the unit block and the adjacent unit block is obtained, and the noise block is determined by determining the difference value with a predetermined threshold value, and the difference value is less than the threshold value. Smoothing processing is performed between the adjacent unit blocks. Accordingly, it is possible to prevent a part of the image other than the actual block noise from being removed as block noise, and as a result, it is possible to prevent the distortion of the display image caused by the block noise. Thus, it is possible to effectively remove only the noise component from the compression-coded image signal and obtain a high-quality restored image.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

(1) Structure of Image Processing Device In FIG. 1, reference numeral 1 denotes an image processing device as a whole, which is composed of a recording system 50 and a reproducing system 60, and the recording system 50 compresses and encodes an image signal. The image signal recorded by the reproducing system 60 is decoded and reproduced. First shooting section 2
The image signal S1 captured by the digital image signal S1 is digitally converted by the A / D converter 3 and then digital image signal S2.
Is sent to the wavelet converter 5 of the compression section 4.

The wavelet converter 5 divides the input digital image signal S2 into a high-order side or high-range side component and a low-order side or low-range side component, and both components obtained as a result are The wavelet transform shown in FIG. 2 is performed by recursively repeating the downsampling for thinning out every sample for the low-order side or low-frequency side components.

That is, in FIG. 2, the wavelet converter 5 uses a Haar base as a base, and the image for one frame shown in FIG. 2 (A) is converted into two stages as shown in FIG. 2 (C). 7 blocks LHH, L as shown
It is divided into HL, LLH, LLL, HH, HL, and LH.

An image for one frame consists of 704 pixels in the horizontal direction (X direction) and 480 pixels in the vertical direction (Y direction), and the coordinates of arbitrary pixels of the image before conversion are (i, j).
(0 ≦ i ≦ 703, 0 ≦ j ≦ 479) (FIG. 2
(A)). The converted image is represented for each block. For example, in the case of HH block (i, j) (0≤i≤351,0
≦ j ≦ 239) (FIG. 2B).

First, in the first stage conversion, the value of the pixel at the coordinates (i, j) before conversion in FIG.
j), blocks HH and H after conversion in FIG.
The values of the pixels at the coordinates (i, j) of L, LH, and LL are gHH (i, j), hHL (i, j), and gLH (i, j), respectively.
j) and gLL (i, j),

[Equation 1] The conversion is performed as shown in.

Subsequently, in the second-stage conversion, only the block LL in the conversion result of the first stage is converted, and the coordinates (i,
j) is the pixel value of gLL (i, j), and the converted block LHH, LHL, LLH, LLL in FIG. 2C is the pixel value of the coordinate (i, j) at hLHH (i, j).
j), hLHL (i, j), hLLH (i, j), hL
As LL (i, j), the following equation

[Equation 2] The conversion is performed as shown in.

In FIG. 2B, the blocks HH, HL, and LH other than the block LL are converted with the same values. That is, blocks HH, HL, LH
2B of the respective coordinates (i, j) in FIG. 2B before conversion are gHH (i, j), gHL (i, j), g
LH (i, j), the pixel values after conversion in FIG. 2C are hHH (i, j), hHL (i, j), hLH (i,
j)

(Equation 3) The conversion is performed as shown in.

Incidentally, FIG. 3 shows an example of the wavelet conversion of the wavelet converter 5. That is, the wavelet converter 5 displays an image for one frame (see FIG.
(A)) is converted into two blocks by performing two-step conversion. LHH, LHL, LLH, LLL, HH, HL, L
It is divided into H (FIG. 3 (B)).

The coefficient S3 thus obtained from the wavelet transformer 5 is supplied to the quantizer 6, and the quantizer 6 has the seven blocks LHH, LHL and LL mentioned above.
Predetermined values for H, LLL, HH, HL, and LH (FIG. 2C) may be the same value or different values for each block, and the values may be fixed values or compression ratios or image complexity. It may be a variable value based on
Quantization is performed by rounding off the fractional part or less, and then this is sent to the encoder 7 as a quantization coefficient S4.

The encoder 7 encodes the quantized coefficient S4 by applying Huffman coding, and then sends this to the writing unit 8 as compressed image data S5. The writing unit 8 records the compressed image data S5 supplied from the compression unit 4 on a recording medium 9 such as a magnetic tape or a magneto-optical disk.

The reading unit 10 sends the compressed image data S6 read from the recording medium 9 to the decoder 12 of the decompression unit 11. The decoder 12 decodes the compressed image data S6 output from the reading unit 10, and then sends this to the inverse quantizer 13 as decoded data S7.

The inverse quantizer 13 has the same seven blocks LHH, LHL, LLH, and LL as the value divided by the quantizer 6 based on the decoded data S7.
L, HH, HL, and LH (FIG. 2 (C)) are multiplied and inversely quantized, and then the inverse quantized coefficient S8
Is sent to the inverse wavelet converter 14.

The inverse wavelet transformer 14 inversely transforms the input inverse quantized coefficient S8 and sends it to the post-processor 15 as the restored image data S9 output from the decompressor 11. The inverse wavelet converter 14 up-samples and reconstructs data by inserting "0" between each sample of the low-order side or low-frequency side component and the high-order side or high-frequency side component. By sequentially repeating the operation to the high order side or the high range side, the inverse wavelet conversion shown in FIG. 3 is performed.

That is, in FIG. 4, the inverse wavelet transformer 14 uses the Haar basis as a basis, and
As shown in (A), 7 blocks LHH, LHL, L
The image divided into LH, LLL, HH, HL, LH,
By performing two-step conversion which is the reverse of the case of the wavelet conversion 5, an image for one frame as shown in FIG. 4C is reconstructed.

First, in the first-stage conversion, the pixel values at the coordinates (i, j) of the blocks LHH, LHL, LLH, and LLL in FIG. 4A are converted into h'LHH (i, j),
h'LHL (i, j), h'LLH (i, j), h'L
LL (i, j), the coordinates (i, j) of the converted block LL
The pixel value of j) is g′LL (i, j), and

[Equation 4] The conversion is performed as shown in.

Further, in FIG. 4 (A), the block LH
Blocks HH other than H, LHL, LLH, and LLL,
The same values are output for HL and LH. That is, the coordinates of the blocks HH, HL, and LH (i,
j) the pixel value before conversion is h′HH (i, j), h′H
L (i, j), h′LH (i, j), and the pixel values after conversion in FIG. 4B are g′HH (i, j) and g′HL.
(I, j) and g′LH (i, j)

(Equation 5) The conversion is performed as shown in.

Subsequently, in the second-stage conversion, the entire one-frame image including the conversion result of the first stage is converted, and the blocks HH, HL before conversion in FIG.
Let g ′ be the value of the pixel at coordinates (i, j) of LH and LL
HH (i, j), g'HL (i, j), g'LH (i,
j), g′LL (i, j), and the value of the pixel at the coordinate (i, j) after conversion in FIG. 4C is f ′ (i, j),
The following formula

(Equation 6) The conversion is performed as shown in.

Incidentally, FIG. 5 shows an example of the inverse wavelet transform of the inverse wavelet transformer 14. That is, the seven blocks LH divided by the conversion result of FIG.
After being quantized by dividing each of H, LHL, LLH, LLL, HH, HL, LH by the value 1,
This shows the case where the result of dequantization after the subsequent predetermined processing is input to the inverse wavelet transformer 14.

As a result, the seven divided blocks LHH and L which are the conversion results of the wavelet converter 5 are obtained.
HL, LLH, LLL, HH, HL, and LH are quantized, and the values of blocks LH and HL are all "0". Thus, in the inverse wavelet converter 14, the input result is different from the output result of the wavelet converter 5 and has the same value in a unit of 2 × 2 pixels, so that block noise occurs.

On the other hand, as another example of the inverse wavelet conversion of the inverse wavelet converter 14, as shown in FIG.
7 blocks LH divided by the conversion result of FIG.
After being quantized by dividing each of H, LHL, LLH, LLL, HH, HL, LH by the value 2,
This shows the case where the result of dequantization after the subsequent predetermined processing is input to the inverse wavelet transformer 14.

As a result, the seven blocks LHH, L divided by the conversion result in the wavelet converter 5 are obtained.
HL, LLH, LLL, HH, HL, LH are quantized, and not only blocks LH and HL but also blocks LLH and L
The values of HL are all “0”. Thus, in the inverse wavelet converter 14, the input result is different from the output result of the wavelet converter 5 and has the same value in a unit of 4 × 4 pixels, so that block noise is generated.

As described above, the inverse wavelet converter 1
The restored image data S9 obtained from No. 4 is supplied to the post-processing unit 15, and after the post-processing unit 15 performs the process of removing the block noise included in the restored image data S9, the digital with the block noise removed. The image signal S10 is supplied to the D / A converter 16. D / A converter 1
6 is after analog conversion of the digital image signal S10,
This is supplied to the display unit 17 as the analog image signal S11. As a result, the display unit 17 displays the analog image signal S11.
It is possible to display a moving image based on. As described above, the image processing apparatus 1 can be applied to, for example, a recording and / or reproducing apparatus as a digital camera for moving images.

(2) Processing procedure of post-processing section 15 in FIG. 7 shows the post-processing section as a whole, and the block noise is removed by sequentially performing the processing procedure shown in FIG. There is.
First, the post-processing unit 15 enters the processing procedure from step SP1 shown in FIG. 8 when the restored image data S9 is supplied from the inverse wavelet converter 14 (FIG. 1).

At step SP2, the post-processing section 15 divides the image for one frame based on the restored image data S9 line by line in the vertical (Y-axis) direction (FIG. 9A).
And (B)), and each line is further divided into blocks of 4 pixel units (FIG. 10). After this, the vertical (Y
Block noise removal processing is performed for all blocks in units of 4 pixels divided in the (axis) direction (hereinafter, this processing is referred to as 4-pixel vertical processing), and then the process proceeds to step SP3.

In this step SP3, the post-processing section 1
Reference numeral 5 denotes an image for one frame, which has been subjected to block noise removal processing in the vertical (Y-axis) direction, in the horizontal (X-axis) direction.
After dividing each line, each line is further divided into blocks of 4 pixels. After this, sideways (X axis)
Block noise removal processing is performed on all blocks in units of 4 pixels divided in the direction (hereinafter, this processing is referred to as 4-pixel horizontal processing), and then the process proceeds to step SP4. As a result, it is possible to remove all block noise generated in the unit of 4 × 4 pixels in the image for one frame.

In this step SP4, the post-processing unit 1
5 is an image of one frame, which has been subjected to block noise removal processing in units of 4 × 4 pixels, in the vertical (Y-axis) direction.
After dividing each line (FIGS. 9A and 9B), each line is further divided into blocks of two pixel units (FIG. 11). After this, block noise removal processing is performed on all blocks in 2-pixel units divided in the vertical (Y-axis) direction (hereinafter, this processing is referred to as 2-pixel vertical processing), and then the process proceeds to step SP5. .

Then, in step SP5, the post-processing unit 15 divides the image for one frame into lines in the horizontal (X-axis) direction, and then divides each line into blocks of two pixel units. After this, block noise removal processing is performed for all blocks in 2-pixel units divided in the horizontal (X-axis) direction (hereinafter, this processing is referred to as 2-pixel horizontal processing), and the flow proceeds to step SP6. The processing procedure ends. This makes it possible to remove all block noise generated in units of 2 × 2 pixels in the image for one frame.

(3) Configuration of Post-Processing Unit for Processing in 4 × 4 Pixel Unit The post-processing unit 15 as shown in FIG. 7 is the same as that shown in FIG.
Among these processing procedures, 4 pixel vertical processing and 4 pixel horizontal processing are executed. In the post-processing unit 15, when the division circuit 20 is supplied with the restored image data S9 from the inverse wavelet converter 14 (FIG. 1), an image based on the restored image data S9 is displayed in the vertical (Y-axis) direction or the horizontal (Y-axis) direction. After dividing each line in the (X-axis) direction (FIGS. 9A and 9B), each line is further divided into coordinates (4 × i), (4 × i + 1), (4
× i + 2), (4 × i + 3) (i = 0, 1, 2, ...)
It is divided into blocks of 4 pixels represented by (Fig. 1
0). As a result, the division circuit 20 supplies the pixel data, which is a block in units of 4 pixels, to the detection circuit 21 as 4 pixel data S20.

The detection circuit 21 detects whether or not block noise is generated in blocks of four pixels based on the four-pixel data S20. Here, the coordinates (4 × i), (4
X (i + 1), (4 × i + 2), and (4 × i + 3) correspond to pixel values of f (4 × i) and f (4 × i +), respectively.
1), f (4 × i + 2), f (4 × i + 3)
The following formula

(Equation 7) When is satisfied, that is, when the values of the four pixels are all the same value, block noise occurs.

In the detection circuit 21, when block noise is detected, "1" is assigned to the flag flag (i) representing the detection result of block noise, and when no block noise is detected, the flag flag (i) is set. Substitute "0". The detection circuit 21 determines the coordinates (4 × i), (4 × i + 1) of the 4-pixel data S20 based on the detection result.
The four-pixel first half data S21 consisting of the pixel values f (4 × i), f (4 × i + 1) and the value of flag (i) corresponding to are supplied to the selection circuit 22 and the coordinates (4 × i + 2),
The pixel value f (4 × i + 2) corresponding to (4 × i + 3),
The second half pixel data S22 of four pixels, which is composed of f (4 × i + 3) and the value of flag (i), is supplied to the memory 23.

The memory 23 stores the latter half data S of four pixels.
The pixel value f (4 × i−) supplied one cycle before 22
2), f (4 × i−1) and the flag value flag (i−
1) and are stored in advance. In this state, the memory 23 detects that f (4 × i + 2), f (4 ×) from the detection circuit 21.
When the 4 pixel second half data S22 having the values of i + 3) and flag (i) is supplied, f (4 × i−2), f (4 ×)
The second half pixel data S23 of 4 pixels having the values of i-1) and flag (i-1) is supplied to the selection circuit 22, and f (4
Xi + 2), f (4xi + 3) and flag (i) are newly stored as the 4 pixel second half data S22.

The selection circuit 22 uses the four-pixel first half data S21.
And the flag value fla based on the 4 pixel second half data S23
The four pixel values f (4 × i−2) and f respectively supplied from the detection circuit 21 and the memory 23 according to the four combinations represented by g (i−1) and flag (i).
(4 × i−1), f (4 × i), and f (4 × i + 1) are supplied to one of the determination circuits 24 to 26 or the synthesis circuit 27.

That is, the selection circuit 22 uses flag (i-
When 1) = 1 and flag (i) = 1, the value f of 4 pixels
(4 × i−2), f (4 × i−1), f (4 × i), f
The pixel data S24 of (4 × i + 1) is determined by the determination circuit 24.
Supply to. Also, flag (i-1) = 1 and flag
When (i) = 0, four pixel values f (4 × i−2), f
The pixel data S25 consisting of (4 × i−1), f (4 × i), and f (4 × i + 1) is supplied to the determination circuit 25. Also f
When lag (i-1) = 0 and flag (i) = 1,
Values of four pixels f (4 × i−2), f (4 × i−1), f
Pixel data S26 composed of (4 × i) and f (4 × i + 1)
Is supplied to the determination circuit 26. Furthermore, flag (i-1)
= 0 and flag (i) = 0, that is, when there is no block noise in two adjacent blocks, it is not necessary to perform block noise removal processing, and therefore the value f (4 Xi-2), f (4xi-
The pixel data S27 consisting of 1), f (4 × i), and f (4 × i + 1) is supplied to the synthesis circuit 27.

Here, among the blocks of 4 pixel units in which block noise is detected by the detection circuit 21, in the image data S24 to S26, the values of the pixels forming the block change stepwise at the block boundary. A part of the image may be detected as block noise.

For this reason, the decision circuits 24 to 26 process each block of 4 pixel units in which block noise based on the image data S24 to S26 is detected as block noise or block without processing as block noise. Is processed as a part of the image in which the value of the pixel forming is changing stepwise at the block boundary.

That is, 4 supplied from the selection circuit 22.
Pixel values f (4xi-2), f (4xi-1), f (4
Xi) and f (4xi + 1), f (4xi-1) and f (4xi) have coordinates (4xi-2) and (4xi-).
A boundary line between a block including 1) (hereinafter referred to as a 4 pixel first half block) and a block including coordinates (4 × i) and (4 × i + 1) (hereinafter referred to as a 4 pixel latter half block). It is the value of two pixels adjacent to each other. At this time, the difference between the f (4 × i−1) and f (4 × i) is determined by the predetermined threshold value T4a˜for each of the determination circuits 24-26.
When the value is smaller than T4c, that is,

(Equation 8) When the above condition is satisfied, the determination circuit 24 determines that the values of both the 4th pixel first half block and the 4th pixel second half block are to be processed as block noise. Further, the decision circuit 25 decides that the pixel value of the first half block of 4 pixels is processed as block noise. Further, the decision circuit 26 decides that the pixel values of the 4th half pixel block are processed as block noise.

The result determination circuits 24 to 26 have four pixel values f (4 × i−2), f (4 × i−1), and f (4 ×).
i) and f (4 × i + 1) are supplied to the smoothing circuits 28 to 30 as noise processing determination data S28 to S30, respectively.

On the other hand, the 4 pixel first half block and 4 pixel
The difference between the values f (4 × i−1) and f (4 × i) of two pixels that are adjacent to each other across the boundary of the latter half of the blocks is a predetermined threshold value T4a to T4 for each of the determination circuits 24 to 26.
When the value is greater than or equal to c, that is,

[Equation 9] When the above condition holds, it is determined that the 4 pixel first half block and the 4 pixel latter half block are part of the image in which the pixel values are changed stepwise at the block boundary, that is, are not processed as block noise. As a result, the determination circuits 24 to 26 have four pixel values f (4 × i−2) and f (4 ×).
i-1), f (4 × i), and noise unprocessed data S31 to S33 composed of f (4 × i + 1), respectively.
Supply to.

Here, the smoothing circuits 28 to 30 are designed to remove the block noise by smoothing the values of the pixels of the block where the block noise is generated. Since the smoothing circuit 28 generates block noise in both the 4 pixel first half block and the 4 pixel latter half block, the supplied noise processing determination data S
4 pixel values f (4 × i−2), f (4 × i)
−1), f (4 × i), f (4 × i + 1)

[Equation 10] After performing the conversion based on, the values of four pixels f ′ (4 × i−2), f ′ (4 × i−1), and f ′ (4 ×) after the conversion are performed.
i) and f ′ (4 × i + 1) are supplied to the synthesizing circuit 27 as smoothed data S34.

In the smoothing circuit 29, block noise is generated in the 4 pixel first half block, but no block noise is generated in the 4 pixel latter half block. Therefore, the supplied noise processing determination data S29 is obtained. Based 4
For the pixel values at coordinates (4 × i-2) and (4 × i-1) that form the first half block of the pixel,

[Equation 11] Conversion based on. Subsequently, the smoothing circuit 29 outputs the value f ′ (4 × 4 × 4) of the two pixels constituting the converted first half block of the four pixels.
i−2) and f ′ (4 × i−1), and the value f (4 × 4) of the two pixels that make up the latter half block of the four pixels that has not been converted.
The values of i) and f (4 × i + 1) in total of 4 pixels are supplied to the synthesizing circuit 27 as the smoothed data S35.

In the smoothing circuit 30, the block noise is generated in the 4 pixel latter half block, but the block noise is not generated in the 4 pixel first half block. Therefore, the supplied noise processing judgment data S30 is included. Based 4
Coordinates (4xi) and (4x
i + 1) pixel value

(Equation 12) Convert by. Then, the smoothing circuit 30 outputs the value f ′ (4 ×
i) and f ′ (4 × i + 1) and no conversion 4
The value f (4 × i− of the two pixels forming the first half block of the pixel
2) and f (4 × i−1) in total of 4 pixels are supplied to the synthesizing circuit 27 as the smoothed data S36.

The synthesizing circuit 27 uses the smoothed data S34 to S34.
On the basis of 36, all the values supplied for each block in units of 4 pixels are combined to perform the process of forming an image of one frame, and then the digital image signal S10 from which the block noise is removed is obtained. D / A converter 16
(Fig. 1).

(4) Configuration of Post-Processing Unit for Processing in 2 × 2 Pixel Unit Here, the post-processing unit 15 as shown in FIG.
The 2-pixel vertical processing and the 2-pixel horizontal processing are executed in the processing procedure.

In the post-processing section 15, when the division circuit 20 is supplied with the restored image data S9 from the inverse wavelet converter 14 (FIG. 1), an image based on the restored image data S9 is displayed in the vertical (Y-axis) direction. Alternatively, after dividing each line in the lateral (X-axis) direction (FIGS. 9A and 9B), the respective lines are further coordinated (2 × i) and (2 × i + 1), respectively.
It is divided into blocks of two pixels represented by (i = 0, 1, 2, ...) (FIG. 11). As a result, the division circuit 20 supplies the pixel data composed of the block of the unit of 2 pixels to the detection circuit 21 as the 2 pixel data S20.

The detection circuit 21 detects whether or not block noise is generated in blocks of two pixels based on the two pixel data S20. Here, the coordinates (2 × i), (2
The pixel value corresponding to × i + 1) is set to f (2 ×
i) and f (2 × i + 1),

(Equation 13) When is satisfied, that is, when the values of the two pixels are all the same value, block noise occurs.

In the detection circuit 21, when block noise is detected, "1" is assigned to the flag flag (i) representing the detection result of block noise, and when no block noise is detected, the flag flag (i) is set. Substitute "0". The detection circuit 21 determines, based on the detection result, the 2-pixel first half data S21 including the value f (2 × i) of the pixel corresponding to the coordinate (2 × i) and the value of the flag (i) in the 2-pixel data S20. Is supplied to the selection circuit 22, and at the same time, the second half pixel data S22 of two pixels, which is the value f (2 × i + 1) of the pixel corresponding to the coordinate (2 × i + 1) and the value of flag (i), is supplied to the memory 23.

The memory 23 stores the latter half data S of the two pixels.
The pixel value f (2 × i−) supplied one cycle before 22.
1) and the flag value flag (i-1) are stored in advance. In this state, the memory 23 is
To f (2 × i + 1) and the value of flag (i) from 2
When the second half pixel data S22 is supplied, f (2 × i−
1) and flag (i-1), which is the second half pixel data S23 of the two pixels, is supplied to the selection circuit 22, and at the same time, f (2 × i
The second pixel second half data S22 having the values of +1) and flag (i) is newly stored.

The selection circuit 22 uses the two-pixel first half data S21.
And a flag value fla based on the second pixel second half data S23
The values f (2 × i−1) and f of two pixels respectively supplied from the detection circuit 21 and the memory 23 according to the four combinations represented by g (i−1) and flag (i).
(2 × i) is supplied to either one of the determination circuits 24-26 or the synthesis circuit 27.

That is, the selection circuit 22 uses flag (i-
When 1) = 1 and flag (i) = 1, the value f of two pixels
Pixel data S2 composed of (2 × i−1) and f (2 × i)
4 is supplied to the determination circuit 24. Also flag (i-1)
= 1 and flag (i) = 0, the value f (2
The pixel data S25 composed of xi-1) and f (2xi) is supplied to the determination circuit 25. Also, flag (i-1) = 0
When flag (i) = 1, the value of two pixels f (2 × i
The pixel data S26 composed of −1) and f (2 × i) is supplied to the determination circuit 26. Further, when flag (i-1) = 0 and flag (i) = 0, that is, when no block noise is generated in any two adjacent blocks, it is not necessary to perform block noise removal processing.
Pixel data S27 having values f (2 × i−1) and f (2 × i) of two pixels is supplied to the synthesis circuit 27.

Here, among the blocks of 4 pixel units in which block noise is detected by the detection circuit 21, in the image data S24 to S26, the values of the pixels forming the block change stepwise at the block boundary. A part of the existing image may be detected as block noise.

For this reason, the decision circuits 24 to 26 process each block of 2 pixel unit in which block noise is detected based on the image data S24 to S26 as block noise or block without processing as block noise. Is processed as a part of the image in which the value of the pixel forming is changing stepwise at the block boundary.

That is, 2 supplied from the selection circuit 22.
Of the pixel values f (2 × i−1) and f (2 × i), f
(2 × i−1) is a block composed of coordinates (2 × i−1) (hereinafter, this is referred to as a 2 pixel first half block),
A block composed of coordinates (2 × i)
It is a value of two pixels adjacent to each other with a boundary line between the pixel latter half block). At that time, the f (2 × i−1)
And f (2 × i) are smaller than the predetermined threshold values T2a to T2c for each of the determination circuits 24 to 26, that is,

[Equation 14] When the above condition is satisfied, the determination circuit 24 determines that the values of both pixels of the first half block of the second pixel and the second half block of the second pixel are processed as block noise. Further, the decision circuit 25 decides that the pixel values of the first two blocks of two pixels are processed as block noise. Further, the decision circuit 26 decides that the pixel values of the second-half block of the second pixel are processed as block noise.

The result judging circuits 24 to 26 use the values f (2 × i−1) and f (2 × i) of the two pixels as the noise processing judging data S28 to S30, respectively, and the smoothing circuit 28 to
Supply to 30.

On the other hand, the 2 pixel first half block and 2 pixel
The difference between the values f (2 × i−1) and f (2 × i) of two pixels adjacent to each other across the boundary line of the latter half of the pixel blocks is predetermined thresholds T2a to T2 for each of the determination circuits 24 to 26.
When the value is greater than or equal to c, that is,

(Equation 15) When the above condition is satisfied, it is determined that the two-pixel first half block and the two-pixel second half block are part of the image in which the pixel value changes stepwise at the block boundary, that is, are not processed as block noise. As a result, the determination circuits 24 to 26 have two pixel values f (2 × i−1) and f (2
The noise unprocessed data S31 to S33 represented by xi) are supplied to the synthesis circuit 27, respectively.

Here, the smoothing circuits 28 to 30 are adapted to remove the block noise by smoothing the values of the pixels of the block where the block noise is generated. Since the smoothing circuit 28 generates block noise in both the first half block of the second pixel and the second half block of the second pixel, the supplied noise processing determination data S
2 pixel values f (2 × i−1) and f (2 ×
For i)

[Equation 16] After performing the conversion based on, the values f ′ (2 × i−1) and f ′ (2 × i) of the converted two pixels are supplied to the synthesizing circuit 27 as the smoothed data S34.

In the smoothing circuit 29, block noise is generated in the first half block of the two pixels, but no block noise is generated in the latter half block of the two pixels, so that the supplied noise processing determination data S29 is obtained. Based on 2
For the value of the pixel at the coordinates (2 × i−1) that make up the first half block of the pixel,

[Equation 17] Conversion based on. Then, the smoothing circuit 29 outputs the value f ′ (2 × i) of the pixels forming the first half block of the converted two pixels.
−1) and the value f (2 × i) of the pixels forming the second pixel second half block that has not been converted are supplied to the synthesizing circuit 27 as smoothed data S35.

In the smoothing circuit 30, since block noise is generated in the latter half block of the two pixels, but no block noise is generated in the first half block of the two pixels, the supplied noise processing determination data S30 is obtained. Based on 2
For the value of the pixel at the coordinates (2 × i) that make up the latter half block of the pixel,

(Equation 18) Convert by. Subsequently, the smoothing circuit 30 outputs the value f ′ (2 × i) of the pixels forming the second half block of the converted two pixels.
Then, the value of 2 pixels in total of the values f (2 × i−1) of the pixels forming the first half block of 2 pixels which has not been converted is supplied to the synthesizing circuit 27 as the smoothed data S36.

The synthesis circuit 27 uses the smoothed data S34 to S34.
On the basis of 36, all the values supplied for each block in units of 2 pixels are combined to perform the process of forming the image of one frame, and then the digital image signal S10 from which the block noise is removed is obtained. D / A converter 16
(Fig. 1).

Here, in FIGS. 12 to 14, an example in which the value of the pixel in each step S1 to S6 by the processing of the post-processing unit 15 changes according to the processing procedure is shown in FIGS.
Shown in When the pixel values shown in FIG. 12A are input to the 4-pixel vertical processing, the pixel values shown in FIG. 12B are obtained, and subsequently, the pixel values output from the 4-pixel vertical processing are 4 pixels. When input to the horizontal processing, the pixel values shown in FIG.

Further, when the pixel value output from the 4-pixel horizontal processing is input to the 2-pixel vertical processing, the pixel value shown in FIG. 13B is obtained, and subsequently the pixel value is output from the 2-pixel vertical processing. When the pixel value is input to the two-pixel horizontal processing, as shown in FIG.
It is output as the pixel value shown in. However, in this case,
In the determination circuits 24 to 26 shown in FIG. 7, the values of the predetermined thresholds T4a to T4c and T2a to T2c set for determination when processing as block noise are all 20.
The values below the decimal point calculated in steps S1 to S6 are rounded down.

(5) Operation and effect of the embodiment With the above-mentioned configuration, the image signal output from the image pickup section 2 is divided into predetermined blocks in the compression section 4, and the Haar basis is used for each block. After the image is compressed by the wavelet conversion, it is recorded on the recording medium 9 as compressed image data. Thereafter, the compressed image data reproduced from the recording medium 9 is decompressed by the decompression unit 11 and decompressed, and then the post-processing unit 1 decompresses the decompressed image data.
5 is supplied.

When the post-processing unit 15 performs the 4-pixel vertical processing on the image for one frame based on the restored image data,
A block in units of 4 pixels is divided into a 4 pixel first half block and a 4 pixel latter half block, and block noise is detected for each. After this, 1 from the 4 pixel first half block
By comparing the values of two pixels that are adjacent to each other with a boundary line between the 4 pixel first half block before the cycle and the 4 pixel latter half block at the present time, based on the comparison result, the 4 pixel first half block and / or 4 pixel It is determined whether each of the latter half blocks is processed as an actual block noise or as a part of an image formed in a step shape at a block boundary other than the actual block noise.

As a result, the post-processing unit 15 smoothes and removes only the actual block noise based on the result of the determination, thereby removing even a part of the image that changes stepwise as block noise. This can prevent the distortion of the display image caused by the block noise. After performing the 4-pixel vertical processing in this manner, subsequently performing the 4-pixel horizontal processing in the same manner, it is possible to remove all block noise generated in the unit of 4 × 4 pixels in the image for the one frame.

Further, the post-processing section 15 performs the 2-pixel vertical processing and the subsequent 2-pixel horizontal processing on the image subjected to the 4-pixel vertical processing and the subsequent 4-pixel horizontal processing, similarly to the above-mentioned processing. As a result, all block noises generated in the unit of 2 × 2 pixels in the image for one frame can be removed.

In this way, the post-processing unit 15 forms the image data from which the block noise is removed into one frame image, and then sends it to the display unit 17, so that the display unit 17 causes the block noise. It is possible to prevent the distortion of the displayed image that occurs.

According to the above configuration, when the image data compressed by the predetermined block unit is restored by the wavelet transform using the Haar basis, the image data for one frame based on the image data is predetermined. The block noise that occurs for each block of is processed as the actual block noise or as a part of the image other than the actual block noise. On the basis of,
It is possible to prevent a part of the image other than the actual block noise from being removed as block noise, and as a result, it is possible to prevent the distortion of the display image caused by the block noise. Thus, it is possible to effectively remove only the noise component from the compression-coded image signal and obtain a high-quality restored image.

(6) Other Embodiments In the above-described embodiments, the wavelet converter 5 shown in FIG. 1 has been described for performing the second stage wavelet conversion, but the present invention is not limited to this. , And then continue the third stage wavelet conversion to block LLL.
(FIG. 2 (C)) may be performed, and further conversion may be performed. In this case, if the conversion is further repeated for the block LLL, block-like noise such as 8 × 8 pixels or 16 × 16 pixels may occur due to the quantization. In SP1, processing of 8 pixels is performed in advance before processing of 4 pixels, or processing of 16 pixels is further performed before that.

In the above-described embodiment, the case where the wavelet converter 5 for performing wavelet conversion using the Haar basis is used as shown in FIG. 1 has been described, but the present invention is not limited to this, and the block is not limited thereto. As long as the compression coding is performed in units, it can be widely applied to the case of applying the component division coding such as the subband coding method or the case of applying the block orthogonal transform coding such as the DCT. By doing so, it is possible to prevent the display image from being distorted due to block noise as in the above-described embodiment.

Further, in the above-described embodiment, in executing the processing for removing the block noise in the post-processing section 15 shown in FIG. 8, after performing the 4-pixel vertical processing, the 4-pixel horizontal processing is subsequently performed. Although the case of performing the processing has been described, the present invention is not limited to this, and the 4-pixel horizontal processing may be performed first, followed by the 4-pixel vertical processing. Similarly, although the case where the 2-pixel vertical processing is performed and then the 2-pixel horizontal processing is subsequently performed is described, the present invention is not limited to this. May be performed.

Further, in the above-described embodiment, in executing the processing for removing the block noise in the post-processing section 15 shown in FIG. 8, after the processing in units of 4 × 4 pixels is performed, 2 × is subsequently performed. The case where the processing is performed in units of 2 pixels has been described, but the present invention is not limited to this, and the processing in units of 4 × 4 pixels may be performed independently, or 2 × 2.
The pixel unit processing may be performed independently.

Further, in the above-described embodiment, the case where the post-processing section 15 shown in FIG. 7 is sequentially fed back in executing the processing procedure in FIG. 8 has been described, but the present invention is not limited to this. The invention is not limited to this, and the present invention can be applied to a case where four post-processing units 15 shown in FIG. 7 are connected in series to perform sequential processing.

Further, in the above-described embodiment, the quantizer 6 shown in FIG. 1 has seven blocks divided by performing a two-step conversion on an image for one frame,
The case of performing the quantization by dividing each by a predetermined value and discarding the fractional part has been described, but the present invention is not limited to this, and the quantization may be performed by a non-linear quantization or the like. . In this case, the inverse quantizer 13 also needs to perform inverse quantization corresponding to the quantization method of the quantizer 6.

Further, in the above-described embodiment, the case where the encoder 6 shown in FIG. 1 applies Huffman coding to perform coding has been described, but the present invention is not limited to this and, for example, Huffman coding is used. A method such as variable length coding in which zero rungless coding is combined may be applied. In this case, the decoder 12 also needs to perform decoding corresponding to the encoding method of the encoder 6.

Further, in the above-mentioned embodiment, the smoothing circuits 28 to 30 of the post-processing unit 15 shown in FIG. 7 are applied to the above-mentioned predetermined conversion formula to perform the smoothing process. As described above, the present invention is not limited to this, and can be widely applied to various smoothing circuits as long as block noise can be removed.

[0088]

As described above, according to the present invention, the restored image signal is divided into predetermined unit blocks, and it is detected whether or not the pixel level in the divided unit blocks changes. For a unit block for which no level fluctuation in the unit block has been detected, the difference value between adjacent pixels between the unit block and the adjacent unit block is calculated, and the noise block is determined by thresholding the difference value with a predetermined threshold value. Then, the smoothing process is performed between the adjacent unit blocks whose difference value is less than the threshold value. Accordingly, it is possible to prevent a part of the image other than the actual block noise from being removed as block noise, and as a result, it is possible to prevent the distortion of the display image caused by the block noise. Thus, it is possible to realize an image signal decoding method and an image signal decoding device that can effectively remove only noise components from a compression-coded image signal to obtain a high-quality restored image.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of an image processing apparatus according to the present invention.

FIG. 2 is a schematic diagram for explaining division by two-stage wavelet conversion.

FIG. 3 is a schematic diagram showing an example of division by two-stage wavelet transform.

FIG. 4 is a schematic diagram for explaining division by two-stage inverse wavelet transform.

FIG. 5 is a schematic diagram showing an example of division by two-step inverse wavelet transform.

FIG. 6 is a schematic diagram showing another embodiment of division by a two-step inverse wavelet transform.

7 is a block diagram showing a configuration of a post-processing unit of the image processing apparatus of FIG.

FIG. 8 is a flow chart showing a processing procedure of a post-processing unit in the present invention.

FIG. 9 is a schematic diagram for explaining a processing procedure of a post-processing unit.

FIG. 10 is a schematic diagram used to describe a processing procedure of a post-processing unit.

FIG. 11 is a schematic diagram for explaining a processing procedure of a post-processing unit.

FIG. 12 is a schematic diagram illustrating an example of a processing result of a post-processing unit.

FIG. 13 is a schematic diagram illustrating an example of a processing result of a post-processing unit.

FIG. 14 is a schematic diagram illustrating an example of a processing result of a post-processing unit.

[Explanation of symbols]

1 ... Image processing device, 2 ... Imaging unit, 3 ... A / D conversion circuit, 4 ... Compression unit, 5 ... Wavelet converter, 6
...... Quantizer, 7 …… Encoder, 8 …… Write unit, 9 ・ ・ ・
... recording medium, 10 ... reading section, 11 ... decompression section, 12
...... Decoder, 13 ... Inverse quantizer, 14 ... Inverse wavelet converter, 15 ... Post-processing unit, 16 ... D / A converter, 17 ... Display unit, 20 ... Dividing circuit , 21 ... Detection circuit, 22 ... Selection circuit, 23 ... Memory, 24-2
6 ... Judgment circuit, 27 ... Synthesis circuit, 28-30 ... Smoothing circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H04N 1/41 B

Claims (8)

[Claims] 1. An image signal decoding method for decoding a compressed image signal formed by blocking an input image signal according to a signal component and compression-coding in block units, wherein the compressed image signal is compressed by the compression code. The decoding step of decoding the decoded image signal to form a decoded image signal by a method opposite to the coding method, the division step of dividing the above-mentioned decoded image signal into predetermined unit blocks, and the pixel level in the unit block divided by the above-mentioned division step are A level fluctuation detection step for detecting whether or not there is fluctuation, and a unit block for which no level fluctuation is detected in the unit block in the level fluctuation detection step,
A noise block determination step for determining a noise block by determining a difference value between pixels adjacent to each other between the unit block and the adjacent unit block, and determining the difference value with a predetermined threshold value, and in the noise block determination step An image signal decoding method comprising: a smoothing step for performing a smoothing process between the adjacent unit blocks whose difference value is less than the threshold value. 2. The image signal decoding method according to claim 1, wherein the decoded image signal is divided into unit blocks each having a plurality of pixels arranged in the vertical direction and the horizontal direction for processing, and then the unit blocks are processed. 2. The image signal decoding method according to claim 1, wherein processing is performed by dividing each of the unit blocks which are arranged by half of a plurality of pixels in the vertical direction and the horizontal direction. 3. In the dividing step, a plurality of pixels arranged in the vertical direction are combined to form a unit block in the vertical direction, and a plurality of pixels arranged in the horizontal direction are formed to form a unit block in the horizontal direction. In the step, while detecting the level fluctuations in the vertical and horizontal unit blocks, the vertical and horizontal unit blocks are further divided into a first half region and a second half region each consisting of half the pixels of the plurality of pixels, Detecting level fluctuation between the first half area and the second half area, in the noise block determination step, the first half area or the second half area where the level fluctuation is detected, and the second half area or the first half area of the unit block adjacent to the unit block. The image signal decoding method according to claim 1 or 2, wherein is set as a threshold determination target. 4. The image signal decoding method according to claim 1, wherein the compressed image signal is formed by a wavelet transform using a Haar basis. 5. An image signal decoding device for decoding a compressed image signal formed by blocking an input image signal according to a signal component and compression-coding in block units, wherein the compressed image signal is compressed by the compression code. Decoding means for decoding the decoded image signal to form a decoded image signal by a method opposite to the coding method, dividing means for dividing the decoded image signal into predetermined unit blocks, and pixel level in the unit block divided by the dividing means. Level fluctuation detecting means for detecting whether or not there is fluctuation, and for the unit block in which no level fluctuation in the unit block is detected by the level fluctuation detecting means, pixels adjacent to each other between the unit block and the adjacent unit block The noise block that determines the noise block by determining the difference value of An image signal decoding apparatus comprising: a lock determining means; and a smoothing means for performing a smoothing process between the adjacent unit blocks whose difference value is less than the threshold value in the noise block determining means. 6. The image signal decoding apparatus divides the decoded image signal into unit blocks each having a plurality of pixels arranged in a vertical direction and a horizontal direction to perform processing, and then performs processing of the unit blocks. 6. The image signal decoding apparatus according to claim 5, wherein the image signal decoding apparatus is divided into unit blocks each of which is composed of half pixels of a plurality of pixels in the vertical direction and the horizontal direction to perform processing. 7. The level dividing means for dividing the plurality of pixels arranged in the vertical direction to form a unit block in the vertical direction and the plurality of pixels arranged in the horizontal direction to form a unit block in the horizontal direction. The means detects the level fluctuations in the vertical and horizontal unit blocks, and further divides the vertical and horizontal unit blocks into a first half region and a second half region each consisting of half of the plurality of pixels,
The level fluctuation between the first half area and the second half area is detected, and in the noise block determination means, the first half area or the second half area in which the level fluctuation is detected, and the second half area or the first half area of the unit block adjacent to the unit block. And 5 are set as threshold determination targets.
The image signal decoding device according to. 8. The image signal decoding apparatus according to claim 5, 6 or 7, wherein said compressed image signal is formed by wavelet transform using a Haar basis.