JPH08204063A - Chip part and manufacture of the same - Google Patents

Abstract

PURPOSE: To realize a low-price chip having excellent thermal conductivity and higher accuracy by utilizing a defective wafer substrate which has individually been scribed as a heat sink mounted on a hybrid IC and forming a chip on the defective wafer with an ordinary semiconductor technique. CONSTITUTION: A defective wafer 1 is prepared and an insulating layer 6 is formed as required to realize insulation resistance and desired resistance value. Resistor 8 and electrodes 7, 9 are formed on the rear surface or front surface, a resistor 8 formed in the shape of matrix in the wafer 1 is individually divided with scriber, this resistor chip 8 is mounted on the hybrid IC and is then wire- bonded. Thereby, a low price chip resistor can he formed with an ordinary process and moreover since the substrate itself has a small resistance value, it works as a heat sink when it is mounted on the metal substrate. Simultaneously, heat can be transmitted effectively to the substrate and change of resistance value due to the heat of resistor can also be prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip part and a manufacturing method thereof, and more particularly to an inexpensive chip part having excellent characteristics.

[0002]

2. Description of the Related Art Generally speaking, a chip component is a passive element by a technique such as screen printing on a ceramic substrate.
Resistors, capacitors, coils, etc. are formed and mounted on the hybrid substrate. For example, it is described in detail in IC mounting technology (second edition in 1981) issued by the Industrial Research Council.

Although the present application is applied to a semiconductor element or a passive element, a chip resistor will be described as an example. In general, a resistance causes a voltage to be generated at both ends due to a current flowing therethrough, and this voltage is picked up and fed back to a controlled circuit via a control circuit or the like to protect or control the circuit.

For example, in Japanese Patent Laid-Open No. 63-128675, a resistor is attached to the emitter side of an output transistor and the current flowing through the resistor is detected to protect the output transistor. As described above, what is called a chip resistor is generally mounted on an insulating substrate such as a ceramic substrate and is not preferable in consideration of the temperature characteristics of the resistor itself, the thermal conductivity of the insulating substrate, etc. Then, the Cu wiring adhered to the metal substrate is utilized, and the metal substrate is used for the thermal conductivity, and the temperature characteristic is compensated by mounting an element compensating the positive temperature characteristic.

Therefore, it is necessary to make the resistance value extremely small in order to reduce the loss. Here, as described above, C
Since it is u, it is possible to reduce the resistance value in a comparatively small arrangement area, and since it is a metal substrate, the heat dissipation is good and an extra current can be flowed accordingly.

[0006]

When a part of the above-mentioned Cu wiring is used as a resistor, the Cu wiring has a variation in thickness in the rolling process for forming a foil shape, and the Cu wiring is stuck on the entire surface of the substrate. Since the wiring is etched from the above, there is a problem that a highly accurate one cannot be obtained due to variations in etching and side etching. Further, the temperature coefficient of Cu is as high as about 4000 ppm, and it has been necessary to correct the variation of the resistance value due to the temperature change with, for example, a diode.

A chip resistor for forming a resistor on a substrate made of an insulating material such as a ceramic substrate can be easily mounted by an automatic die bonder or the like, but the thermal conductivity of the substrate itself is small and a large current can be applied. There was a problem that it was difficult to release the heat generated when flowing it to the outside. As mentioned above, there is no solution that can solve both of the above-mentioned problems and cost problems.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and firstly, the problem is solved by using a defective semiconductor substrate. Secondly, the problem is solved by providing an electrode compatible with solder on the surface of the semiconductor substrate on which the element is not mounted, and fixing the electrode to the conductive path provided on the hybrid substrate through the solder.

Thirdly, the problem is solved by preparing a defective wafer in a wafer processing step or a semiconductor process step on the wafer and mounting an element on the front surface or the back surface of the wafer.

[0010]

First of all, attention was paid to silicon, which has a relatively high thermal conductivity, as a substrate for mounting a passive element, and attention was paid to defective wafers in terms of cost. In other words, by utilizing the individually scribed defective wafer substrates as a heat sink to be mounted on the hybrid IC, and forming chips on the defective wafers using ordinary semiconductor technology, the thermal conductivity is excellent, the cost is low, and the accuracy is high. Can achieve high chips. Here, when the thermal conductivity is expressed by the amount of heat flowing through the surface having an area of 1 m2 of the plate when there is a temperature difference of 1 K on both sides of the plate having a thickness of 1 m, alumina is 21 and glass is about 0.5 to 1 , C
u is about 400 and silicon is 168 (Showa 63).
(Refer to the science chronology issued on November 30, 2013).

Secondly, since an electrode can be formed on the back surface of the silicon wafer, a passive element mounted on the defective wafer is formed by forming a solderable electrode such as Cr-Ni-Au. Chips that are scribed and divided into individual chips can be easily mounted on a normal hybrid board with an auto die bonder. Third, for example, even if a diffusion region or the like is formed in a silicon substrate and a transistor or the like is built in, since a passive element is formed after forming an insulating layer on the mounting surface of the element, No matter what is built in, it can be formed as a chip element without any problem.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing the embodiments of the present invention with reference to FIGS. 1 to 3, the maximum points of the present application will be described. The point of the present application is to use a defective wafer discharged in a normal IC manufacturing process, and to use a silicon wafer to be discarded as a substrate for forming a passive element, thereby significantly reducing the cost. In addition, passive elements are formed on a wafer by ordinary semiconductor technology, utilized as a substrate (heat sink) having a higher thermal conductivity than an insulating substrate such as ceramic, and mounted by an automounter like a semiconductor chip. .

For example, the manufacturing process of a bipolar IC will be roughly described as follows. First, (1) preparation of a P-type substrate, (2) oxidation of the surface, (3) formation of an inlet in a part of this oxide film, and (4) formation of an N + buried layer,
(5) Oxide film removal, (6) N-type epilayer formation, (7) Epilayer surface oxidation, (8) Isolation inlet oxide film formation, (9) Isolation diffusion, (10) )
Base inlet and base diffusion, (11) Emitter inlet formation and diffusion, (12) Oxide film removal, (1
3) Oxide film formation, (14) Contact opening formation, (1
4) There are 14 steps of metal formation.

Generally, when forming a passive element, it is preferable that the surface is flat. Therefore, (1) to (2),
Those that have become defective in the steps (5) to (7) and (12) are preferable. That is, an insulating film and /
Alternatively, this is because the epitaxial layer is formed, but since there is no unevenness for the introduction port or the contact, the wafer surface is flat.

In the MOSIC manufacturing process, (1) P
Preparation of mold substrate, (2) whole surface oxidation, (3) whole surface formation of silicon nitride film, (4) removal of the nitride film for locos oxidation, (5) locos oxidation using the nitride film as an oxidation resistant mask,
(6) Removal of nitride film and oxide film, (7) Formation of gate oxide film, (8) Forming gate, forming source / drain by self-aligning with gate, (9) Forming insulating film by CVD on entire surface, There are 11 steps of (10) contact formation and (11) metal formation.

As described above, since it is preferable that the substrate surface is flat, the wafers that are defective in (1) to (3) are preferable. In addition to the preferred steps described above, glass or the like may be first formed on the uneven wafer to make it flat, or the uneven surface may be etched to make it flat. In order to show that the defective wafer 1 is used, FIG. 1 explains that a defect occurs in the state where the embedded region 2 and the isolation region 3 are formed in the bipolar IC process. The impurity introduction port 4 is shown in the silicon oxide film 5. 6 is an insulating layer,
It suffices to fill the inlet 4 and substantially flatten the surface of the bag, which is made of glass or resin. Reference numeral 7 denotes a back electrode, which is laminated in the order of, for example, Cr-Ni-Au so that it can be easily soldered when mounted on the conductive path of the hybrid substrate. The resistor 8 is formed by laminating, for example, Cr—Ni—Mn in this order on the substantially flattened substrate surface, that is, the surface of the insulating layer 6. Al electrodes 9 are formed on both ends of the resistor 8.

The same applies to the resistor of FIG. 2, but the temperature coefficient T
CR is about ± 50PPM, and it is a few mm as a resistor.
It can be realized from Ω. According to page 477 of the science table in the 62nd volume of 1989, alumina is 21 κ at room temperature, polyethylene is about 0.25, silicon is 168 κ at 0 degrees, aluminum is 236 κ at 0 degrees, and Cu is 0 degrees. At 403
κ. Here, the unit of κ is W / (m · K).
Needless to say, since it is arranged on the silicon substrate 1, it has better heat dissipation than a resistor formed on an insulating substrate.

On the other hand, FIG. 2 shows the passivation film 10 formed on the resistor of FIG. Wafer 1
It is formed by a preferable process, and if the surface 11 is an insulating layer, an insulating layer may or may not be added separately. However, if it is an epitaxial layer or a silicon layer, it is necessary to separately provide the insulating layer 11 on the entire surface. Also, when the silicon layer is exposed by etching, it is necessary to separately provide an insulating layer.

FIG. 3 is a plan view of FIG. 1, in which a resistor 20 similar to the resistor 8 and reduced in size is arranged in contact with the electrode 9, and an electrode 21 is provided at the left end of the resistor 20. It is provided. The electrode 21 is an electrode used for probing, and predicts the resistance value of the resistor 8 by looking at the resistor 20. FIG. 4 is a diagram in which the above-described resistance chip 1 is mounted on the hybrid IC substrate 30. For example, a conductive path 32 and a conductive land 33 that are adhered to the substrate 30 of a metal substrate, Al or Cu via the insulating layer 31 are provided. Yes, conductive land 3
Although not shown in the drawing, the back electrode of the resistor chip 3 is connected to the resistor 3 via solder. The electrodes 9 and 9 on the surface are
It is electrically connected to the conductive path 32 via a thin metal wire.

As described above, a wafer that has become defective in the above-mentioned process is prepared, and if necessary, an insulating layer is formed for insulation resistance and achievement of a target resistance value. Resistors and electrodes are formed, and resistors (passive elements) formed in a matrix in the wafer are individually divided by a scriber, and the divided resistor chips are mounted on a hybrid IC as shown in FIG. And wire bond. With this series of processes, inexpensive chip resistors can be formed by a normal semiconductor process, and since the substrate itself has low thermal resistance, it can function as a heat sink when mounted on a metal substrate and can transfer heat well to the substrate. It is also possible to prevent the resistance value from changing due to heat of the resistor.
Alternatively, it may be mounted on a heat sink block of Cu or the like. In this case, the land and the block are fixed to each other with solder or silver paste. Moreover, since a resistance pair having a small temperature coefficient can be realized by the material, a highly accurate and low resistance resistor can be realized. Therefore, if it is used as a detection resistor at the entrance and exit of the output transistor, the resistance value is small, so that the loss is small and highly accurate detection is possible. Therefore, if the voltage of the resistor is fed back to the control circuit to control the output transistor, the protection of the output transistor can be realized with high accuracy.

[0021]

As is apparent from the above description, if a defective wafer is used as a substrate, the cost of the substrate can be made so low that it cannot be compared. Moreover, since the thermal resistance of silicon is much smaller than that of the insulator, even if the passive element mounted on the substrate generates heat, it can be radiated favorably to the outside.

Secondly, if electrodes that can be soldered are formed on the back surface of the wafer (the surface different from the resistor mounting surface), the electrodes can be mounted on the hybrid substrate via solder, and the hybrid substrate can be mounted in the same manner as a normal semiconductor chip mounting. Can be mounted on a board. Thirdly, many resistors can be formed in a matrix in the wafer,
Since many resistors can be formed on an inexpensive substrate, a very inexpensive one can be realized. It is also effective in terms of recycling.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a chip component of the present invention.

FIG. 2 is a diagram illustrating a chip component of the present invention.

FIG. 3 is a plan view of FIG.

FIG. 4 is a sectional view of a chip component mounted on a hybrid substrate.

[Explanation of symbols]

 1 Substrate 6 Insulating Layer 7 Back Electrode 8 Resistor 9 Electrode 10 Passivation Film 30 Hybrid Substrate

Claims (3)

[Claims] 1. A chip component in which an active element or a passive element is formed on an insulating layer formed on the front surface or the back surface of a semiconductor substrate, wherein the semiconductor substrate is a defective product. 2. An electrode that is compatible with solder is provided on the surface of the semiconductor substrate on which the element is not mounted, and is fixed to the conductive path provided on the hybrid substrate through the solder.
The listed chip parts. 3. A semiconductor formed on the wafer by preparing a defective wafer in a wafer processing step or a semiconductor process step on the wafer, forming a semiconductor element or a passive element on the wafer, A method of manufacturing a chip component, which comprises at least a step of individually scribing an element or a passive element.