JPH08194567A - Interface circuit - Google Patents
Interface circuitInfo
- Publication number
- JPH08194567A JPH08194567A JP7004695A JP469595A JPH08194567A JP H08194567 A JPH08194567 A JP H08194567A JP 7004695 A JP7004695 A JP 7004695A JP 469595 A JP469595 A JP 469595A JP H08194567 A JPH08194567 A JP H08194567A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- communication signal
- waveform
- normal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Information Transfer Systems (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はコンピュータによるシリ
アルデータ通信システムに係り、特に、二線式シリアル
データ通信方式の電文モニタに好適なインターフェース
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer-based serial data communication system, and more particularly to an interface suitable for a two-wire serial data communication system message monitor.
【0002】[0002]
【従来の技術】図1に示すように、二線式シリアルデー
タ通信システムでは、切替器4の切替時に送信部2また
は受信部3とケーブル5が切り離された状態となり、切
替操作時に切断ノイズが発生する。切断時はケーブルに
外乱ノイズが発生する。ケーブルに接続したまま電文を
入力するインターフェース回路は例がない。2. Description of the Related Art As shown in FIG. 1, in a two-wire serial data communication system, the transmission unit 2 or the reception unit 3 and the cable 5 are disconnected when the switching unit 4 is switched, and disconnection noise is generated during the switching operation. appear. Disturbance noise is generated on the cable when disconnected. There is no example of an interface circuit that inputs a message while connected to a cable.
【0003】[0003]
【発明が解決しようとする課題】本発明の目的はシリア
ルデータ通信システムにおいて、通信信号に外乱が重畳
し、通信信号が正常に受信出来ないという問題点を解決
するためのインターフェース回路を提供することにあ
る。SUMMARY OF THE INVENTION An object of the present invention is to provide an interface circuit in a serial data communication system for solving the problem that a communication signal is disturbed and a communication signal cannot be normally received. It is in.
【0004】[0004]
【課題を解決するための手段】本発明の考え方を図2に
より説明する。正常な通信信号は矩形波であり波形の変
化量,波高値は規定されている。電圧リミッタ回路6と
ハイパスフィルタ回路7を用いることにより、低周波の
外乱および切替操作時の急峻な外乱を排除し波形整形回
路8によって正常な通信信号が復元できるという考え方
により得られた。The concept of the present invention will be described with reference to FIG. A normal communication signal is a rectangular wave, and the amount of change in the waveform and the peak value are specified. By using the voltage limiter circuit 6 and the high-pass filter circuit 7, a low-frequency disturbance and a steep disturbance at the time of switching operation can be eliminated, and the waveform shaping circuit 8 can restore a normal communication signal.
【0005】[0005]
【作用】正常な通信波形は正負の極性を持った矩形波で
あり波高値も規定されている。まず電圧リミッタ回路6
により規定値以上の外乱成分を除去する。次にハイパス
フィルタ回路7によって正常な通信波形成分の高周波成
分のみを取り出す。その後、波形整形回路8によって元
の正常な通信信号に復元することが出来る。[Function] A normal communication waveform is a rectangular wave having positive and negative polarities, and the peak value is also specified. First, the voltage limiter circuit 6
The disturbance component above the specified value is removed by. Next, the high-pass filter circuit 7 extracts only the high-frequency component of the normal communication waveform component. Thereafter, the waveform shaping circuit 8 can restore the original normal communication signal.
【0006】[0006]
【実施例】本発明の一実施例を図3によって説明する。
入力端子9と10により入力された通信信号はツェナー
ダイオード11による電圧リミッタによって規定電圧以
上の外乱波形が除去される。この時の動作電圧は正常な
信号の電圧に適合するツェナーダイオードの動作電圧を
選定することによって得られる。次にコンデンサ12に
よって微分された電圧を可変抵抗器13より放電させる
回路によって低周波成分を除去し正常な波形成分のみを
取り出す。次にダイオード14とシュミットトリガ回路
15により波形を整形し本来の正常な通信信号波形を復
元し出力端子16へ出力する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to FIG.
The communication signal input through the input terminals 9 and 10 is subjected to the voltage limiter by the Zener diode 11 to remove the disturbance waveform above the specified voltage. The operating voltage at this time can be obtained by selecting the operating voltage of the Zener diode suitable for the voltage of the normal signal. Next, a low frequency component is removed by a circuit for discharging the voltage differentiated by the capacitor 12 from the variable resistor 13, and only a normal waveform component is taken out. Next, the diode 14 and the Schmitt trigger circuit 15 shape the waveform to restore the original normal communication signal waveform and output it to the output terminal 16.
【0007】[0007]
【発明の効果】二線式シリアルデータ通信システムにお
いて、ケーブルに入力端子を接続することにより、正常
な通信信号を取り出すことができ、出力を用いて通信信
号を別なコンピュータで入力でき外部モニタを増設する
ことができる。In the two-wire serial data communication system, a normal communication signal can be taken out by connecting the input terminal to the cable, and the communication signal can be input to another computer by using the output, and an external monitor can be used. Can be expanded.
【図1】二線式シリアルデータ通信システムのブロック
図。FIG. 1 is a block diagram of a two-wire serial data communication system.
【図2】本発明のインターフェース回路のブロック図。FIG. 2 is a block diagram of an interface circuit of the present invention.
【図3】本発明のインターフェースの回路図。FIG. 3 is a circuit diagram of an interface of the present invention.
11…ツェナーダイオード、12…コンデンサ、13…
可変抵抗器、14…ダイオード、15…シュミットトリ
ガ回路。11 ... Zener diode, 12 ... Capacitor, 13 ...
Variable resistor, 14 ... Diode, 15 ... Schmitt trigger circuit.
Claims (1)
コンピュータはケーブルによって接続された二線式シリ
アルデータ通信システムによってデータ通信を行い、前
記二線式シリアルデータ通信システムにおいて前記切替
器の操作や外乱による通信信号以外の波形を排除しケー
ブルより通信信号のみを取り出すことを特徴とするイン
ターフェース回路。1. A computer having a transmitter, a receiver, and a switch, performs data communication by a two-wire serial data communication system connected by a cable, and the switch is used in the two-wire serial data communication system. An interface circuit that eliminates waveforms other than communication signals due to operation and disturbance and extracts only communication signals from the cable.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7004695A JPH08194567A (en) | 1995-01-17 | 1995-01-17 | Interface circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7004695A JPH08194567A (en) | 1995-01-17 | 1995-01-17 | Interface circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08194567A true JPH08194567A (en) | 1996-07-30 |
Family
ID=11591030
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7004695A Pending JPH08194567A (en) | 1995-01-17 | 1995-01-17 | Interface circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH08194567A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002344303A (en) * | 2001-05-18 | 2002-11-29 | Mitsubishi Electric Corp | Level shift circuit |
-
1995
- 1995-01-17 JP JP7004695A patent/JPH08194567A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002344303A (en) * | 2001-05-18 | 2002-11-29 | Mitsubishi Electric Corp | Level shift circuit |
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Legal Events
Date | Code | Title | Description |
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A711 | Notification of change in applicant |
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A02 | Decision of refusal |
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