JPH0250537A - Bidirectional simultaneous communication system - Google Patents

Bidirectional simultaneous communication system

Info

Publication number
JPH0250537A
JPH0250537A JP20036488A JP20036488A JPH0250537A JP H0250537 A JPH0250537 A JP H0250537A JP 20036488 A JP20036488 A JP 20036488A JP 20036488 A JP20036488 A JP 20036488A JP H0250537 A JPH0250537 A JP H0250537A
Authority
JP
Japan
Prior art keywords
signal
level
voltage
threshold
driver circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20036488A
Other languages
Japanese (ja)
Inventor
Kazuo Azegami
畔上 一男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20036488A priority Critical patent/JPH0250537A/en
Publication of JPH0250537A publication Critical patent/JPH0250537A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/14Two-way operation using the same type of signal, i.e. duplex
    • H04L5/1423Two-way operation using the same type of signal, i.e. duplex for simultaneous baseband signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Bidirectional Digital Transmission (AREA)

Abstract

PURPOSE:To reduce time loss by providing a receiver circuit to compare the average value of value corresponding to the high level signal and low level signal of the voltage sent to communication equipment with a threshold, and outputting a signal voltage lower than the high level threshold and higher than the low level threshold with a driver circuit. CONSTITUTION:Both devices connected to both sides of a communication line are composed of the same reference, a driver circuit 1 and a receiver circuit 2 are provided, and a supply voltage, respective thresholds corresponding to the input signal of the level higher and lower than the setting of a resistance and respective desired output voltages are generated. The receiver circuit 2 provides a comparator, the voltage value and the threshold corresponding to the own output signal are compared, and thus, the level of the signal of an opponent is identified. For such a reason, at the time of combining low and high levels, the supply voltage and the resistance are set so that the voltage formed on a communication line goes to the middle of such threshold levels. Thus, the bidirectional communication is executed by one signal line and without generating waiting time for transmitting and receiving, the time loss can be reduced.

Description

【発明の詳細な説明】 〔概要〕 インターフェイス回路のバス通信等の双方向通信方式に
おいて、 1本の信号線で双方向通信を行い、かつ送受信に対する
待ち時間を発生させず、時間的なロスを低減することを
目的とし、 通信機に送出した電圧の高レベル信号に対応する値と低
レベル信号に対応する値との平均値が所定値になる信号
電圧を出力するドライバ回路と、高レベル信号より作成
される高レベルしきい値又は低レベル信号より作成され
る低レベルしきい値と前記所定値と比較するレシーバ回
路とを備え、前記所定値が高レベルしきい値よりも低く
、かつ低レベルしきい値よりも高なる信号電圧をドライ
バ回路が出力するように構成する。
[Detailed Description of the Invention] [Summary] In a bidirectional communication system such as bus communication of an interface circuit, bidirectional communication is performed using a single signal line, and there is no waiting time for transmission and reception, thereby reducing time loss. A driver circuit that outputs a signal voltage such that the average value of the value corresponding to the high-level signal and the value corresponding to the low-level signal of the voltage sent to the communication device is a predetermined value, and the high-level signal a receiver circuit that compares the predetermined value with a high-level threshold value created by a high-level threshold value or a low-level threshold value created by a low-level signal, the predetermined value being lower than the high-level threshold value; The driver circuit is configured to output a signal voltage higher than a level threshold.

〔産業上の利用分野〕[Industrial application field]

本発明は、インターフェイス回路のバス通信等の双方向
通信方式に関し、特に、1本の信号線で双方の装置が同
時に送受信を行い得る双方向同時通信方向式に関する。
The present invention relates to a bidirectional communication method such as bus communication for an interface circuit, and particularly to a bidirectional simultaneous communication method in which both devices can simultaneously transmit and receive data using a single signal line.

〔従来の技術〕[Conventional technology]

インターフェイス回路のバス通信においては、1本のバ
スによって双方向通信を行い得ることが必須であるが、
通信方式としては、片方の装置が当該バスに送信を行っ
ている間、他方の装置は受信のみを行い、ある瞬間の各
装置は送信もしくは受信のいずれかに専念している。
In bus communication of interface circuits, it is essential to be able to perform bidirectional communication using one bus.
As for the communication method, while one device is transmitting to the bus, the other device is only receiving, and each device at a given moment is dedicated to either transmitting or receiving.

第3図は、従来の双方向通信方式の一例を示す構成図で
ある。同図において、双方向通信は装置Aと装置Bとの
間を1本の通信線で行われるものとし、各装置はドライ
バ回路31とレシーバ回路32とで構成されている。図
(a)に示す第1の従来例ではドライバ回路31が3−
5T素子で構成され、図(b)に示す第2の従来例では
ドライバ回路31がオープンコレクタ又はオープンドレ
インで構成されている。3−5T素子は、Hi、L。
FIG. 3 is a configuration diagram showing an example of a conventional two-way communication system. In the figure, it is assumed that bidirectional communication is performed between device A and device B using one communication line, and each device is composed of a driver circuit 31 and a receiver circuit 32. In the first conventional example shown in FIG.
In the second conventional example shown in FIG. 3(b), the driver circuit 31 is composed of a 5T element and is composed of an open collector or an open drain. The 3-5T element is Hi and L.

及びHz(高インピーダンス)の3値ステートを可能と
する素子で、伝送速度が速い利点がある。
It is an element that enables three-value states of Hz and Hz (high impedance), and has the advantage of high transmission speed.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記従来の回路では、同時送受信ができない。 The conventional circuit described above cannot perform simultaneous transmission and reception.

まず第1の従来例では、ドライバ回路が3−5T素子で
あり、装置へが信号を送出した場合、装置Bのドライバ
回路は出力を高インピーダンス状態とし、また装置Bが
信号を送出した場合、装置へのドライバ回路は出力を高
インピーダンス状態となるように制御して伝送を行う。
First, in the first conventional example, the driver circuit is a 3-5T element, and when the device sends a signal, the driver circuit of device B puts the output in a high impedance state, and when the device B sends a signal, The driver circuit to the device controls the output to be in a high impedance state for transmission.

従って、装置A及び装置Bの双方のドライバ回路が同時
に信号を送出しようとすると、出力がショートするバス
ファイトが発生し、素子を破壊してしまう恐れもある。
Therefore, if the driver circuits of device A and device B try to send out signals at the same time, a bus fight may occur in which the outputs are shorted, and the device may be destroyed.

次に第2の従来例は、ドライバ回路がオープンコレクタ
又はオープンドレインであり、高レベルを出力する場合
は、出力が等測的に開放となり、高レベルはプルアップ
抵抗で決定される。従って第1の従来例のようなショー
トは発生しないが、例えば装置Aが高レベルを出力し、
装置Bが低レベルを出力した場合、装置Aのレシーバ回
路は低レベルを受信する必要があり、装置Bのレシーバ
回路は高レベルを受信する必要があるにも拘らず装置B
のドライバ回路は低レベルを出力しているため、レシー
バ回路が高レベルを受信できない。
Next, in the second conventional example, the driver circuit is an open collector or an open drain, and when outputting a high level, the output is isometrically open, and the high level is determined by a pull-up resistor. Therefore, a short circuit as in the first conventional example does not occur, but for example, if device A outputs a high level,
If device B outputs a low level, the receiver circuit of device A should receive a low level, and the receiver circuit of device B should receive a high level, but device B
Since the driver circuit is outputting a low level, the receiver circuit cannot receive a high level.

このように、従来のインターフェイス回路では同時送受
信ができないため、片方の送信が終了した後でなければ
他方は送信を開始できず、送受信に対する待ち時間を発
生させてしまい、時間的なロスが大きかった。
In this way, conventional interface circuits cannot transmit and receive at the same time, so the other cannot start transmitting until the other has finished transmitting, creating a waiting time for transmitting and receiving, resulting in a large time loss. .

本発明は、このような課題に鑑みて創案されたもので、
1本の信号線で双方向通信を行い、かつ送受信に対する
待ち時間を発生させず、時間的なロスを低減する双方向
同時通信方式を提供することを目的としている。
The present invention was created in view of these problems, and
The object of the present invention is to provide a simultaneous two-way communication system that performs two-way communication using one signal line, does not generate waiting time for transmission and reception, and reduces time loss.

〔課題を解決するための手段〕[Means to solve the problem]

本発明における上記課題を解決するための手段は、ドラ
イバ回路及びレシーバ回路を備えた装置の一対が1本の
通信線で接続され、一方のレシーバ回路が相手方のドラ
イバ回路の送出する信号が高レベルであるか低レベルで
あるかを識別することにより双方向通信を行う際の同時
通信方式において、通信線に送出した電圧の高レベル信
号に対応する値と低レベル信号に対応する値との平均値
が所定値になる信号電圧を出力するドライバ回路と、高
レベル信号より作成される高レベルしきい値又は低レベ
ル信号より作成される低レベルしきい値と前記所定値と
比較するレシーバ回路とを備え、前記所定値が高レベル
しきい値よりも低く、かつ低レベルしきい値よりも高く
なる信号電圧をドライバ回路が出力する双方向同時信号
方式によるものとする。
Means for solving the above problems in the present invention is that a pair of devices including a driver circuit and a receiver circuit are connected by one communication line, and one receiver circuit receives a signal sent from the other driver circuit at a high level. In the simultaneous communication system when performing two-way communication by identifying whether the voltage is high or low level, the average of the value corresponding to the high level signal and the value corresponding to the low level signal of the voltage sent to the communication line a driver circuit that outputs a signal voltage whose value becomes a predetermined value; and a receiver circuit that compares a high-level threshold value created from a high-level signal or a low-level threshold value created from a low-level signal with the predetermined value. The driver circuit is provided with a bidirectional simultaneous signal system in which the driver circuit outputs a signal voltage such that the predetermined value is lower than the high level threshold value and higher than the low level threshold value.

〔作用〕[Effect]

本発明では、1本の通信線の両側に接続される装置の双
方を同一基準で構成し、ドライバ回路とレシーバ回路を
備え、供給電圧及び抵抗の設定により、高もしくは低レ
ベルの入力信号に対応した各しきい値と所望の各出力電
圧を作成する。出力電圧は、双方の装置から同時に信号
が送出された場合、高と低、高と高、低と低の3種類の
組合せによって、それぞれの電圧を通信線上に形成する
が、レシーバ回路はコンパレータを備えていて、この電
圧値と自らの出力信号に対応したしきい値とを比較する
ことにより、相手方の信号のレベルを識別する。このた
め、高と低の組合せのとき、通信線上に形成される電圧
が高低しきい値の中間になるように、供給電圧及び抵抗
を設定する。
In the present invention, both devices connected to both sides of one communication line are configured based on the same standard, are equipped with a driver circuit and a receiver circuit, and can handle high or low level input signals by setting the supply voltage and resistance. Create each threshold and each desired output voltage. When signals are sent from both devices at the same time, the output voltage will be formed on the communication line by three types of combinations: high and low, high and high, and low and low, but the receiver circuit uses a comparator The level of the other party's signal is identified by comparing this voltage value with a threshold value corresponding to its own output signal. For this reason, the supply voltage and resistance are set so that when a combination of high and low occurs, the voltage formed on the communication line is between the high and low thresholds.

〔実施例〕〔Example〕

以下、図面を参照して、本発明の実施例を詳細に説明す
る。
Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図は、本発明の一実施例の構成図である。FIG. 1 is a configuration diagram of an embodiment of the present invention.

同図において、双方向通信は装置Aと装置Bとの間を1
本の通信線で行われるものとし、各装置はドライバ回路
1とレシーバ回路2とで構成されている。ドライバ回路
1は、オープンコレクタ又はオーブンドレインで構成さ
れ、レシーバ回路2はコンパレータで構成されている。
In the figure, two-way communication is performed between device A and device B.
It is assumed that the communication is carried out using a real communication line, and each device is composed of a driver circuit 1 and a receiver circuit 2. The driver circuit 1 is composed of an open collector or oven drain, and the receiver circuit 2 is composed of a comparator.

装置A1と装置Bの各部は対応していて、R1=R6,
R2=R7゜R3=R8,R4=R9,R5=10であ
る。
Each part of device A1 and device B corresponds, R1=R6,
R2=R7°, R3=R8, R4=R9, and R5=10.

装置AがHレベル(オープンコレクタであるから開放)
を送出し、装置BがLレベルを送出した場合、通信線上
の点の電圧VAは、 で決定する。但し、VoLは各ドライバ回路のLレベル
電圧である。
Device A is at H level (open because it is an open collector)
When device B sends out L level, the voltage VA at a point on the communication line is determined by: However, VoL is the L level voltage of each driver circuit.

この電圧VAを、装置Aのレシーバ回路がLレベルと認
識し、装置Bのレシーバ回路がHレベルと認識すれば、
双方向同時送受信が可能となるわけで、以下、レシーバ
回路の認識機能を説明する。
If the receiver circuit of device A recognizes this voltage VA as L level and the receiver circuit of device B recognizes it as H level, then
Since simultaneous bidirectional transmission and reception is possible, the recognition function of the receiver circuit will be explained below.

このとき装置AはHレベルを送出しているのであるから
、信号S1はHレベル(ViH)であり、装置Aのコン
パレータのマイナス側0点のffi圧vBは、 R1・R4+R3・R,+R,・R2 である。
At this time, since device A is sending out H level, signal S1 is H level (ViH), and the ffi pressure vB at the minus side 0 point of the comparator of device A is R1・R4+R3・R, +R,・R2.

また装置BはLレベルを送出しているのであるから、信
号S2はLレベル(ViL)であり、装置Bのコンパレ
ータのマイナス側0点の電圧VCは、R1・R4+R3
・R5+ R4・R1である。
Also, since device B is sending out the L level, the signal S2 is the L level (ViL), and the voltage VC at the minus side 0 point of the comparator of device B is R1・R4+R3
・R5+R4・R1.

既に述べたように、2つの装置の抵抗値は対応している
ので、VBをHレベルのしきい値、VCをLレベルのし
きい値として差支えなく、第2図(a)に示すとおりに
なる。即ち、装置AがHレベルを送出し、装置BがLレ
ベルを送出している場合、電圧VBはHレベルのしきい
値(スレッシホールド)となり、装置Aコンパレータの
プラス側に入力されるVAの方が低(なって、装置Aの
レシーバ回路は装置BがLレベルを送出しいてることを
認識でき、一方で、電圧VCはLレベルのしきい値とな
り、装置Bのコンパレータのプラス側に入力されるVA
の方が高くなって、装置Bのレシーバ回路は装置AがH
レベルを送出していることを認識できる。
As already mentioned, the resistance values of the two devices correspond, so it is okay to set VB as the H level threshold and VC as the L level threshold, as shown in Figure 2(a). Become. That is, when device A is sending out H level and device B is sending out L level, voltage VB becomes the H level threshold, and VA input to the positive side of device A comparator is lower (as a result, the receiver circuit of device A can recognize that device B is sending out the L level, and on the other hand, the voltage VC becomes the threshold of the L level, and the voltage is on the positive side of the comparator of device B. VA to be input
is higher, and the receiver circuit of device B is higher than that of device A.
You can recognize that the level is being sent.

第2図(b)は、双方が同一レベルを送出した場合の説
明図である。まず双方がHレベルを送出した場合は、0
点の電圧はほぼVccO値となり、Hレベルのしきい値
よりも高くなって、双方共にレシーバ回路は相手方がH
レベルを送出しいてることを認識できる。また、双方が
Hレベルを送出した場合、0点の電圧は、 となり、Lレベルのしきい値よりも低くなって、双方共
にレシーバ回路は相手方がLレベルを送出していること
を認識できる。
FIG. 2(b) is an explanatory diagram when both sides send out the same level. First, if both sides send H level, 0
The voltage at the point is almost the VccO value, which is higher than the H level threshold, and the receiver circuits of both sides realize that the other side is H level.
You can recognize that the level is being sent. Furthermore, when both parties send out H level, the voltage at the 0 point is as follows, which is lower than the L level threshold, and both receiver circuits can recognize that the other party is sending out L level.

このように、本実施例では、レシーバ回路は、如何なる
場合でも通信線上の電圧をHレベル又はLレベルと識別
できるので、同時送受信が可能になる。
In this way, in this embodiment, the receiver circuit can identify the voltage on the communication line as H level or L level in any case, so simultaneous transmission and reception is possible.

〔発明の効果〕〔Effect of the invention〕

以上説明したとおり、本発明によれば、1本の信号線で
双方向通信を行い、かつ送受信に対する待ち時間を発生
させず、時間的なロスを低減する双方向同時通信方式を
提供することができる。
As explained above, according to the present invention, it is possible to provide a simultaneous two-way communication system that performs two-way communication using one signal line, does not generate waiting time for transmission and reception, and reduces time loss. can.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の構成図、 第2図は本発明の一実施例の説明図、 第3図は従来例の構成図である。 1.31;ドライバ回路、 2.32iレシ一バ回路。 本発明の一貧淀9りの回路図 第1図 本発明の−X′施例の説明図 第2図 FIG. 1 is a configuration diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of an embodiment of the present invention, FIG. 3 is a configuration diagram of a conventional example. 1.31; Driver circuit, 2.32i receiver circuit. Circuit diagram of the present invention Figure 1 Explanatory diagram of -X' embodiment of the present invention Figure 2

Claims (1)

【特許請求の範囲】  ドライバ回路(1)及びレシーバ回路(2)を備えた
装置の一対が1本の通信線で接続され、一方のレシーバ
回路(2)が相手方のドライバ回路(1)の送出する信
号が高レベルであるか低レベルであるかを識別すること
により双方向通信を行う際の同時通信方式において、 通信線に送出した電圧の高レベル信号に対応する値と低
レベル信号に対応する値との平均値が所定値(VA)に
なる信号電圧を出力するドライバ回路(1)と、 高レベル信号より作成される高レベルしきい値(VB)
又は低レベル信号より作成される低レベルしきい値(V
C)と前記所定値(VA)と比較するレシーバ回路(2
)とを備え、 前記所定値(VA)が高レベルしきい値(VB)よりも
低く、かつ低レベルしきい値(VC)よりも高くなる信
号電圧をドライバ回路(1)が出力することを特徴とす
る双方向同時信号方式。
[Claims] A pair of devices including a driver circuit (1) and a receiver circuit (2) are connected by one communication line, and one receiver circuit (2) transmits the other driver circuit (1). In the simultaneous communication method when performing two-way communication by identifying whether the signal sent to the communication line is high level or low level, the value corresponding to the high level signal of the voltage sent to the communication line and the value corresponding to the low level signal are determined. A driver circuit (1) that outputs a signal voltage whose average value is a predetermined value (VA), and a high-level threshold (VB) created from a high-level signal.
Or a low level threshold (V
C) and the predetermined value (VA).
), the driver circuit (1) outputs a signal voltage such that the predetermined value (VA) is lower than a high level threshold (VB) and higher than a low level threshold (VC). Features a two-way simultaneous signal system.
JP20036488A 1988-08-11 1988-08-11 Bidirectional simultaneous communication system Pending JPH0250537A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20036488A JPH0250537A (en) 1988-08-11 1988-08-11 Bidirectional simultaneous communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20036488A JPH0250537A (en) 1988-08-11 1988-08-11 Bidirectional simultaneous communication system

Publications (1)

Publication Number Publication Date
JPH0250537A true JPH0250537A (en) 1990-02-20

Family

ID=16423075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20036488A Pending JPH0250537A (en) 1988-08-11 1988-08-11 Bidirectional simultaneous communication system

Country Status (1)

Country Link
JP (1) JPH0250537A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0635954A2 (en) * 1993-07-20 1995-01-25 Hitachi, Ltd. Full duplex driver - receiver
CN107342791A (en) * 2016-12-12 2017-11-10 中国矿业大学 The method that power supply and data are transmitted between mining geophone and substation

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0635954A2 (en) * 1993-07-20 1995-01-25 Hitachi, Ltd. Full duplex driver - receiver
US5499269A (en) * 1993-07-20 1996-03-12 Hitachi, Ltd. Transmission-reception circuit
EP0635954A3 (en) * 1993-07-20 1997-12-17 Hitachi, Ltd. Full duplex driver - receiver
CN107342791A (en) * 2016-12-12 2017-11-10 中国矿业大学 The method that power supply and data are transmitted between mining geophone and substation
CN107342791B (en) * 2016-12-12 2021-02-05 中国矿业大学 Method for transmitting power and data between mine-used vibration pickup and substation

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