JPH0819009A - Initialization circuit for subscriber circuit - Google Patents

Abstract

PURPOSE:To provide the initialization circuit for a subscriber circuit in which an integrated circuit and a mounted board are made small is the case of mounting the subscriber circuit with a single circuit. CONSTITUTION:A feeding circuit is intervened between a power source and an initial setting circuit having a voltage input section 21 and initializing a subscriber circuit when a voltage of a prescribed threshold voltage TV or below is applied to the voltage input section 21 for a prescribed threshold time TT or over consecutively, and is provided with a capacitor 31 connecting to a voltage input section 20 of the initial setting circuit 20, a resistor connecting to the power supply, and a charging means 33 connecting to the resistor and whose terminal voltage is less than the threshold voltage TV at least till the time reaches the threshold time TT.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an initial setting circuit for initializing a subscriber circuit for continuously supplying a voltage equal to or lower than a predetermined voltage threshold value for a predetermined time threshold value.

[0002]

2. Description of the Related Art A subscriber circuit of a digital exchange (hereinafter, simply referred to as "subscriber circuit") is provided with an initialized circuit for initializing a power supply control signal and various switch control signals when the power is turned on. ing.

Conventionally, as shown in FIG. 5, the initialized circuit is mounted in a multi-connection on a substrate called a subscriber package. Further, the initial setting circuit has a voltage input section POR, and the voltage setting section POR is connected to an initial setting circuit composed of a resistor R and a capacitor C, as shown in FIG. Then, the initialized circuit initializes the subscriber circuit when a voltage equal to or lower than the predetermined voltage threshold is input to the voltage input unit POR for a predetermined time threshold.

In recent years, for the purpose of improving the maintainability of the subscriber circuit, so-called per-line mounting, which is implemented in one circuit of the subscriber circuit, has been required. In order to realize this per-line, it is necessary to provide an initial setting circuit of a subscriber circuit for each line, and at that time, it is required to incorporate the circuit into an integrated circuit IC to downsize the mounting board. .

[0005]

However, if the conventional initialization circuit is used in order to realize the parlining, there is a problem that either one of the integrated circuit IC and the mounting board must be increased in size. appear.

The reason why this problem occurs is as follows. First, the larger the resistance value of the resistor R, the larger the chip area of the integrated circuit IC incorporating the resistor R. Therefore, in order to downsize the integrated circuit IC, it is necessary to reduce the resistance value of the resistor R.

However, when the resistance value is reduced, the current for charging the capacitor C increases, so that the terminal voltage of the capacitor C reaches the predetermined voltage threshold TV within the predetermined time threshold TH.

Therefore, there arises a problem that the initial setting circuit cannot be initialized. In order to avoid this problem, the voltage of the power supply is lowered or the capacity of the capacitor C is increased to slow down the rising speed of the terminal voltage of the capacitor C and extend the time for the terminal voltage to reach the predetermined voltage threshold TV. You can just brush it.

However, since the voltage of the power source is often predetermined, it is not easy to change it. It is also possible to use a voltage conversion converter or the like, but this causes a problem that the mounting board becomes large.

On the other hand, increasing the capacitance of the capacitor C still causes the problem of increasing the size of the mounting board. The reason is that it is difficult to embed the capacitor C in the integrated circuit IC, so that the capacitor C must be mounted. It is difficult to embed the capacitor C in the integrated circuit IC because the capacitor C has a structure in which electrodes are sandwiched on both sides of the dielectric, and this structure is difficult to realize in the manufacturing process of the integrated circuit IC. .

After all, when the integrated circuit IC is miniaturized by incorporating the resistor R having a small resistance value, the capacitor C having a large capacity has to be externally attached and the mounting board becomes large. On the contrary, when the mounting board is miniaturized by externally attaching the capacitor C having a small capacitance, the resistor R having a large resistance value must be built in the integrated circuit IC, and the integrated circuit I
C becomes larger.

The present invention has been made in view of the above problems, and when the subscriber circuit is mounted in a single circuit, the initial setting of the subscriber circuit which enables miniaturization of both the integrated circuit and the mounting board. An object is to provide a circuit.

[0013]

In order to solve the above-mentioned problems, the present invention has a voltage input section 21, and this voltage input section 2
1 is a voltage equal to or lower than a predetermined voltage threshold TV and a predetermined time threshold T
In the initialization circuit interposed between the initialization target circuit 20 which initializes the subscriber circuit 10 and the power supply 40 which supplies the electric energy when input is made for up to T or more,
The following means were adopted. <Summary of the Present Invention> The initial setting circuit of the subscriber circuit of the present invention includes a capacitor 31, a resistor 39, and a charging means 33. [Capacitor] The capacitor 31 is the initial setting circuit 20.
Is connected to the voltage input unit 21. As the capacitor 31, for example, a porcelain capacitor, a styrene capacitor, a paper capacitor, a polyester film capacitor, an electrolytic capacitor or the like can be used. [Resistor] The resistor 39 is connected to the power supply 40.

The resistor 39 may be a thin film resistor, a diffusion resistor, a poly-Si resistor, a depletion resistor, an enhancement resistor or the like when the subscriber circuit initialization circuit of the present invention is incorporated in an integrated circuit IC. it can. [Charging Means] The charging means 33 is connected to the resistor 39 and charges the capacitor 31 so that its terminal voltage is less than the voltage threshold TV at least until the time threshold TT.

Further, the charging means 33 synchronizes with the pulse signal based on the internal clock of the integrated circuit IC and the capacitor 3
It is also possible to charge 1 intermittently. Then, the charging means 33 is switched by an external input so that the amount of electricity required for the terminal voltage of the capacitor 31 to rise to the voltage threshold TV is charged to the capacitor 31 within the time equal to or less than the time threshold TT. It is also possible to do so. [Applicability of the Present Invention] The initial setting circuit of the subscriber circuit of the present invention can be built in the integrated circuit IC except for the capacitor 31. In this case, the integrated circuit IC may be a digital integrated circuit or a linear integrated circuit. Moreover, the degree of integration does not matter. Therefore,
Small scale integrated circuit (SSI), medium scale integrated circuit (MS
I), large scale integrated circuit (LSI) or VLSI (V)
LSI).

[0016]

[Action]

[Operation of Essential Components of the Present Invention] According to the present invention,
The electric energy supplied from the power source 40 is charged in the capacitor 31 from the resistor 39 via the charging means 33.

As a general characteristic of the capacitor, the terminal voltage of the capacitor 31 is proportional to the amount of electricity charged (hereinafter, also referred to as "charge amount"). This charge is
It is the time integral of the current.

Since the resistor 39 has a structure connected to the capacitor 31 via the charging means 33,
Even if the resistance value is reduced, the time required for the terminal voltage of the capacitor 31 to rise to the voltage threshold TV is not shortened. Therefore, when the resistor 39 is built in the integrated circuit IC, it is possible to reduce the size of the integrated circuit by reducing the resistance value.

On the other hand, when the capacitance of the capacitor 31 is reduced, the time required for the terminal voltage to rise to the voltage threshold TV is shortened when the same amount of charge is supplied. However, the charging means 33 charges the capacitor 31 so that its terminal voltage rises to the voltage threshold TV over at least the time threshold TT. Therefore, it is possible to reduce the size of the mounting substrate by reducing the capacitance of the capacitor 31.

FIG. 4 shows how the terminal voltage changes when the amount of electricity supplied to the capacitor 31 is changed.
Will be described with reference to. Straight line (B) in FIG.
As shown in FIG. 4B, shows the state of the terminal voltage change when the amount of electricity is “I _b ” until time t 1 and the amount of electricity is “0” after that. In this case, time t
At 1, the terminal voltage reaches the TV.

The straight line (C) in FIG.
As shown in (c), the current amount “I _c ” until time t2.
Then, after that, the state of the change of the terminal voltage when the electric quantity of the electric current "0" is given is shown. Here, I _c <I _b . In this case, the terminal voltage reaches the TV at time t2 after time t1.

The broken line (D) in FIG.
As shown in (d), the state of the terminal voltage changes when the electric current amount “I _b ” and the electric current amount “0” give an electric amount with a duty ratio of 50% until time t3. In this case, the terminal voltage reaches the TV at time t3 which is twice the time t1.

As is clear from comparison between the straight line (B) and the broken line (D), even if the same amount of current is momentarily given, if the amount of electricity, which is the time integration of the current, is different, the capacitor 31 It can be seen that there is a difference in the change in the terminal voltage of.

Generally, when an electric quantity is applied to the capacitor in a pulse form as shown in FIG. 4D, the time required for the terminal voltage of the capacitor to rise to a predetermined value is considered to be inversely proportional to the duty ratio of the pulse. .

Here, the time required for the terminal voltage of the capacitor to rise to a predetermined value is also inversely proportional to the capacity of the capacitor. Therefore, if the capacitance of the capacitor is reduced and the time required for the terminal voltage of the capacitor to rise to a predetermined value is kept constant, it is understood that the duty ratio of the pulse should be lowered. [Operation when the charging unit 33 is switched to charge the capacitor 31 within the time equal to or less than the time threshold value TT]
When the charging means 33 is switched so as to charge the capacitor 31 within the time less than or equal to the time threshold value TT, it is possible to test whether or not the charging means 33 is generating a constant current as designed. Become.

That is, whether or not a constant current is flowing is
It is determined whether or not the initialized circuit 20 is reset according to the standard when the capacitor 31 is continuously charged. [Operation when Initialized Setting Circuit 20 and Charging Means 33 are Built in Integrated Circuit IC] Initialized Setting Circuit 20 and Charging Means 3
By incorporating 3 in the integrated circuit IC, both the integrated circuit and the mounting board can be downsized when the subscriber circuit is mounted in one circuit.

[0027]

Embodiments of the present invention will be described below with reference to the drawings. [Outline of Embodiment] FIG. 3 is a block diagram of an embodiment of the present invention.
Shown in In this embodiment, a large-scale integrated circuit having a subscriber circuit 10 built in a board and a capacitor 31 are mounted.
The subscriber circuit 10 also includes a control circuit 20 and an initialization circuit 30. <Structure of Control Circuit 20> The control circuit 20 is a circuit for initializing the subscriber circuit, and has a RESET input terminal 2
1, a SW control output terminal 22 and a power feeding control output terminal 23.

The RESET input terminal 21 is connected to the Schmitt trigger 37 of the initialization circuit 30. SW
The control output terminal 22 is a terminal that outputs various switch control signals when a voltage equal to or lower than a predetermined voltage threshold TV is input to the RESET input terminal 21 for a predetermined time threshold TT or more.

The power supply control output terminal 23 outputs a power supply control signal when a voltage equal to or lower than a predetermined voltage threshold TV is input to the RESET input terminal 21 for a predetermined time threshold TT or more. <Structure of Initial Setting Circuit 30> The initial setting circuit 30 includes a resistor 39 connected to a voltage source 40 of a voltage V _CC and a resistor 39.
9, a charging unit 33 connected to 9, a Schmitt trigger 37 connected to the charging unit 33 and the control circuit 20, a capacitor 31 connected to the Schmitt trigger 37, and a charging unit 33. AND circuit 38, a frequency dividing counter 35 connected to the AND circuit 38, a clock input terminal 34 connected to the frequency dividing counter 35, and a test signal input terminal 36 connected to the AND circuit 38. Has been done.

Hereinafter, each component will be described in detail. <Description of Resistor 39> The resistor 39 has one end connected to the voltage source 40 and the other end connected to the PNP transistor 33a of the charging unit 33.
Connected to the emitter terminal of. <Description of Charging Unit 33> The charging unit 33 is a current mirror constant current circuit, and has a transistor 33a whose emitter terminal is connected to the voltage source 40 and whose collector terminal is connected to the Schmitt trigger 37 and the capacitor 31. The charging unit 33 also includes a transistor 33b having an emitter terminal connected to the voltage source 40, a base terminal connected to a collector terminal, and a base terminal connected to the base terminal of the transistor 33a. And
The charging unit 33 has a resistor 33c connected to the collector terminal of the transistor 33b.

Here, the transistors 33a and 33b are
PNP transistors with the same characteristics are selected. Also, the resistance 3
For the resistance value R of 3c, the equation (1) is established when an “L” level signal is input to the clock input terminal 34, and conversely when the “H” level signal is input to the clock input terminal 34. It is chosen so that (2) holds. I _C0 = (V _CC −V _BE ) / R = I _C1 (1) I _C0 = I _C1 = 0 (2) where V _BE : base-emitter voltage of the transistors 33 a and 33 b I _C0 : current flowing through the emitter terminal of the transistor 33a I _C1 : current flowing through the emitter terminal of the transistor 33b <Description of the Schmitt trigger 37> The Schmitt trigger 37 has hysteresis in the input / output characteristics, and has a waveform of the input signal. The circuit is shaped and output, and has an input section and a connection section.

The input section is connected to the capacitor 31 and the collector of the transistor 33a. The output terminal is connected to the RESET input terminal 21 of the control circuit 20. <Description of Capacitor 31> The capacitor 31 is an element for generating a voltage input to the RESET input terminal 21 of the control circuit 20, and one end thereof has a Schmitt trigger 37.
Of the transistor 33a, and the other end is grounded. <Description of AND Circuit 38> The AND circuit 38 is a circuit that outputs a logical product of inputs, and has two input sections and one output section.

The two input sections are respectively provided with the frequency division counter 3
5 and the test signal input terminal 36. The output section is connected to the resistor 33c. <Description of Frequency Division Counter 35> The frequency division counter 35 is a circuit for inputting and outputting a pulse signal, and has an input section and an output section.

The input section is connected to the clock input terminal 34. The output section is connected to the input section of the AND circuit 38. <Description of clock input terminal 34> Clock input terminal 34
Is a large-scale integrated circuit LSI with a built-in subscriber circuit
Is a terminal for inputting the internal clock signal of. <Explanation of test signal input terminal 36> Test signal input terminal 36
Is a terminal for inputting an “L” level signal and checking whether or not a constant current of a design value is flowing inside the initial setting circuit. [Operation / Effect of Embodiment] Next, the operation of the present embodiment will be described. The operation of this embodiment includes a normal operation mode and a test mode. <Description of Normal Operation Mode> The normal operation mode is an operation for synchronously driving the constant current generated by the charging unit 33.

In the normal operation mode, the clock input terminal 3
4 is supplied with an internal clock signal, and the test signal input terminal 36 is supplied with an "H" level signal. Then, the internal clock signal input to the clock input terminal 34 is frequency-divided by the frequency division counter 35 and output.

Then, when the level of the output signal of the frequency dividing counter 35 is "L", the level of the output signal of the AND circuit 38 becomes "L", the collector current flows through the transistor 33b, and the effect of the current mirror circuit is brought about. , A collector current equal to the transistor 33a flows. Therefore, the capacitor 31 is charged.

On the other hand, when the level of the output signal of the frequency dividing counter 35 is "H", the level of the output signal of the AND circuit 38 becomes "H", the collector current of the transistor 33b becomes substantially "0", and the current mirror. Due to the effect of the circuit,
The collector current of the transistor 33a also becomes "0". Therefore, the capacitor 31 is no longer charged.

That is, the capacitor 31 is charged only when the level of the output signal of the frequency division counter 35 is "L". Therefore, the more the frequency division counter 35 outputs with the reduced duty ratio, the capacitor 31 is charged. , Will be charged quickly.

As described above, the capacitor 31 is intermittently charged, and FIG. 3 shows the time variation of the terminal voltage at that time. For comparison, FIG. 3 also shows the time change of the terminal voltage when the capacitor 31 is continuously charged. As is clear from FIG. 3, the time required for charging is approximately twice as long as the time required for intermittent charging as compared to the case required for continuous charging. This is because the duty ratio of the frequency division counter is reduced to about half. In FIG. 3, the discharge characteristic of the capacitor 31 is ignored. <Explanation of Test Mode> The test mode refers to an operation of testing whether or not the charging unit 33 is generating a constant current as designed. Whether the constant current is flowing or not is determined by the capacitor 3
When 1 is continuously charged, it is determined whether the control circuit 20 is reset according to the standard.

In the test mode, the "L" level signal is input to the test signal input terminal 36.

[0041]

According to the present invention, the charging means charges the capacitor such that its terminal voltage is below the voltage threshold for at least the time threshold. By performing such charging, it is possible to use a resistor with a small resistance value and a capacitor with a small capacitance, and when integrating the subscriber circuit into one circuit, it is possible to reduce the size of both the integrated circuit and the mounting board. It is possible to obtain a possible subscriber circuit initialization circuit.

[Brief description of drawings]

FIG. 1 is a first principle block diagram of the present invention.

FIG. 2 is a second principle block diagram of the present invention.

FIG. 3 is a block diagram of an embodiment of the present invention.

FIG. 4 is a diagram showing how the terminal voltage changes when the amount of electricity supplied to the capacitor is changed.

FIG. 5 is a diagram showing a mounting state of a conventional initialized circuit.

[Explanation of symbols]

 TV ... Voltage threshold TT ... Time threshold 10 ... Subscriber circuit 20 ... Initialized circuit (control circuit) 21 ... Voltage input unit 30 ... Initial setting Circuit 31 ··· Capacitor 33 ··· Charging device 35 ··· Dividing device 39 ··· Resistor

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masafusa Sato, 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Taichi Kosako, 1015, Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture

Claims (4)

[Claims] 1. A voltage input unit (21) is provided, and when the voltage input unit (21) inputs a voltage equal to or lower than a predetermined voltage threshold value (TV) for a predetermined time threshold value (TT), it joins. Initialized circuit (20) for initializing the user circuit (10)
And a capacitor (31) which is an initialization circuit interposed between a power supply (40) for supplying electric energy and which is connected to a voltage input section (21) of the initialization target circuit (20), A resistor (39) connected to the power source (40) and the capacitor (31) connected to the resistor (39)
The terminal voltage is at least the time threshold (TT)
An initial setting circuit for a subscriber circuit, comprising: a charging unit (33) that charges the battery so as to be less than the voltage threshold (TV). 2. The charging means (3) according to claim 1,
3) is the capacitor (31) in synchronization with the pulse signal.
An initial setting circuit for a subscriber circuit, which is characterized by intermittently charging a battery. 3. The integrated circuit (I) according to claim 1, wherein the initialized circuit (20) and the charging means (33) are integrated circuits (I).
The charging means (33) is incorporated in C), and the charging means (33) intermittently charges the capacitor (31) in synchronization with a pulse signal based on an internal clock of the integrated circuit (IC). Initial setting circuit of the user circuit. 4. The charging means (33) according to any one of claims 1, 2 and 3, wherein the terminal voltage of the capacitor (31) rises to the voltage threshold (TV) by an external input. An initial setting circuit of a subscriber circuit, wherein an amount of electricity required for charging is switched so as to charge the capacitor (31) within a time equal to or less than the time threshold (TT).