JPH08172322A - High frequency pwm control circuit - Google Patents

Abstract

PURPOSE: To make it possible to apply a PWM up to a high frequency area which can not be applied in a conventional circuit and to improve the energy efficiency of many power control equipments. CONSTITUTION: The high frequency PWM control circuit consists of an oscillator 1 for outputting a square wave corresponding to a PWM carrier, a voltage controlled oscillator 2 for outputting a signal with frequency corresponding to input voltage, a phase comparator 3 for outputting a square wave with duty corresponding to a phase difference between an output from the oscillator 2 and an output from the oscillator 1, and an adder 4 for generating voltage obtained by adding an output from the comparator 3 to the input Vi of the PWM and outputting the voltage output to the oscillator 2. The output of the comparator 3 is set up to an output V0 from the PWM.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency PWM control circuit which can be easily applied to various inverters, switching power supplies and the like, as well as to fields requiring a higher frequency response such as audio output.

[0002]

Heretofore, the power control by the PWM is widely used from the good energy efficiency, response frequency of the controlled power number KH _Z is the upper limit. Therefore 20 kHz _Z or more audio power amplifier such as a low linear power control circuit energy efficient than PWM in the frequency response is required it is common today.

This PWM (Pulse Width Mo
(duration) is pulse width modulation, in which the output is repeatedly turned on and off in a certain cycle, and the average value of one cycle, that is, the duty (ON time / cycle) corresponds to the input, for example, a circuit for performing proportional control. Say.

The PWM control circuit widely used at present is a combination of a triangular wave oscillator and a voltage comparator. The voltage comparator is usually simply referred to as a comparator or a comparator, but in this case, the term "voltage comparator" will be used to clarify the distinction from the term "phase comparator".

An example of the configuration of these conventional PWM control circuits will be described with reference to FIG. 6. Reference numeral 101 is a triangular wave oscillator,
Its output V ₂ is connected to the (−) input of the voltage comparator 102, while the (+) input of the voltage comparator 102 is connected to the input voltage V ₁ as input to the PWM,
At the output V ₃ of the voltage comparator 102, a signal which has the same period as the triangular wave and whose ON time ratio, that is, the duty, changes in proportion to the input is obtained, and this output is the PWM control signal. Normally, this PWM control signal is used as a drive signal for the power switching element to control its output power.

The operation will be described with reference to FIG. 7. The horizontal direction indicates time, and the vertical direction indicates voltage.
Reference numeral 112 denotes an output of the triangular wave oscillator, which rises with a constant gradient with time and then descends with a constant gradient when the maximum value is reached, then rises again when the minimum value is reached, and this operation is repeated thereafter. Further, 111 is an input voltage, and its instantaneous value is included between the minimum and maximum values of the triangular wave, and its changing speed is sufficiently slower than the triangular wave, in other words, the input voltage is higher than the triangular wave frequency. When the frequency is required to be sufficiently low and this condition is satisfied, 113 is the output of the voltage comparator. As shown in the figure, if the input voltage is higher than the instantaneous value of the triangular wave, a high voltage, that is, ON, If it is low, the voltage is low, that is, OFF. The average of this output in one cycle of the triangular wave is proportional to the input voltage. With this, PWM is realized. The frequency at which the output is turned on and off is called the PWM carrier frequency or switching frequency. In this example, the triangular wave frequency is the carrier frequency. Moreover, this frequency component is simply called a carrier.

Although not conventionally associated with PWM, a widely used technique is PLL (Phase).
Locked Loop) is known. Here, once describing the PLL apart from the PWM, this PLL is a method of locking or fixing the phase of the signal to another reference signal.

FIG. 8 shows its basic configuration. 201 is the above-mentioned reference signal source, the phase of this output is θ _i , 202 is a phase comparator, and the reference signal and voltage controlled oscillator 204 (hereinafter The output of "VCO" is also used as two inputs to generate a voltage proportional to the phase difference,
This output is V _φ . Reference numeral 203 denotes a loop filter, which takes out a necessary frequency component from the output of the phase comparator 202, inputs it to the next VCO 204, and sets this output as V _v . The voltage controlled oscillator 204 is an oscillator that outputs a signal having a frequency proportional to the input voltage. The phase of this output is θ _0, and this output is connected to one input of the aforementioned phase comparator to form a loop.

Next, regarding the operation, the input signal and VC
The output of O may be a sine wave or a square wave. Here, in the case of a square wave, the state where the input signal and the output frequency of the VCO match is the state where the PLL is locked. At this time, there is a constant phase difference between θ _i and θ ₀ . The phase comparator 202 generates a voltage proportional to this phase difference. There are several methods for implementing the phase comparator 202, but here, the case where an EX-OR gate, which is a general-purpose digital element, is used will be described.

FIG. 9 shows an EX-OR gate with a phase comparator 20.
2 shows the operation when used, where the horizontal direction indicates time and the vertical direction indicates voltage. 211 is the reference signal θ _i , and 2
Reference numeral 12 is the output θ ₀ of the VCO, and reference numeral 213 is the output V _φ of the phase comparator. When either of these two inputs θ _i and θ ₀ is high voltage, that is, ON, the output is ON, and when it is other than that, the output is low voltage, that is, OFF. As shown in the figure, when the phase difference between the two inputs is 1/4 cycle, that is, π / 2 expressed in radians, the average value of the outputs is 1 of the high voltage.
/ 2. In general, the phase difference between two inputs is plotted on the horizontal axis, and the average value of the outputs is plotted on the vertical axis.

The loop filter 203 is for extracting the average value of this output, and a low pass filter is usually used. Not only the EX-OR gate but any type of phase comparator uses not only the voltage proportional to the phase difference but also a high frequency component such as a carrier frequency in its output. The loop filter 203 is used to remove this high frequency component, and also has the function of determining the response of the entire PLL. The output V _v of the loop filter 203 is input to the VCO 204 and oscillates a signal having a certain frequency determined by its voltage. The state in which the signals of these parts are balanced is the locked state.

If θ _i changes for some reason, the phase comparator 202 changes the output according to the phase difference, and this change is input to the VCO 204 after passing through the loop filter 203 and θ ₀ Cause changes. If this change in θ ₀ becomes the same as the change in θ _i , the phase difference (θ _i −θ ₀ ) between them again becomes the same as the original state. In this way, it is P that operates so that the phase difference between θ _i and θ ₀ becomes constant.
It is LL.

[0013]

It is considered that there should be a relationship of carrier frequency / response frequency = about 100 or more between the PWM carrier frequency and the output response frequency. (A). Good reproducibility of the input signal, (b). This is because the carrier is required to be sufficiently suppressed.

For (a) above, since the input is approximated by the average value of one cycle of the carrier, the closer the cycle time is to the output change time, the better the approximation. The larger the frequency ratio,
This is because a large attenuation factor of the output low-pass filter can be obtained. That would be to obtain the response frequency of 20 kHz _z are required carrier frequencies above about 2 MH _z.

[0015] In the conventional method shown in the previous section is not easy to a carrier frequency above 1 MH _z. The reason is that the triangular wave is difficult to handle at high frequencies, because the waveform is broken due to the phase shift of the circuit, and it is difficult to increase the speed of the voltage comparator. Because it will be. Even the currently available PWM control IC has a carrier frequency of 1M.
_Few operate above H _z . Further, in order to increase the frequency, not only the control circuit but also the power control element itself used in the output stage must be speeded up.

[0016]

SUMMARY OF THE INVENTION An object of the present invention is to solve such a problem without using a triangular wave or a voltage comparator. The PWM control circuit of the invention according to claim 1 is a PWM controller. An oscillator that outputs a square wave corresponding to the carrier, a voltage-controlled oscillator that outputs a signal of a frequency corresponding to the input voltage, and a duty ratio corresponding to the phase difference between the output from this voltage-controlled oscillator and the output from the oscillator. The phase comparator includes a phase comparator that outputs a square wave, and an adder that generates a voltage obtained by adding the output from the phase comparator and the input to the PWM and outputs the output to the voltage controlled oscillator. The output of the device is the output from the PWM.

According to a second aspect of the present invention, there is provided the PWM control circuit according to the first aspect of the present invention, wherein the output from the adder is output to the voltage controlled oscillator through a loop filter. .

According to a third aspect of the present invention, in the PWM control circuit of the first aspect, the input to the PWM is output to the adder through one loop filter and the output from the phase comparator. Is output to the adder through the other loop filter.

[0019]

As described above, in the PLL operating with a square wave, a square wave having a duty proportional to the phase difference between the two inputs is obtained at the output of the phase comparator. In the conventional PLL, the output of the phase comparator uses only its direct current and low frequency components, that is, components having a frequency sufficiently lower than the oscillation frequency, and the components of the oscillation frequency have been discarded.

However, this duty-controlled square wave is nothing but PWM. That is PL
L PWM control circuit configuration and used in that form the output of the phase comparator is considered of, PWM of high frequency is considered to be sufficient possible because applications up to about 100 MHz _z in the PLL is easy. However, two signals with a phase difference proportional to the input voltage must be generated. This can be achieved by adding the input voltage to the output of the phase comparator.

The input voltage of the VCO is constant when the PLL is locked to a signal of a constant frequency. This does not depend on the phase difference between the locked original signal and the VCO output signal.
This is because the VCO oscillation frequency has a one-to-one relationship with the current value of the input voltage, but its phase has no unique relationship with the current value of the input voltage.

Therefore, if a voltage other than the output of the phase comparator is applied to the input voltage to the VCO in this state, the output of the phase comparator changes so as to cancel it. The fact that the output of the phase comparator changes means that the duty of the square wave, which is its output, changes, so the above can be realized. That is, if the voltage other than the output of the phase comparator applied to the input of the VCO is considered as the input of PWM, the output of the phase comparator is the output of PWM. The above is the principle of the PWM control circuit of the present invention.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of an embodiment of the invention described in claim 1, and 1 is an oscillator for outputting a square wave corresponding to a PWM carrier. This frequency may be equal to the PWM carrier frequency, or may be half the frequency depending on the type of phase comparator.

Reference numeral 2 is a voltage-controlled oscillator (hereinafter referred to as "VC
Also referred to as "O". ) Corresponding to the input voltage V _v , in this case, a square wave signal having a proportional frequency is output.

Reference numeral 3 denotes a phase comparator, which is a square wave V having a duty proportional to the phase difference (θ _i −θ ₀ ) between the output θ _i from the oscillator 1 and the output θ ₀ from the voltage controlled oscillator 2.
Generate _φ .

Reference numeral 4 denotes an adder, which outputs the output from the phase comparator 3 and the input voltage V _i as an input to the PWM circuit.
A voltage V _v obtained by adding and is generated, and this output is input to the voltage controlled oscillator 2.

Then, the output V _φ from the phase comparator 3
Is taken out as the output V ₀ from the PWM circuit as it is, and the PW of the present invention is applied to the input voltage V _i as the input to the PWM circuit of the present invention.
PWM with output voltage V ₀ as output from M circuit
Is generating a signal.

Since the qualitative explanation has been given above, the operation will be quantitatively explained here using the equation. In FIG. 1, θ _i = input phase [rad] θ ₀ = output phase [ rad] K _φ = gain constant of phase comparator [V / rad] K _V = conversion gain of VCO [rad / Vs] V _i = input voltage [V] V _φ = output voltage of phase comparator [V] V _o = the PWM output voltage [V] V _v = VCO input voltage [V].

In FIG. 1, if the input voltage V _i and the adder 4 are not provided and the output of the phase comparator 3 is directly connected to the VCO 2, it is a basic circuit of a PLL without a loop filter. In this case, the response of θ _{o to} θ _i is V _φ = (θ _i −θ _o ) K _φ (1) V _v = V _φ (2) dθ _o / dt = V _v K _V (3) ∴dθ _o / dt = (θ _i −θ _o ) K _φ K _V (4) When the equation (4) is Laplace transformed, sθ _o (s) = (θ _i (s) −θ _o (s)) K _φ K _V (5 ) ∴ θ _o (s) / θ _i (s) = K _φ K _V / (s + K _φ K _V ) (6) This is one in which the characteristic of the loop filter is set to 1 in the well-known basic equation of the response of the PLL. Here, if θ _i is constant and, instead, a voltage V _i = θ _i 'K _φ (7) is added to the output of the phase comparator 3,
It is equivalent to the phase of θ _i 'added to the input of the phase comparator 3. This is realized by the adder 4 provided after the phase comparator 3. The response of the theta _o for V _i by substituting from _{θ i '= V i / K} φ Equation (7) (8) to theta _i of formula _{(6), θ o (s} ) / V i (s) = K _V / (s + K _φ K _V ) (9)

Since the output V _o from the PWM is equal to the output V _φ of the phase comparator and θ _i is constant, the equation (1)
Therefore, V _o = V _φ = −θ _o K _φ (10), that is, θ _o = −V ₀ / K _φ (11) Substituting this into equation (9), V _o (s) / V _i (s) = −K _φ K _V / (s + K _φ K _V ) (12)

This is the basic formula of this PWM response.
This is the same characteristic as the expression (6) except that the sign is different. That is, the response of the output from the PWM to the input voltage as the input to the PWM is the same as the characteristic of the PLL used.

In FIG. 1, there is usually no loop filter provided after the phase comparator in the PLL. This is because it is possible to operate without the loop filter in principle as described above. The role of the loop filter in the PLL is as described above, and the loop filter can be used for the same purpose in the present invention.

FIG. 2 is a block diagram of an embodiment of the invention described in claim 2. In FIG. 1 as an embodiment of the invention described in claim 1, a loop filter is provided after the adder 4 in FIG. 5 is provided and the output from the adder 4 is output to the voltage controlled oscillator 2 through the loop filter 5, and the other configuration is the same as that of the embodiment of FIG.

In the operation in this case, if K _F = filter gain is dimensionless and the same calculation as in the case of FIG. 1, equation (2) is changed to V _v = V _φ K _F (13), and equation (12) becomes _{V o (s) / V i} (s) = - a _{K φ K F K V / (} s + K φ K F K V) (14).

FIG. 3 is a block diagram of an embodiment of the invention according to claim 3, and in FIG. 1 as an embodiment of the invention according to claim 1, there are two loop filters 6 having the same characteristics. 7 is used to output the input to the PWM to the adder 4 through one loop filter 6 and the output from the phase comparator 3 to the adder 4 through the other loop filter 7, and thus the input voltage V _The voltage at which _i has passed through the loop filter 6 and the output V of the phase comparator 3
_φ is for adding with the voltage passed through the loop filter 7 by the adder 4, and the other configuration is the same as the embodiment of FIG.

In this case, considering at the input of the adder 4, V _i is equivalent to the input of V _i K _F = θ _i 'K _φ K _F (15) θ _i ' to the phase comparator.
That is, V _i = θ _i 'K _φ (16), which is the same as the equation (7), and thus the same result as in the case of FIG.

The merit of the embodiment of FIG. 3 compared with the embodiment of FIG. 2 is that in implementing the circuit, it is not necessary to input a high-frequency square wave having a large amplitude to the adder, and the input condition of the adder is The point is that it will be easier.

FIG. 4 is a circuit diagram of a prototype in which the embodiment shown in FIG. 3 is applied to a power amplifier. In this case, the PWM carrier frequency is 4 MHz and the output response frequency is 20 kHz.
Was the goal. The load resistance was 8Ω.

Explaining the configuration of the circuit of FIG. 4, V _i
Is the input voltage as the input to the PWM and the output power as the output from the PWM is available at P ₀ . The power supply also supplies DC power from P _i . In this example, the DC voltage component of the input voltage V _i is cut by the capacitor C ₁ , but it is possible to design the input voltage V _i so that it responds to DC.

Block A is an amplifier for input voltage, which is for amplifying a minute input voltage to the same level as a carrier signal, and block B is a loop filter, which is the loop filter of FIG. It corresponds to 6,
Further, the block C is a loop filter and corresponds to the loop filter 7 of FIG. 3, and the block D is an adder,
This corresponds to the adder 4 in FIG. This adder has potentiometer VR in addition to the outputs from the two loop filters.
A constant voltage from ₁ is applied. This is input 0
The output of the adder is the sum of all of these, and the output from the PWM also changes in accordance with the sum of all of these.

The block E is P corresponding to the oscillator 1 of FIG.
WM is an oscillator of the carrier signal, and uses a square wave oscillator 1/2 of 2 MH _z of 4 mH _z is the actual carrier frequency for using the EX-OR gate to the phase comparator in this example. An RS-flip-flop type phase comparator or the like can also be used.

The block F includes most of the functions of the PLL, and corresponds to the phase comparator 3 and the voltage controlled oscillator 2 shown in FIG.

A block G is a power switching circuit, and a PWM signal V as an output from the PWM from the block F
Upon receiving _φ , the supplied power P _i is switched. L ₂ , C ₆
Consists of a low-pass filter that suppresses the carrier signal so that a waveform similar to the input voltage V _i can be obtained at the output P ₀ .

In order to confirm that the operation of this prototype is as described above, the frequency characteristics of this prototype shown in FIG. 5 were obtained by measurement. It is measured with a load resistance of 8Ω connected.

In this figure, 11 is a frequency characteristic of amplitude.
The horizontal axis represents frequency, the vertical axis represents output amplitude / input amplitude, that is, gain, and the scale on the left is used.

12 is the frequency characteristic of the phase, the horizontal axis is 1
1 shows the frequency in common, and the vertical axis shows the phase difference of the output with respect to the phase of the input in degrees, and the scale on the right side is used.

From this figure, it can be said that the intended goal has been achieved.

[0048]

As described above, the invention according to claim 1 is the PW.
An oscillator that outputs a square wave corresponding to the M carrier, a voltage-controlled oscillator that outputs a signal of a frequency corresponding to the input voltage, and a duty corresponding to the phase difference between the output from this voltage-controlled oscillator and the output from the oscillator. A phase comparator that outputs a square wave, and an adder that generates a voltage that is the sum of the output from this phase comparator and the input to the PWM, and that outputs this output to the voltage controlled oscillator, By setting the output of the phase comparator to the output from the PWM, it becomes possible to apply the PWM up to the high frequency region, which cannot be applied conventionally, and it is useful for improving the energy efficiency of many power control devices.

According to the second aspect of the present invention, the output from the adder is output to the voltage controlled oscillator through the loop filter, and in addition to the effect of the first aspect of the invention, the average value of the outputs can be taken out. Since the high frequency component such as the carrier frequency can be removed, the operation of the voltage controlled oscillator is stabilized and the response of the entire circuit can be arbitrarily determined.

According to a third aspect of the present invention, the input to the PWM is output to the adder through one loop filter, and the output from the phase comparator is output to the adder through the other loop filter. In addition to the effects of the first aspect of the present invention, in implementing the circuit, it is not necessary to input a high-frequency square wave having a large amplitude to the adder, and the input condition of the adder can be simplified.

As described above, the intended purpose is sufficiently achieved.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of an embodiment of the invention described in claim 1.

FIG. 2 is a circuit block diagram of an embodiment of the invention described in claim 2.

FIG. 3 is a circuit block diagram of an embodiment of the invention described in claim 3.

FIG. 4 is a circuit diagram of a prototype to which the invention according to claim 3 is applied.

FIG. 5 is a frequency characteristic diagram of the circuit of the prototype of FIG.

FIG. 6 is a configuration system diagram of a PWM control circuit which has been conventionally used.

7 is a waveform diagram for explaining the operation of the PWM control circuit shown in FIG.

FIG. 8 is a configuration system diagram of a conventionally used PLL.

9 is an explanatory waveform diagram of the PLL shown in FIG.

10 is an explanatory waveform diagram of the PLL shown in FIG.

[Explanation of symbols]

 1 oscillator 2 voltage controlled oscillator 3 phase comparator 4 adder 5 loop filter 6 loop filter 7 loop filter

Claims (3)

[Claims] 1. An oscillator which outputs a square wave corresponding to a PWM carrier, a voltage controlled oscillator which outputs a signal having a frequency corresponding to an input voltage, and a position between an output from the voltage controlled oscillator and an output from the oscillator. A phase comparator that outputs a square wave with a duty corresponding to the phase difference, and a voltage that is the sum of the output from this phase comparator and the input to the PWM are generated,
A PWM control circuit comprising an adder for outputting this output to the voltage controlled oscillator, wherein the output of the phase comparator is an output from PWM. 2. The PWM control circuit according to claim 1, wherein the output from the adder is output to the voltage controlled oscillator through a loop filter. 3. The input to the PWM is output to the adder through one loop filter, and the output from the phase comparator is output to the adder through the other loop filter. PWM control circuit.