JPH08162858A - Optical reception circuit - Google Patents

Abstract

PURPOSE: To avoid deterioration in a drive capability and a response speed in a large optical current by connecting an emitter of a clamping transistor(TR) to one terminal of a 2nd feedback resistor connected to a 1st feedback resistor and connecting a base to a drive output node and connecting a collector to a power potential node. CONSTITUTION: An emitter of a clamp TR 11 is connected to a connecting point between feedback resistors 12 and 13, a base of the clamp TR 11 is connected to a drive output node 5 and a collector of the clamp TR 11 is connected to a power supply potential node 4. Thus, when an optical current is comparatively small, an optical current IBP is fed from a drive transistor(TR) 8 through feedback resistors 12, 13. Then an output potential is decided based on the voltage difference between the feedback resistors 12, 13. When the optical current is high, an optical current is supplied from the collector of the clamp TR 11 to its emitter to set the emitter current of a drive TR 8 to be smaller.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical receiver circuit.

[0002]

2. Description of the Related Art A conventional optical receiver circuit comprises a preamplifier circuit including an inverting amplifier, an output circuit and a feedback resistor, and a light receiving element. One end of the light receiving element is connected to the inverting amplifier input node which is the input of the inverting amplifier, and the inverting amplifier output node which is the output of the inverting amplifier is connected to the input end of the output circuit. The feedback resistor is connected to the inverting amplifier input node and the drive output node which is the output terminal of the output circuit.

This optical receiving circuit supplies a photocurrent to the light receiving element by feeding a current according to the light given to the light receiving element from the drive output node of the preamplifier circuit to the inverting amplifier input node to feed back the current. This is a circuit that gives a potential according to the photocurrent to the drive output node by applying a potential difference according to this current between the resistors.

[0004]

However, the above-mentioned optical receiving circuit has a problem that the driving ability is lowered and the response speed is lowered when the photocurrent is increased.

[0005]

In order to solve the above-mentioned problems, the optical receiving circuit of the present invention comprises an inverting amplifier, an output circuit, a feedback resistor, a clamping transistor and a light receiving element. The inverting amplifier has an inverting amplifier input node,
An inverting amplifier output node, and a first potential applied with a first potential
It has a potential node and a second potential node to which a second potential is applied. The output circuit is composed of a driving transistor and a current source. The collector of the drive transistor is connected to the first potential node, the emitter is connected to the drive output node, and the base is connected to the inverting amplifier output node. The current source has one end connected to the drive output node and the other end connected to the second potential node. The feedback resistor is composed of a series resistor including a first feedback resistor and a second feedback resistor connected in series, one end of the first feedback resistor is connected to the inverting amplifier input node, and one end of the second feedback resistor is connected. Is connected to the drive output node. The clamp transistor has a collector connected to the first potential node, an emitter connected to a connection point between the first feedback resistor and the second feedback resistor, and a base connected to a drive output node. The light receiving element has an anode connected to the third potential and a cathode connected to the inverting amplifier input node.

[0006]

Since the feedback resistance is composed of the first feedback resistance and the second feedback resistance and the clamping transistor is connected as described above, when the current value of the current flowing through the feedback resistance is relatively small, , The driving transistor to the first feedback resistor,
A photocurrent flowing in the light receiving element is supplied through the second feedback resistor. On the other hand, when the photocurrent increases and the current flowing between the feedback resistors increases and the potential difference applied between the second feedback resistors reaches a certain value, the clamping transistor operates and a further potential difference is applied between the second feedback resistors. Not give to. Subsequent increase in photocurrent is supplied from the emitter through the collector of the clamping transistor. The increase of the output potential with the increase of the photocurrent is caused by the increase of the potential difference applied only between the first feedback resistors. Therefore, the rate of increase of the output potential due to the increase of the photocurrent when the photocurrent is large is set smaller than the rate of increase of the output potential when the photocurrent is small.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An optical receiver circuit according to a first embodiment of the present invention will be described below with reference to FIG. The optical receiver circuit shown in FIG.
It is composed of a light receiving element 1 such as a photodiode and a preamplifier circuit 2. The anode side of the light receiving element 1 is connected to the ground potential (hereinafter referred to as GND), and the cathode side is connected to the inverting amplifier input node 3. The preamplifier circuit 2 includes an inverting amplifier 15, an output circuit 16, a feedback resistor 12, a feedback resistor 13 and a clamping transistor 11.

The inverting amplifier 15 further comprises a bias resistor 9 which is a load, a light receiving element current amplifying transistor 6 and an input bias setting diode 7. The base of the light-receiving element current amplification transistor 6 is connected to the inverting amplifier input node 3. Light receiving element Current amplification transistor 6
Is connected to the inverting amplifier output node 14 and is also connected to one end of the bias resistor 9. The other end of the bias resistor 9 is connected to the power supply potential node 4, and the power supply potential node 4 is connected to the power supply potential Vcc. The emitter of the light receiving element current amplification transistor 6 is connected to the anode side of the input bias setting diode 7, the cathode side of the input bias setting diode 7 is connected to the reference potential node 17, and the reference potential node 17 is connected to GND. . The output circuit 16 includes a driving transistor 8 and a current limiting resistor 10 that is a current source. The collector of drive transistor 8 is connected to power supply potential node 4, the emitter is connected to drive output node 5, and the base is connected to inverting amplifier output node 14. The current limiting resistor 10 has one end connected to the drive output node 5 and the other end connected to the reference potential node 17. One end of the feedback resistor 12 is connected to the inverting amplifier input node 3, the other end of the feedback resistor 12 is connected to one end of the feedback resistor 13 and the emitter of the clamping transistor 11, and the other end of the feedback resistor 13 is driven. It is connected to the output node 5. Clamp transistor 1
The base of 1 is connected to the drive output node 5, and the collector is connected to the power supply potential node 4.

The input impedance of the light receiving element current amplifying transistor 6 in the light receiving circuit connected as described above is usually negligible with respect to the feedback resistors 12 and 13 in order to enhance the current-potential difference conversion characteristic. Therefore, assuming that the input impedance of the light-receiving element current amplifying transistor 6 is infinite, the photocurrent becomes equal to the current flowing through the feedback resistor 12. At this time, if the photocurrent is IBP, the resistance of the feedback resistor 12 is Rf1, the resistance of the feedback resistor 13 is Rf2, and the potential difference between the inverting amplifier input node 3 and the drive output node 5 is VRf, the photocurrent is relatively small. The relationship between VRf and IBP can be regarded as equivalent to that without the clamping transistor 11, and can be expressed as follows.

VRf = (Rf1 + Rf2) × IBP In the above optical receiving circuit, assuming that, for example, a large photocurrent flows, the photocurrent IBP = 1 mA, the resistance Rf1 = 1 kΩ of the feedback resistor 12, and the resistance Rf2 of the feedback resistor 13. = 3 kΩ,
Input bias setting diode 7 active state potential difference VD
= 0.8 V, the light receiving element current amplifying transistor 6, the driving transistor 8, and the clamping transistor 11 in the active state, the base-emitter potential difference VBE = 0.8 V, and the power source potential Vcc of the power source potential node 4 = 5.0 V. Assuming that the potential of the drive output node 5 is the output potential Vout, it is calculated. The potential of the inverting amplifier input node 3 is V
D (0.8V) + VBE (0.8V) = 1.6V. The potential at the connection point between the feedback resistors 12 and 13 is VRf1 = VRf1, where the potential difference between both ends of the feedback resistor 12 is VRf1.
Rf1 × IBP = 1V is added to obtain 2.6V.

Now, let us consider a circuit on the assumption that the clamping transistor 11 is not provided. Assuming that the potential difference across the feedback resistor 13 is VRf2, the output potential Vout is VRf2 at the potential at the connection point between the feedback resistor 12 and the feedback resistor 13.
= Rf2 × IBP = 3V is added and Vout = 5.6V
However, with respect to the power source potential Vcc = 5.0, the potential difference V between the base and the emitter of the driving transistor 8 in the active state is
The value that has decreased by BE = 0.8V is actually output, so it becomes 4.2V. However, at this time, since there is no potential difference between the power supply potential node 4 and the inverting amplifier output node 14, the current flowing through the bias resistor 9 becomes 0A, and the collector current of the light receiving element current amplification transistor 6 also becomes 0A. The current flowing through the light receiving element current amplifying transistor 6 cannot be secured, and there is a problem that the driving ability and the response speed decrease.

However, according to the present invention, since the clamping transistor 11 is provided, even if the photocurrent IBP is increased, the potential difference between the ends of the feedback resistor 13 is such that the potential difference VBE = 0. 8V
When it reaches, it does not grow any further. Therefore, the output potential Vout at this time is the feedback resistance 12 and the feedback resistance 13.
Clamping transistor 11 to the potential of 2.6V at the connection point of
Base-emitter potential difference VBE in active state of VBE = 0.8
V is added and becomes 3.4V, and the rise of the output potential is suppressed. Therefore, the potential of the inverting amplifier output node 14 becomes 4.2 V by adding the base-emitter potential difference VBE = 0.8 V in the active state of the driving transistor 8, and becomes the power supply potential VCC = 5.0 V and the potential of the inverting amplifier output node 14. Since a potential difference occurs between and, and a current flows through the collector of the light-receiving element current amplification transistor 6, stable high-speed operation can be obtained without lowering the driving capability and response speed.

As described above, the feedback resistor is composed of the feedback resistor 12 and the feedback resistor 13, the emitter of the clamping transistor 11 is connected to the connection point of the feedback resistor 12 and the feedback resistor 13, and the base of the clamping transistor 11 is connected. Drive output node 5 (feedback resistor 13 connected to drive output node 5)
By connecting the collector of the clamping transistor 11 to the power supply potential node 4, the photocurrent IBP is supplied from the driving transistor 8 through the feedback resistor 12 and the feedback resistor 13 when the photocurrent is relatively small. To be done.
Therefore, the value of the output potential is determined by the potential difference applied to the feedback resistors 12 and 13. On the other hand, when the photocurrent increases and the potential difference applied between the feedback resistors 13 becomes equal to the base-emitter potential difference VBE of the clamping transistor 11 in the active state, the potential difference between the feedback resistors 13 is fixed and thereafter. The increased amount of the photocurrent is supplied from the emitter through the collector of the clamping transistor 11. The increase in the potential of the drive output node 5 accompanying the increase in the photocurrent IBP after the potential difference between the feedback resistors 13 is fixed to VBE is supplied only by the increase in the potential difference applied between the feedback resistors 12. Therefore, the rate of increase in the potential of the drive output node 5 when the output potential is high is set smaller than that in the optical receiving circuit which is assumed to have no clamping transistor 11. As a result, a potential difference is generated in the bias resistor 9 so that the collector current of the light receiving element current amplifying transistor 6 flows, and stable high speed operation can be obtained without lowering the driving capability and response speed.

When the photocurrent is large, the photocurrent is supplied from the collector of the clamping transistor 11 through the emitter, so that the emitter current value of the driving transistor 8 can be set small even when the photocurrent is large. The transistor size of the driving transistor 8, which is determined by the current value of the emitter of the driving transistor 8 and the like, can be reduced, and high-speed operation can be obtained.

FIG. 4 is a characteristic diagram of the photocurrent IBP versus the output potential Vout of the optical receiver circuit according to the first embodiment of the present invention. a is a line for the circuit when the feedback resistor Rf = Rf1 + Rf2 = 4 kΩ is assumed and the clamp transistor 11 is absent, and b is a line for the circuit when the feedback resistor Rf <4 kΩ is assumed and the clamp transistor is absent. Yes, c is a line for the circuit when the feedback resistors Rf1 = 1 kΩ and Rf2 = 3 kΩ. A is Rf1 = 1 kΩ,
In the circuit for the line c where Rf2 = 3 kΩ, this is the output potential Vout when the potential difference of the feedback resistor 13 becomes the base-emitter potential difference VBE of the clamping transistor 11 in the active state. Also, the photocurrent IBP at this time
Be A '. B is a limit output potential Vout at which current is not supplied to the collector of the light-receiving element current amplification transistor 6 in the circuit for the line a having Rf = 4 kΩ.
Is. We will compare them here. It can be seen that the photocurrent IBP until reaching the limit potential value can be set to be larger for b than for a, but the current-potential difference conversion characteristic will be degraded. Therefore, in b, the current-potential difference conversion characteristic deteriorates, and the detection accuracy deteriorates at a small current value of photocurrent IBP <A '. In contrast, when the photocurrent IBP has a small value (photocurrent IBP <A ′), the ratio of the increase of the output potential Vout to the increase of the photocurrent is the same as that of a.
When BP has a large value (photocurrent IBP> A '), the rate of increase of the output potential Vout with respect to the increase of the photocurrent IBP is reduced and the value of the output potential Vout is reduced to reduce the collector current of the light receiving element current amplifying transistor 6. Is being supplied.

Here, the input bias setting diode 7 is
Although it contributes to give a potential difference between the terminals of the light receiving element 1 and improves the characteristics of the light receiving element, it is not always necessary. The current limiting resistor 10 may be a current source, and may be, for example, a constant current source. The light receiving element current amplifying transistor 6, the driving transistor 8 and the clamping transistor 11 are NPN transistors, but can be replaced with PNP transistors by changing the circuit polarity.
The light-receiving element current amplification transistor 6 may be a field effect transistor or, for example, a MOS transistor.

The optical receiving circuit according to the modification of the first embodiment of the present invention shown in FIG. 2 is different from the first embodiment described with reference to FIG. 1 in that the driving transistor 8 constituting the output circuit. ,
Since the current limiting resistor 10 is unnecessary, the same or corresponding portions as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. In the first embodiment, one end of the feedback resistor 13 and the base of the clamping transistor 11 that were connected to the drive output node 5 in FIG. 1 are connected to the inverting amplifier output node 14 and used as a new drive output node. The configuration of the optical receiving circuit of the modified example can be obtained.

The optical receiver circuit according to the second embodiment of the present invention shown in FIG. 3 has a second output circuit 20 added to the first embodiment described with reference to FIG. The base is connected to the emitter of the transistor forming the second output circuit, and the same portions or corresponding portions in FIG. The second output circuit 20 includes a dummy transistor 19 and a current limiting resistor 18. The base of the dummy transistor 19 is connected to the inverting amplifier output node 14, the collector is connected to the power supply potential node 4, and the emitter is the current limiting resistor 1.
It is connected to the reference potential node 17 via 8. One end of the feedback resistor 12 is connected to the inverting amplifier input node 3, the other end of the feedback resistor 12 is connected to one end of the feedback resistor 13, and is also connected to the emitter of the clamping transistor 11.
The other end of the feedback resistor 13 is connected to the drive output node 5.
The base of the clamping transistor 11 was connected to the drive output node 5 (the other end of the feedback resistor 13) in FIG. 1, but in the second embodiment it is connected to the emitter of the dummy transistor 19, and the collector of the clamping transistor 11 is Connected to power supply potential node 4.

With the above structure, when the photocurrent is a relatively small value, the feedback resistors 12 and 13 are used.
A photocurrent IBP is supplied from the driving transistor 8 through the. Therefore, the output potential is determined by the potential difference applied to the combined resistance of the feedback resistors 12 and 13. On the other hand, since the base of the driving transistor 8 is connected to the base of the dummy transistor 19, the emitter potential of the dummy transistor 19 is determined according to the emitter potential of the driving transistor 8. Therefore, the potential at the connection point between the feedback resistors 12 and 13 and the dummy transistor 19
The potential difference from the emitter potential of is determined according to the potential difference between the feedback resistors 13. Here, the photocurrent increases and the potential difference between the potential at the connection point of the feedback resistors 12 and 13 and the emitter potential of the dummy transistor 19 is the base-emitter potential difference VB of the clamp transistor 11 in the active state.
When it becomes equal to E, even if the photocurrent increases thereafter, the potential difference between the potential at the connection point of the feedback resistors 12 and 13 and the emitter potential of the dummy transistor 19 is equal to this potential difference VBE.
Since it is fixed to, the potential difference between the feedback resistors 13 is also fixed accordingly. The increment of the photocurrent after that is supplied by the emitter current through the collector of the clamping transistor 11. Therefore, the increase in the potential of the drive output node 5 accompanying the increase of the photocurrent after the potential difference between the feedback resistors 13 is fixed is supplied only by the increase in the potential difference applied to the feedback resistor 12, and the optical receiving circuit without the clamping transistor 11 is provided. Compared with this, the rate of increase in the potential of drive output node 5 is set smaller. As a result, a potential difference is generated in the bias resistor 9 so that the collector current of the light-receiving element current amplification transistor 6 flows, and stable high-speed operation can be obtained without lowering the driving capability and response speed.
In addition to the effects described in the optical receiving circuit of the embodiment, by separating the base of the clamping transistor 11 and the drive output node 5, the time lag of the clamp operation due to the variation of the output load applied to the drive output node 5 is eliminated. Complementary, more stable operation can be expected.

In the above-mentioned optical receiving circuit, assuming that, for example, the maximum photocurrent flows, the photocurrent IBP = 1 mA, the resistance Rf1 of the feedback resistance 12 Rk1 = 1 kΩ, and the resistance Rf2 of the feedback resistance 13.
= 3 kΩ, input bias setting diode 7 active state potential difference VD = 0.8 V, light receiving element current amplification transistor 6, driving transistor 8, clamping transistor 11, dummy transistor 19 active state potential difference between base and emitter VBE = 0.8V, power supply potential node 4
Vcc = 5.0V, and assuming that the resistance value of the power supply limiting resistor 10 and the resistance value of the current limiting resistor 15 are equal, the potential of the inverting amplifier input node 3 is VD (0.8V) + VB.
E (0.8V) = 1.6V, and the potential at the connection point between the feedback resistors 12 and 13 becomes 2.6V because the potential difference between the feedback resistors 12 is added. The potential of the inverting amplifier output node 14 is the potential of the connection point of the feedback resistors 12 and 13 = 2.
VBE × 2 = which is the base-emitter potential difference between the clamping transistor 11 and the dummy transistor 19 at 6V
1.6V is added to 4.2V. Therefore, a potential difference between the power supply potential of the power supply potential node 4 and the potential of the inverting amplifier output node is generated, so that a collector current of the light receiving element current amplification transistor 6 is also generated, and stable high-speed operation can be obtained without lowering driving ability and response speed.

Here, the input bias setting diode 7 is
Although it contributes to give a potential difference between the light receiving elements 1 and improves the characteristics of the light receiving elements, it is not always necessary. The current limiting resistor 10 and the current limiting resistor 18 may be current sources, and may be constant current sources, for example. The light-receiving element current amplification transistor 6, the driving transistor 8, the clamping transistor 11, and the dummy transistor 19 are NPN transistors, but by changing the circuit polarity, PN can be obtained.
It can also be replaced with a P-transistor. The light-receiving element current amplification transistor 6 may be a field effect transistor or, for example, a MOS transistor.

The optical receiver circuit according to the first modification of the second embodiment of the present invention shown in FIG. 5 is different from the second embodiment described with reference to FIG. It is composed of a resistor 9.1 and a second bias resistor 9.2,
The same parts as those in FIG. 3 or corresponding parts are designated by the same reference numerals, and the description thereof will be omitted. Bias resistor 9.1 in FIG.
Has one end connected to the collector of the light-receiving element current amplification transistor 6 and the other end connected to one end of the bias resistor 9.2. The other end of bias resistor 9.2 is connected to power supply potential node 4. Further, the base of the dummy transistor 19 connected to the inverting amplifier output node 14 in FIG. 3 is connected to the connection point of the bias resistors 9.1 and 9.2.

The optical receiving circuit of the second modification of the second embodiment of the present invention shown in FIG. 6 is different from the second embodiment described with reference to FIG. It is connected between the emitter and the drive output node 5, and the same parts or corresponding parts in FIG.

In the second embodiment, the maximum potential difference applied to the feedback resistor 13 when the photocurrent increases is substantially equal to the active base-emitter potential difference of the clamping transistor 11. In the modified example 1 of the above embodiment, the bias resistors are constituted by the bias resistors 9.1 and 9.2, and the base of the dummy transistor is formed by the bias resistors 9.
Since the potential of the base of the dummy transistor 19 is set higher than the potential of the base of the driving transistor 8 by connecting to the connection point of 1 and the bias resistor 9.2,
The photocurrent value at the moment when the clamping transistor 11 becomes active can be set smaller than that of the optical receiving circuit of the second embodiment. Further, in the optical receiving circuit of the modification 2 of the second embodiment, the driving transistor 8 and the driving output node 5 are provided.
By connecting the resistor 21 between the two, the same effect as that of the optical receiving circuit of the first modification of the second embodiment can be obtained.

The optical receiving circuit of the third modification of the second embodiment of the present invention shown in FIG. 7 is different from the second embodiment described above with reference to FIG. 3 in that the bias resistor is a bias resistor 9.3. And a bias resistor 9.4, the same parts or corresponding parts in FIG. 3 are designated by the same reference numerals and the description thereof will be omitted. In FIG. 7, one end of the bias resistor 9.3 is connected to the collector of the light receiving element current amplification transistor 6 and the other end is connected to one end of the bias resistor 9.4. The other end of the bias resistor 9.4 is connected to the power supply potential node 4. Further, the base of the driving transistor 8 connected to the inverting amplifier output node 14 in FIG. 3 is connected to the connection point of the bias resistors 9.1 and 9.2.

The optical receiving circuit of the modification 4 of the second embodiment of the present invention shown in FIG. 8 is different from the second embodiment described above with reference to FIG. 3 in that the resistor 22 is added to the emitter of the dummy transistor 19. And the base of the clamping transistor 11, the same portions or corresponding portions in FIG. 3 are denoted by the same reference numerals and the description thereof will be omitted.

In the second embodiment, the maximum potential difference applied to the feedback resistor 13 when the photocurrent increases is almost equal to the active base-emitter potential difference of the clamping transistor 11, but the second embodiment In the modified example 3 of the example, the bias resistor is composed of the bias resistor 9.3 and the bias resistor 9.4, and the base of the driving transistor 8 is the bias resistor 9.1.
And the bias resistor 9.2 are connected to set the base potential of the driving transistor 8 higher than the base potential of the dummy transistor 19, so that the clamping transistor 11 becomes active. It is possible to set the photocurrent value larger than that of the second embodiment. Further, in the optical receiving circuit of the modified example 4 of the second embodiment, the resistor 22 is connected between the dummy transistor 19 and the clamping transistor 11 so that the optical receiving circuit of the modified example 3 of the modified example of the second embodiment is the same. The effect is obtained.

FIG. 9 shows the photocurrent IBP vs. Vou of the optical receiver circuit according to the second embodiment of the present invention and its modifications 1, 2, 3, and 4.
It is a t characteristic diagram. a is a line for the optical receiver circuit of the second embodiment of the present invention, and b is an optical receiver circuit of Modification 1 of the second embodiment of the present invention and Modification 2 of the second embodiment of the present invention. And c is a third modification of the second embodiment of the present invention.
And a line for the optical receiving circuit of the modified example 4 of the second embodiment of the present invention. A ′, B ′, and C ′ are photocurrent values at the moment when the clamping transistor 11 of the light receiving circuit for the lines a, b, and c is activated. The optical receiving circuits of the modified examples 1, 2, 3, and 4 of the second embodiment of the present invention show the photocurrent value IBP at the moment when the clamping transistor 11 is in the active state as compared with the second embodiment of the present invention. It is a circuit that can be set arbitrarily.

Here, a modified example 1 of the second embodiment of the present invention,
In the optical receiving circuits 2, 3, and 4, the input bias setting diode 7 contributes to give a potential difference between the light receiving elements 1 and improves the characteristics of the light receiving elements, but it is not always necessary. Current limiting resistor 10, current limiting resistor 18
May be a current source, for example, a constant current source. Light receiving element current amplifying transistor 6, driving transistor 8,
Clamp transistor 11, dummy transistor 19
Is an NPN transistor, but can be replaced with a PNP transistor by changing the circuit polarity. The light-receiving element current amplification transistor 6 may be a field effect transistor or, for example, a MOS transistor.

[0030]

Since the emitter of the clamping transistor is connected to one end of the second feedback resistor connected to the first feedback resistor, the base is connected to the drive output node, and the collector is connected to the power supply potential node, a large light output is obtained. Even at the current value, stable high-speed operation can be expected without deterioration of driving ability and response speed.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an optical communication circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a light receiving circuit according to a modification of the first embodiment of the present invention.

FIG. 3 is a circuit diagram of a light receiving circuit according to a second embodiment of the present invention.

FIG. 4 is a photocurrent I of the optical receiver circuit according to the first embodiment of the present invention.
The characteristic view of BP vs. output potential Vout.

FIG. 5 is a circuit diagram of a light receiving circuit according to a modification 1 of the second embodiment of the present invention.

FIG. 6 is a circuit diagram of an optical receiving circuit according to a modification 2 of the second embodiment of the present invention.

FIG. 7 is a circuit diagram of an optical receiving circuit of a modified example 3 of the second embodiment of the present invention.

FIG. 8 is a circuit diagram of an optical receiving circuit according to a modification 4 of the second embodiment of the present invention.

FIG. 9 is a characteristic diagram of the photocurrent IBP versus the output potential Vout of the optical receiver circuit according to the second embodiment of the present invention and its modification.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Photodetector 2 Preamplifier circuit 3 Inversion amplifier input node 4 Power supply potential node 5 Drive output node 6 Photodetector current amplification transistor 7 Input bias setting diode 8 Drive transistor 9, 9.1, 9.2, 9.3 , 9.4 Bias resistor 10, 18 Current limiting resistor 11 Clamping transistor 12, 13 Feedback resistor 14 Inverting amplifier output node 15 Inverting amplifier 16 Output circuit 17 Reference node 19 Dummy transistor 20 Second output circuit 21, 22 Resistance

Claims (13)

[Claims] 1. An inverting amplifier having an inverting amplifier input node, an inverting amplifier output node, a first potential node to which a first potential is applied, and a second potential node to which a second potential is applied, and a collector. A first transistor connected to the first potential node, an emitter connected to a drive output node, and a base connected to the inverting amplifier output node; one end connected to the drive output node and the other end connected to the first output node; Two
A current source connected to the potential node, a first resistor having one end connected to the inverting amplifier input node, one end connected to the other end of the first resistor, and the other end connected to the drive output node And a collector connected to the first potential node and an emitter connected to a connection point between the first resistance and the second resistance.
An optical receiving circuit comprising: a second transistor having a base connected to the drive output node; and a light receiving element having an anode connected to a third potential and a cathode connected to the inverting amplifier input node. . 2. The optical receiving circuit according to claim 1, wherein the current source is a resistor. 3. An inverting amplifier having an inverting amplifier input node, an inverting amplifier output node, a first potential node to which a first potential is applied, and a second potential node to which a second potential is applied; A first resistor connected to the inverting amplifier input node; a second resistor having one end connected to the other end of the first resistor and the other end connected to the inverting amplifier output node; Connected to a first potential node and an emitter connected to a connection point of the first resistor and the second resistor,
An optical receiving circuit comprising: a transistor whose base is connected to the inverting amplifier output node; and a light receiving element whose anode is connected to a third potential and whose cathode is connected to the inverting amplifier input node. 4. An inverting amplifier having an inverting amplifier input node, an inverting amplifier output node, a first potential node to which a first potential is applied, and a second potential node to which a second potential is applied, and a collector. Is connected to the first potential node, an emitter is connected to a drive output node, a base is connected to the inverting amplifier output node, and one end is connected to the drive output node and the other end is Second
A first current source connected to a potential node; a second transistor having a collector connected to the first potential node and a base connected to the inverting amplifier output node; and an end having an emitter of the second transistor. Connected to the
A second current source having the other end connected to the second potential node, a first resistor having one end connected to the inverting amplifier input node, one end connected to the other end of the first resistor, A second resistor having the other end connected to the drive output node, a collector connected to the first potential node, an emitter connected to a connection point of the first resistor and the second resistor, and a base connected to the second resistor. An optical receiving circuit comprising: a third transistor connected to an emitter of the second transistor; and a light receiving element having an anode connected to a third potential and a cathode connected to the inverting amplifier input node. 5. The optical receiving circuit according to claim 4, wherein the first current source and the second current source are resistors. 6. A light-receiving element current amplification transistor having a base connected to the inverting amplifier input node, a collector connected to the inverting amplifier output node, and an emitter connected to the second potential node. And a load having one end connected to the collector of the light-receiving element current amplification transistor and the other end connected to the first potential node.
The optical receiving circuit according to any one of the above. 7. The light receiving circuit according to claim 6, wherein a diode is connected between the emitter of the transistor for amplifying the current of the light receiving element and the second potential node. 8. A light-receiving element current amplifying transistor whose base is connected to an inverting amplifier input node and whose collector is connected to an inverting amplifier output node, and a first end which is connected to a collector of the light-receiving element current amplifying transistor. Of the first load, one end of which is connected to the other end of the first load and the other end of which is the first
A second load connected to a first potential node to which the electric potential of is applied, an anode connected to the emitter of the light-receiving element current amplification transistor, and a cathode connected to a second potential node to which the second electric potential is applied. A first transistor having a collector connected to the first potential node, an emitter connected to a drive output node, and a base connected to the inverting amplifier output node; and one end connected to the drive output node And the other end is the second
A first current source connected to a potential node; a second transistor having a collector connected to the first potential node and a base connected to a connection point of the first load and the second load; One end is connected to the emitter of the second transistor,
A second current source having the other end connected to the second potential node, a first resistor having one end connected to the inverting amplifier input node, one end connected to the other end of the first resistor, A second resistor having the other end connected to the drive output node, a collector connected to the first potential node, an emitter connected to a connection point of the first resistor and the second resistor, and a base connected to the second resistor. An optical receiving circuit comprising: a third transistor connected to an emitter of the second transistor; and a light receiving element having an anode connected to a third potential and a cathode connected to the inverting amplifier input node. 9. The optical receiver circuit according to claim 1, further comprising a resistor connected between an emitter of the first transistor and a drive output node. 10. A light-receiving element current amplifying transistor whose base is connected to an inverting amplifier input node and whose collector is connected to an inverting amplifier output node, and a first end which is connected to a collector of the light-receiving element current amplifying transistor. Of the first load, one end of which is connected to the other end of the first load and the other end of which is the first
A second load connected to a first potential node to which the electric potential of is applied, an anode connected to the emitter of the light-receiving element current amplification transistor, and a cathode connected to a second potential node to which the second electric potential is applied. A first transistor having a collector connected to the first potential node, an emitter connected to a drive output node, and a base connected to a connection point between the first load and the second load. , One end of which is connected to the drive output node and the other end of which is the second
A first current source connected to a potential node; a second transistor having a collector connected to the first potential node and a base connected to the inverting amplifier output node; and an end having an emitter of the second transistor. Connected to the
A second current source having the other end connected to the second potential node, a first resistor having one end connected to the inverting amplifier input node, one end connected to the other end of the first resistor, A second resistor having the other end connected to the drive output node, a collector connected to the first potential node, an emitter connected to a connection point of the first resistor and the second resistor, and a base connected to the second resistor. An optical receiving circuit comprising: a third transistor connected to an emitter of the second transistor; and a light receiving element having an anode connected to a third potential and a cathode connected to the inverting amplifier input node. 11. The optical receiver circuit according to claim 4, wherein a resistor is connected between the emitter of the second transistor and the base of the third transistor. 12. The first potential, the second potential, and the third potential are the same potential.
The optical receiver circuit according to any one of 5, 6, 7, 8, 9, 10, and 11. 13. A light-receiving element whose anode is connected to a first potential, an inverting amplifier input node, a drive output node, an inverting amplifier output node, and a first end whose one end is connected to the inverting amplifier input node. A feedback resistor, a second feedback resistor having one end connected to the other end of the first feedback resistor and the other end connected to the drive output node, and one end having a higher potential than the first potential. A load having a second potential connected to a first potential node and the other end connected to the inverting amplifier output node, a first electrode connected to the inverting amplifier output node, and a second electrode connected to the load. A first transistor electrically connected to a second potential node having a third potential lower than the second potential and having a control electrode connected to the inverting amplifier input node; Amplifier output node and drive output Is a light receiving circuit electrically connected to a force node, wherein the inverting amplifier input node is connected to the cathode of the light receiving element, and a current according to light applied to the light receiving element is supplied from the drive output node. By flowing the current through the first feedback resistor and the second feedback resistor to the inverting amplifier input node, there is a potential difference according to the current across the first feedback resistor and the second feedback resistor. In the optical receiving circuit that generates and applies a potential according to the current to the drive output node, clamping means for fixing a potential difference applied to both ends of the second feedback resistor when the current reaches a predetermined current value. The current supplied to the inverting amplifier input node after the current supplied to the inverting amplifier input node reaches the predetermined current value is supplied to the inverting amplifier input node via the first feedback resistor. Optical receiving circuit comprising the amplifier means.