JPH08154085A - Fm multiplex receiver - Google Patents

Abstract

PURPOSE: To shorten the time from the reception of an FM multiplex signal to the display of character information. CONSTITUTION: A microcomputer 26 makes the comparison result of the FM detection signal level and the IF signal level of an IF signal a multipath and controls a synchronizing production and an error correction circuit 24 according to the level of the multipath. Namely, if the multipath is a prescribed level or above, error corrections for the both of the longitudinal direction and lateral direction of a digital signal are instructed, and if the multipath is smaller than the prescribed value, the error correction for only the lateral direction of the digital signal is instructed. Thus, an error correction processing is switched according to the level of the multipath.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FM multiplex receiver, and more particularly to an FM multiplex receiver for receiving an FM multiplex signal in which a digital signal containing parity in the vertical and horizontal directions is multiplexed with an FM broadcast signal.

[0002]

2. Description of the Related Art In a conventional FM multiplex receiver, an error correction circuit performs error correction on a digital signal multiplexed on an FM broadcast signal. Here, since one frame of the digital signal includes parities in the vertical and horizontal directions, the error correction circuit corrects errors in both the vertical and horizontal directions. Then, the character information included in the error-corrected digital signal is displayed on the display.

[0003]

However, in such a conventional FM multiplex receiver, since error correction processing takes time, it takes about 5 seconds from the reception of the FM multiplex signal to the display of character information. There was a problem that the time may be required. Therefore, the main purpose of this invention is to
An object of the present invention is to provide an FM multiplex receiver capable of shortening the time from receiving an FM multiplex signal to displaying character information.

[0004]

SUMMARY OF THE INVENTION The present invention provides an FM multiplex receiver for receiving an FM multiplex signal in which an FM broadcast signal is multiplexed with a digital signal containing parity in the vertical and horizontal directions. An error correction means for performing error correction in the horizontal direction, a detection means for detecting a multipath included in the FM multiplex signal, and a switching means for switching an error correction operation according to the level of the multipath are provided. It is an FM multiplex receiver.

[0005]

For example, the microcomputer sends the IF signal to the FM.
The difference between the detected FM detection signal level and the IF signal level,
That is, the multipath is detected by comparing the AM modulation component generated by the multipath with the original FM modulation component, and the error correction circuit is controlled according to the level of the multipath. That is, if the multipath is equal to or greater than the predetermined value, the microcomputer instructs the error correction circuit to perform error correction in both the vertical direction and the horizontal direction of the digital signal. On the other hand, if the multipath is smaller than the predetermined value,
The microcomputer instructs the error correction circuit to correct the error only in the horizontal direction of the digital signal.

[0006]

According to the present invention, since the error correction operation is switched according to the degree of multipath, if the multipath is small, the time from the reception of the FM multiplex signal to the display of the character information can be shortened. The above-mentioned objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of the embodiments with reference to the drawings.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the frame structure of a digital signal multiplexed with an FM broadcast signal. One frame consists of 272 blocks, and each block starts with a 16-bit BIC.
(Block Identification Code) is added and used for playback of frame synchronization and block synchronization. Of the 272 blocks, 190 blocks are packets for transmitting data, and 82 blocks are parity packets for transmitting column-direction parity. In the data transmission packet,
Following the BIC, a 176-bit data packet, a 14-bit CRC (Cyclic Retundancy Code), and an 82-bit parity section are provided.

An F in which such digital signals are multiplexed
The M-multiplexed signal is received by the antenna 12 of the FM multiplex receiver 10 shown in FIG. 2 and given to the front end 14. In the front end 14, the FM multiplex signal is converted into an IF signal by the PLL controlled by the microcomputer 26 and the oscillation frequency signal from the local oscillation circuit 16. The converted IF signal is then FM-detected by the IF amplification and detection circuit 18, and the FM detection signal is converted into the multiplexer 20 and LMSK (Level-controlled Minimum Shif).
t Keying) The signal is supplied to the demodulation circuit 22 and also to the microcomputer 26 via the amplifier 23a. The IF amplification and detection circuit 18 also detects the level of the IF signal by the signal meter 18a, and gives the signal meter output, that is, the IF level to the microcomputer 26 via the amplifier 23b.

The multiplexer 20 generates a voice signal based on the FM detection signal, and the LMSK demodulation circuit 22 demodulates the digital signal having the frame structure shown in FIG. The demodulated digital signal is subjected to the synchronous reproduction and error correction circuit 24 by the control signal from the microcomputer 26.
Then, the signal is synchronously reproduced according to the BIC and error-corrected according to the parity code, and the digital signal subjected to these processes is given to the microcomputer 26. The digital signal given to the microcomputer 26 is once written in the RAM 28 and then processed according to a predetermined program stored in the operation keys 30 and the ROM 32, whereby character information is displayed on the display 34.

What should be noted is the error correction processing of the digital signal by the microcomputer 26, which is performed by the amplifiers 23a and 23a.
Processing is performed according to the flow chart shown in FIG. 3 based on the FM detection signal and the signal meter output given from 3b.
First, in step S1, multipath is detected. That is, the FM detection signal level, that is, the AM modulation component generated by the multipath, and the output level of the signal meter, that is, the original FM modulation component are compared to detect the multipath level. Next, in step S3, multipath ≧
It is determined whether or not the level is a predetermined level. Where "YES"
If so, in step S5, an instruction is issued to correct the error in both the vertical and horizontal directions of the digital signal shown in FIG. 1, and the process ends, but if "NO",
In step S7, an instruction is issued to correct the error only in the horizontal direction of the digital signal, and the process ends.

By the processing performed by the microcomputer 26 in this manner, the synchronous reproduction and error correction circuit 24 corrects errors only in the horizontal direction when the reception state of the FM multiplex signal is good, and when the reception state is bad, the synchronization reproduction and error correction circuit 24 synchronizes. The reproduction and error correction circuit 24 corrects errors in both the vertical and horizontal directions. As a result, when the reception state is good, the time required for the error correction processing can be shortened, and the character information can be displayed on the display 34 with almost no waiting time.

[Brief description of drawings]

FIG. 1 is an illustrative view showing a frame structure of a digital signal multiplexed with an FM broadcast signal.

FIG. 2 is a block diagram showing an embodiment of the present invention.

FIG. 3 is a flowchart showing a part of the operation of FIG. 2 embodiment.

[Explanation of symbols]

 10 ... FM multiplex receiver 18 ... IF amplification and detection circuit 24 ... Synchronous reproduction and error correction circuit 26 ... Microcomputer

Claims (2)

[Claims] 1. An FM multiplex receiver for receiving an FM multiplex signal in which a digital signal including parity is multiplexed in the vertical and horizontal directions in an FM broadcast signal, wherein an error correction is made in the vertical and horizontal directions of the digital signal. An FM multiplex receiver comprising: an error correction unit for detecting the multipath included in the FM multiplex signal; and a switching unit for switching the error correction operation according to the level of the multipath. . 2. The switching means includes control means for controlling the error correction means so as to correct the error in either the vertical direction or the horizontal direction if the multipath is smaller than a predetermined level. The FM multiplex receiver according to claim 1.