JPH0815340B2 - Color signal matrix operation switching circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a color signal matrix operation switching circuit used in a video signal processing circuit capable of processing signals of various color television systems. It is about.

(Prior Art) Currently, color television systems in the world include the NTSC system mainly in the United States and Japan, the SECAM system mainly in France and Eastern European countries, and the PAL system mainly in Western European countries. In the Middle East countries, various types of video tape recorders have been rapidly spread, and accordingly, multi-type color television receivers are required. This television receiver is provided with a demodulation system for demodulating various color signals, and a matrix circuit for obtaining a G signal is provided therein.

In other words, a normal television signal is transmitted by the quadrature modulation method as an (RY) signal and a (BY) signal,
For the (Y) signal, a method of extracting the two signals by a matrix is adopted.

FIG. 2 shows a (G-Y) signal matrix section. The (RY) signal and the (BY) signal are respectively (R
-Y), (BY) are supplied to the clamp circuits 11 and 12, and the outputs of the clamp circuits 11 and 12 are gain-controlled by the color control circuits 13 and 14, respectively. The (R-Y) signal and the (B-Y) signal subjected to the gain control are matrix circuits.
Supplied to 16. The matrix circuit 16 can obtain a (G-Y) signal by combining the input signals. This (G-Y) signal is supplied to the G component detection circuit 17 in the next stage. The G signal (primary color signal) detected here is pedestal clamped by the pedestal clamp circuit 18 and output terminal 19
Is derived as the final G signal.

By the way, in the multi-system television receiver, a matrix ratio switching signal is supplied to the above matrix circuit 16. This matrix ratio switching signal is obtained from the matrix switching circuit 20. The matrix ratio is switched between the NTSC signal, PAL, SECA
This is because the synthesis ratio of the (GY) signal is originally different from that of the M system signal.

FIG. 3 shows the matrix circuit section 16 described above in more detail. Transistors Q1, Q2, Q3 and resistors R1, R2,
R3 constitutes a bias circuit, and the bias is supplied to the bases of the transistors Q5, Q6, Q13, Q14 and Q20. Transistor Q5, resistor R5, transistor Q4 are connected in series,
It acts as the current source of the differential circuit composed of the transistors Q7 and Q8. The transistor Q6 and the resistor R6 act as a current source of the differential circuit including the transistors Q9 and Q10. Transistor
The (RY) signal is supplied to the emitter of Q4 via the resistor R4. The collectors of the transistors Q8 and Q10 are connected to the power supply, and the collectors of the transistors Q7 and Q9 are connected to the power supply via the resistor R7. The collector outputs of the transistors Q7 and Q9 are led out via the base and emitter of the transistor Q11. The collector of the transistor Q11 is connected to the power supply, and the emitter is grounded via the constant current source i1.
Transistors Q12 to Q19, resistors R8 to R11, constant current source i2
The circuit configured by, for example, is similar to the above-mentioned (RY) signal amplifying circuit, and differs in that it processes the (BY) signal.

The emitter outputs of transistors Q11 and Q19 are resistors R14, R15 and R
It is supplied to a resistance matrix section composed of 16 and a resistance matrix section composed of resistors R17, R18, and R19. Resistor R16, R19
Supplies the bias of the bias circuit including the transistors Q21 and Q20, the resistors R13 and R12, and the constant current source i3 to the matrix circuit. The middle point of the resistors R14 and R15 is supplied to one input part a of the switch 161, and the middle point of the resistors R17 and R18 is supplied to the other input part b of the switch 161. The switch 161 is controlled by a switching pulse, and the input section a is selected when the NTSC system signal is processed, and the input section b is selected when the PAL or SECAM system process is performed.

FIG. 4 specifically shows the matrix switching circuit 20 described above. The system of the input signal is determined by the system determination circuit. When the PAL system signal is input, there is a high level output from the PAL detection circuit 31.
When the system signal is input, the SECAM detection circuit 32 outputs high level, and when the NTSC system signal is input, the NTSC detection circuit 33 outputs high level.
When there is a high level output from the PAL detection circuit 31, the output of the inverter G1 changes to the low level, the output of the NAND circuit G5 changes to the high level, and the output of the inverter G7 falls from the high level to the low level. This makes the NAND circuit G9, G10
The flip-flop circuit constituted by is set, and its output becomes low level. Similar operation is obtained when only the output of the SECAM detection circuit 32 is at high level and the others are at low level.

Next, when only the output of the NTSC detection circuit 33 is high level and the other is low level, the reset pulse is supplied to the flip-flop circuit, and the switching pulse becomes high level. G3, G4, G8 are inverters, and G6 is a NAND circuit. The input of the inverter G4 is supplied with the output of the black and white detection circuit 34 for detecting the black and white signal state. During black-and-white broadcasting, the output of the black-and-white detection circuit 34 becomes high level, the other becomes low level, and the switching pulse becomes high level.

(Problems to be Solved by the Invention) In the above circuit, the black-and-white detection circuit 34 is used especially when receiving or processing a PAL or SECAM system signal.
However, there is a problem in that a green or purple stripe pattern appears on the screen when the malfunction occurs and the image quality is impaired. This phenomenon occurs especially when the color signal level is lowered in the weak electric field receiving state or when the color signal level of the input television signal (such as VTR) is low.

That is, in the circuit described in FIG.
Q11, Q19, and Q21 are designed to have the same emitter voltage, but there are variations in the values of resistors R7, R11, and R13, R5, R6, R9, and R1.
0, R12 value variations and transistor Vbe pairability,
DC voltage varies due to β pairing. Therefore C in the illustration
The DC voltage at points D and DD has an offset. When the output thus offset is input to the clamp circuit of the next stage, a noise component as shown in FIG. 5 is generated in the G output.

FIG. 5 shows an example in which the PAL or SECAM type color receiving state is shifted to the monochrome determination state, and then to the color receiving state. Such noise is caused by the operation of the clamp circuit shown in FIG. That is,
It is assumed that the G signal appears at the emitter of the transistor Q31. The emitter of the transistor Q31 is grounded via the constant current source i11 and is connected to the base and collector of the transistor Q32. The transistors Q32 and Q33 are a differential amplifier type comparison circuit, and the reference voltage V1 is supplied to the base of the transistor Q33. i12 is a constant current source that is turned on for a predetermined gate (pedestal clamp period). If the potential shown in the figure is higher than the potential of the reference voltage V1, a current flows through the transistor Q32, the electric charge of the capacitor C1 is discharged, and the potential shown in the figure becomes equal to the reference voltage. When the potential shown in the figure is lower than the reference voltage V1, the charging current flows through the transistor Q34 to the capacitor C1 to increase the potential and operate so as to be equal to the reference voltage V1.

Here, when a direct current with an offset is input from the switch 161 as at the time point t1 in FIG. 5, the potential shown in the figure becomes high, and then it tends to become equal to the reference voltage. In this case, since the discharge current of the capacitor C1 is discharged through the transistor Q32, it takes time until the reference voltage and the potential shown in the figure become equal. The same can be said at time t2. In this way, when the matrix circuit is switched between the color state and the black-and-white state, there is an offset of the DC level, which causes noise in the G signal.

Therefore, it is an object of the present invention to provide a color signal matrix operation switching circuit capable of preventing the signal synthesis ratio of the matrix circuit from being switched at the time of determining the black-and-white state and eliminating the occurrence of noise in the G signal.

[Structure of the Invention] (Means for Solving Problems) In the present invention, in order to solve the above problems (RY)
The color signal and the (BY) color signal are matrixed, and (G-
Y) A matrix circuit section for obtaining color signals and (R) of the matrix circuit section according to various television signal systems.
In a color signal matrix operation switching circuit having means for switching the composition ratio of the (-Y) color signal and the (BY) color signal by a switching pulse, it is determined whether or not the color signal of the television signal has a predetermined level. And a means for forcibly holding the current output state of the switching pulse by the output indicating the absence of the color signal when the output of the means changes from the output indicating the presence of the color signal to the output indicating the absence of the color signal. It is a thing.

(Operation) As described above, the current output state of the switching pulse for switching the composite ratio of the matrix circuit is changed by the output indicating the absence of the color signal of the detection means for determining whether or not the color signal of the television signal has a predetermined level. By providing the means for forcibly holding, the output having the DC offset from the matrix circuit is not supplied to the clamp circuit.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. The television signal system detecting means 40 includes a PAL detecting circuit 41, a SECAM detecting circuit 42,
It has an NTSC detection circuit 43. Reference numeral 44 denotes a monochrome detection circuit, which determines whether or not the color signal level included in the television signal is equal to or higher than a predetermined level, and obtains a high level output when the color signal level is lower than the predetermined level. PAL detection circuit 41, SECAM detection circuit 42,
The NTSC detection circuit 43 obtains a high level output when detecting the signals of the corresponding systems. PAL detection circuit 41,
The output of the SECAM detection circuit 42 is supplied to the NAND circuit G13 via the inverters G11 and G12, respectively. This NAND circuit G13
Is further supplied to one input of the NAND circuit G14. The output of the monochrome detection circuit 44 is input to the other input of the NAND circuit G14 via the inverter G16. Also N
The output of the TSC detection circuit 43 is supplied to one of the NAND circuits G15. The output of the black-and-white detection circuit 44 is also supplied to the other input of the NAND circuit G15 via the inverter G16.

The outputs of the NAND circuits G14 and G15 are supplied to the set and reset inputs of the flip-flop circuit composed of the NAND circuits G17 and G18. Then, the output of this flip-flop circuit is input to the control unit of the switch 161. The switch 161 is the same as that described in FIG.

The switch 161 can select a switch having a different matrix ratio between the (RY) signal and the (BY) signal. The signal sources 45 and 46 are respectively described in FIG. 3 (R-
It corresponds to the color control circuit section for the Y) signal and the (BY) signal. The outputs of signal sources 45 and 46 are resistors R14 and R, respectively.
Synthesized through 15. The bias E is also supplied to the combining unit M1 via the resistor R16. Then, the signal of the combining unit M1 is supplied to the input unit a of the switch 161. The outputs of the signal sources 45 and 46 are combined via the resistors R17 and R18, respectively. The bias E is also supplied to the combining unit M2 via the resistor R19. Then, the signal of the combining unit M2 is the switch 16
1 is supplied to the input part b.

One embodiment of the present invention is constructed as described above. PA now
It is assumed that the L system signal is processed and only the output of the PAL detection circuit 41 is at the high level. At this time, the output of the inverter G11 is at low level and the output of the NAND circuit G13 is at high level. At this time, if the color signal has a predetermined level or more, the output of the black and white detection circuit 44 is low level and the output of the inverter G16 is high level. Therefore, the output of the NAND circuit G14 is low level, and the output of the flip-flop circuit is low level. Switch 16
1 selects the input section b when the switching pulse from the flip-flop circuit is low level. Further, the matrix circuit is set so that the signal of the combining unit M2 is suitable for the PAL system. Even when the television signal is the SECAM system, the signal of the combining unit M2 is selected in the same manner as above.

Next, when the television signal is of the NTSC system, only the output of the NTSC detection circuit 43 becomes high level, and the outputs of the other detection circuits are low level. In this case, NAND circuit G15
Output becomes low level, and the flip-flop circuit is reset. Therefore, the output of the flip-flop circuit becomes high level, and the switch 161 selects the input part a and the output of the combining part M1. The signal of the combining unit M1 is set to be suitable for the NTSC method combining ratio.

Next, the operation when the color signal falls below a predetermined level in the PAL or SECAM system reception state will be described. In the PAL or SECAM system reception state, the NAND circuit G1
The output of 3 is high level, and the output of the NAND circuit G15 is high level. When the color signal is at a sufficient level, the output of the inverter G16 is at high level, and the output of the NAND circuit G14 is at low level. In this state, if the level of the color signal falls below a predetermined level or if a black-and-white broadcasting state is set, the output of the black-and-white detection circuit 44 becomes high level and the output of the inverter G16 becomes low level. At this time, the output of the NAND circuit G13 only becomes high level, and the output of the NAND circuit G15 does not change from high level. Therefore, there is no change in the flip-flop circuit that operates at the falling edge of the input. That is, its output (switching pulse) remains in the original state. This means that the switch 161 is not switched, and no DC offset occurs in its output. When the color broadcasting state or the color signal reaches a predetermined level or higher again from the above state, the output of the inverter G16 becomes high level and the output of the NAND circuit G13 becomes low level. It has no effect. Similarly, in the NTSC system reception state, the output of the flip-flop circuit is not affected even if the color broadcast and the monochrome broadcast are switched.

[Effects of the Invention] As described above, according to the present invention, it is possible to prevent the signal combination ratio of the matrix circuit from being switched at the time of determining the monochrome state,
It is possible to provide a color signal matrix operation switching circuit capable of eliminating the occurrence of noise in the G signal.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a configuration diagram of a color signal demodulation circuit, FIG. 3 is a circuit diagram showing a part of FIG. 2 in more detail, and FIG. 5 is a circuit diagram showing the matrix switching circuit shown in FIG. 5, FIG. 5 is a signal waveform diagram shown for explaining the operation of the circuit shown in FIG. 2, and FIG. 6 is a diagram showing the clamp circuit shown in FIG. 41 …… PAL detection circuit, 42 …… SECAM detection circuit, 43 …… NTSC
Detection circuit, 44 ... Black and white detection circuit, G11, G12, G16 ... Inverter, G13, G14, G15G17, G18 ... NAND circuit, 45, 46 ...
… Signal source, R14 to R19… Resistance, 161… Switch.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hajime Hajime 1-9-2, Harara-cho, Fukaya-shi, Saitama Toshiba Audio & Video Engineering Co., Ltd. Fukaya Works

Claims (1)

[Claims] 1. A matrix circuit section for obtaining (GY) color signals by matrixing (RY) color signals and (BY) color signals, and the matrix according to various television signal systems. A first detection circuit for detecting the first television system in a color signal matrix operation switching circuit having means for switching the composition ratio of the (RY) color signal and the (BY) color signal in the circuit section. And a second detection circuit for detecting the second television system, and detection outputs of the first and second detection circuits to obtain an inverted output and a non-inverted output, which are combined ratio switching of the matrix circuit. Switching pulse output means for inputting to the switch, detection means for determining whether or not the color signal of the television signal has a predetermined level, and output of this detection means for indicating whether there is a color signal or not Turned into The case, the current color signal matrix operation switching circuit, characterized in that the output state and means for forcibly holding said switching pulse output means an output indicating the absence of the color signal.