JPH08149036A - Portable telephone set - Google Patents

Portable telephone set

Info

Publication number
JPH08149036A
JPH08149036A JP6289523A JP28952394A JPH08149036A JP H08149036 A JPH08149036 A JP H08149036A JP 6289523 A JP6289523 A JP 6289523A JP 28952394 A JP28952394 A JP 28952394A JP H08149036 A JPH08149036 A JP H08149036A
Authority
JP
Japan
Prior art keywords
power
power supply
section
buffer
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6289523A
Other languages
Japanese (ja)
Other versions
JP2788859B2 (en
Inventor
Naoyuki Mitsuyama
直之 光山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Saitama Ltd
Original Assignee
NEC Saitama Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Saitama Ltd filed Critical NEC Saitama Ltd
Priority to JP6289523A priority Critical patent/JP2788859B2/en
Publication of JPH08149036A publication Critical patent/JPH08149036A/en
Application granted granted Critical
Publication of JP2788859B2 publication Critical patent/JP2788859B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Amplifiers (AREA)
  • Transceivers (AREA)
  • Transmitters (AREA)

Abstract

PURPOSE: To prevent the output of an oscillating circuit from leaking out from an antenna while the power amplifier part of a portable telephone set stops its operation. CONSTITUTION: A power supply part of a buffer amplifier part 20 is connected to two different DC power voltage V2 and V3 (V2 >V3 >0) via a switch 50. The switch 50 changes over the power voltage applied to the part 20 synchronously with the signal that turns on and off the operation of a power amplifier part 10 (V2 and V3 to be selected when the operation of the part 10 is turned on and off respectively). As a result, the gain of the part 20 is reduced when the operation of the part 10 is turned off and therefore the electric power leaking out from an antenna 1 can be reduced.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は携帯電話機に関し、特に
発振回路部と電力増幅部との間に設けられた緩衝増幅部
の電源の供給手段に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mobile phone, and more particularly to a means for supplying power to a buffer amplification section provided between an oscillation circuit section and a power amplification section.

【0002】[0002]

【従来の技術】この種の従来例について図面を参照して
説明する。
2. Description of the Related Art A conventional example of this type will be described with reference to the drawings.

【0003】図8は第1の従来例を示すブロック図であ
る。
FIG. 8 is a block diagram showing a first conventional example.

【0004】図8において、発振回路部30には通常電
圧制御発振器が用いられその出力は0dBm程度であ
る。電力増幅部10に必要な入力レベルは+7dBm程
度である。そこで発振回路部30の出力を電力増幅部1
0に必要な入力レベルに増幅させるために緩衝増幅部2
0が用いられる。送信フィルタ3,4は送信波に付随す
る不要波等を除去し、受信フィルタ2は受信波に付随す
る不要波等を除去するために用いられる。電力増幅部1
0の電源はスイッチ40を介し直流電源電圧V1に接続
されており、ON/OFF信号に同期して電力増幅部1
0の動作はON/OFFされる。緩衝増幅部20の電源
は直流電源電圧V2 に接続されており、ON/OFF信
号には無関係である。
In FIG. 8, a normal voltage controlled oscillator is used for the oscillator circuit section 30, and its output is about 0 dBm. The input level required for the power amplifier 10 is about +7 dBm. Therefore, the output of the oscillation circuit unit 30 is set to the power amplification unit 1
Buffer amplifier 2 for amplifying the input level required for 0
0 is used. The transmission filters 3 and 4 are used to remove unnecessary waves and the like accompanying the transmission waves, and the reception filter 2 is used to remove unnecessary waves and the like accompanying the reception waves. Power amplifier 1
The power source of 0 is connected to the DC power source voltage V 1 via the switch 40, and is synchronized with the ON / OFF signal.
The operation of 0 is turned on / off. The power supply of the buffer amplification section 20 is connected to the DC power supply voltage V 2 and is independent of the ON / OFF signal.

【0005】図9は第2の従来例を示すブロック図であ
る。
FIG. 9 is a block diagram showing a second conventional example.

【0006】図9において、この第2の従来例は、第1
の従来例と対比した場合に、緩衝増幅部20への直流電
源電圧をスイッチ40を介して受電し、その動作はスイ
ッチ40を開閉させるON/OFF信号と同期してい
る。
In FIG. 9, the second conventional example is the first example.
When compared with the conventional example, the DC power supply voltage to the buffer amplification unit 20 is received via the switch 40, and its operation is synchronized with the ON / OFF signal for opening and closing the switch 40.

【0007】[0007]

【発明が解決しようとする課題】この従来の携帯電話機
は、第1の従来例では、図8に示すように緩衝増幅部2
0がON/OFF信号にかかわらず常時動作しているた
め、直流電源電圧V2 が印加されている間10〜20m
A程度の電流が流れ続け、電力増幅部10の動作がOF
Fしていてもアンテナ1より漏洩する電力が大きいとい
う問題点がある。又、近年、携帯電話機の小型化,軽量
化の要求に伴い、使用する電池も小型化(低容量化)の
要求が強られている。この要求に答えるためには前記電
流(10〜20mA)は少しでも削減する必要がある
が、この第1の実施例の回路構成では前記電流を削減す
事ができないという問題点もある。
According to the first conventional example, the conventional portable telephone has a buffer amplifying section 2 as shown in FIG.
0 always operates regardless of the ON / OFF signal, so 10 to 20 m while the DC power supply voltage V 2 is applied.
The current of about A continues to flow, and the operation of the power amplification unit 10 is OF.
There is a problem that the electric power leaking from the antenna 1 is large even when the frequency is F. In recent years, along with the demand for smaller and lighter mobile phones, there is an increasing demand for smaller batteries (lower capacity). To meet this demand, the current (10 to 20 mA) needs to be reduced as much as possible, but there is a problem that the current cannot be reduced in the circuit configuration of the first embodiment.

【0008】次に、第2の従来例では、第1の従来例の
欠点を補うべくON/OFF信号に同期して緩衝増幅部
20の動作をオン/オフさせ前記電流をゼロにした回路
構成になっているので、電力増幅部10の動作がオフし
ている時にアンテナ1より漏洩する電力は第1の実施例
よりも充分小さいが、しかしON/OFF信号に同期し
て緩衝増幅部20の入力のVSWR(電圧定在波比)が
約1程度から約40程度まで変化するため緩衝増幅部2
0の動作に連動した負荷変動により発振回路部30の発
振周波数が変化してしまう(ゆらいでしまう)という不
具合が発生するという問題点がある。
Next, in the second conventional example, in order to make up for the drawbacks of the first conventional example, the circuit configuration in which the operation of the buffer amplification section 20 is turned on / off in synchronization with the ON / OFF signal to make the current zero. Therefore, the power leaked from the antenna 1 when the operation of the power amplification unit 10 is off is sufficiently smaller than that in the first embodiment, but the power of the buffer amplification unit 20 is synchronized with the ON / OFF signal. Since the input VSWR (voltage standing wave ratio) changes from about 1 to about 40, the buffer amplification unit 2
There is a problem in that the oscillation frequency of the oscillation circuit unit 30 changes (is fluctuated) due to load fluctuations linked to the 0 operation.

【0009】[0009]

【課題を解決するための手段】本発明の携帯電話機は、
発振回路部とアンテナへ電波電力を供給する電力増幅部
とを有し、かつ前記発振回路部と前記電力増幅部との間
に少なくとも1つの緩衝増幅部を有する携帯電話機にお
いて、前記緩衝増幅部の電源電圧を前記電力増幅部の動
作と同期して電圧値を異にする2種類の直流電源電圧に
切り替える切替手段を有し、前記切替手段は前記電力増
幅部の動作をオン/オフさせるスイッチと連動し、ま
た、前記切替手段の入力部と出力部とが第1の抵抗器で
接続され、さらに、前記切替手段はエミッタが1種類の
前記直流電源電圧に接続しコレクタが前記緩衝増幅部の
電圧印加端子に接続するトランジスタと、前記エミッタ
と前記コレクタ間を接続する前記第1の抵抗器と、一端
を前記トランジスタのベースに接続し他端で前記スイッ
チをオン/オフさせる信号を受信する第2の抵抗器とを
有している。
The mobile phone of the present invention comprises:
A mobile phone having an oscillating circuit section and a power amplifying section for supplying electric power to an antenna, and having at least one buffer amplifying section between the oscillating circuit section and the power amplifying section. A switching means for switching the power supply voltage to two types of DC power supply voltages having different voltage values in synchronism with the operation of the power amplification section, wherein the switching means turns on / off the operation of the power amplification section; The switching means has an input part and an output part connected to each other by a first resistor, and the switching means has an emitter connected to one type of the DC power supply voltage and a collector connected to the buffer amplification part. A transistor connected to a voltage application terminal, the first resistor connecting the emitter and the collector, one end connected to the base of the transistor, and the other end turned on / off the switch. And a second resistor for receiving signals.

【0010】[0010]

【実施例】次に、本発明について図面を参照して説明す
る。
Next, the present invention will be described with reference to the drawings.

【0011】図1は本発明の第1の実施例を示すブロッ
ク図である。
FIG. 1 is a block diagram showing a first embodiment of the present invention.

【0012】図1において、本第1の実施例は発振信号
を発生する発振回路部30と、発振回路部30の出力の
発振信号を増幅する緩衝増幅部20と、緩衝増幅部20
の出力を送信フィルタ40を通した後電力増幅して送信
フィルタ3を通した後アンテナ1へ送出する電力増幅部
10と、電力増幅部10への直流電源電圧V1 の供給の
開閉を行うスイッチ40と、緩衝増幅部20への直流電
源電圧V2 又はV3 の供給の開閉を行うスイッチ50
と、スイッチ50の直流電源電圧V2 の入力と出力間に
接続された抵抗51と、スイッチ40及び50の開閉の
制御のON/OFF信号を送出するスイッチ制御部60
とを有して構成している。
In FIG. 1, in the first embodiment, an oscillation circuit section 30 for generating an oscillation signal, a buffer amplification section 20 for amplifying an oscillation signal output from the oscillation circuit section 30, and a buffer amplification section 20.
Amplifier 10 which outputs the output of the power transmission circuit 40 to the antenna 1 after passing through the transmission filter 40 and power amplification, and a switch for opening and closing the supply of the DC power supply voltage V 1 to the power amplification portion 10. 40 and a switch 50 for opening and closing the supply of the DC power supply voltage V 2 or V 3 to the buffer amplification section 20.
And a resistor 51 connected between the input and output of the DC power supply voltage V 2 of the switch 50, and a switch control unit 60 for sending ON / OFF signals for controlling the opening / closing of the switches 40 and 50.
And is configured.

【0013】尚、直流電源電圧V2 とV3 はいずれも0
VでなくV2 〉V3 〉0とする。
The DC power supply voltages V 2 and V 3 are both 0.
Let V 2 > V 3 > 0 instead of V.

【0014】次に、本第1の実施例の動作について説明
する。
Next, the operation of the first embodiment will be described.

【0015】スイッチ40及び50は共にスイッチ制御
部60からのON/OFF信号で連動し、ON信号のと
きスイッチ40はオンして電力増幅部10は動作状態と
なり、且つスイッチ50は緩衝増幅部20へ直流電源電
圧V2 を供給し、OFF信号のとき、スイッチ40はオ
フとなり、スイッチ50は緩衝増幅部20へ直流電源電
圧V3 を供給する。
The switches 40 and 50 are interlocked with each other by an ON / OFF signal from the switch control unit 60. When the switch signal is an ON signal, the switch 40 is turned on and the power amplification unit 10 is in the operating state, and the switch 50 is the buffer amplification unit 20. The DC power supply voltage V 2 is supplied to the switch 40, and when the signal is an OFF signal, the switch 40 is turned off, and the switch 50 supplies the DC power supply voltage V 3 to the buffer amplification unit 20.

【0016】このように、本第1の実施例では緩衝増幅
部20の直流電源がスイッチ50を介して直流電源電圧
2 ,V3 に接続されており、スイッチ50は電力増幅
部10の動作(オン/オフ)と連動して、緩衝増幅部2
0の電源を電圧V2 /V3 に切り替える事できるので、
直流電源電圧V3 の電圧をV2 より低い値に設定する事
により、電力増幅部10の動作がオフしている時の緩衝
増幅部20の電流を小さくする事ができ、同時に緩衝増
幅部20の利得が小さくなるためアンテナ1より漏洩す
る電力を小さくする事ができる。抵抗器51はスイッチ
50が電圧V2からV3 (又はV3 からV2 )へ切り替
える瞬間に、緩衝増幅部20の電源が遮断するのを防止
している。
As described above, in the first embodiment, the DC power supply of the buffer amplification section 20 is connected to the DC power supply voltages V 2 and V 3 via the switch 50, and the switch 50 operates the power amplification section 10. In conjunction with (ON / OFF), the buffer amplification unit 2
Since the power source of 0 can be switched to the voltage V 2 / V 3 ,
By setting the voltage of the DC power supply voltage V 3 to a value lower than V 2 , the current of the buffer amplification unit 20 when the operation of the power amplification unit 10 is off can be reduced, and at the same time, the buffer amplification unit 20. Since the gain of is reduced, the power leaked from the antenna 1 can be reduced. The resistor 51 prevents the power supply of the buffer amplification unit 20 from being cut off at the moment when the switch 50 switches from the voltage V 2 to V 3 (or V 3 to V 2 ).

【0017】図4は本第1の実施例における緩衝増幅部
にトランジスタ2SC4095を用いたときのトランジ
スタのパラメータS11を直流電源電圧の変化に対してプ
ロットしたスミスチャート、図5は本第1の実施例にお
ける緩衝増幅部の直流電源電圧の変動に対する利得及び
消費電流を示す図、図6は本第1の実施例における緩衝
増幅部にトランジスタ2SC4095を用いたときの印
加される直流電源電圧と入力の電圧定在波比(VSW
R)との関係の一例を示す図、図7は本第1の実施例に
おける緩衝増幅部の入力のVSWRと発振回路部の発振
周波数の変動との関係の一例を示す図である。
FIG. 4 is a Smith chart in which the parameter S 11 of the transistor when the transistor 2SC4095 is used in the buffer amplification section in the first embodiment is plotted against the change of the DC power supply voltage, and FIG. 5 is the first chart. The figure which shows the gain and consumption current with respect to the fluctuation | variation of the DC power supply voltage of the buffer amplification part in an Example, FIG. 6 is the DC power supply voltage applied when the transistor 2SC4095 is used for the buffer amplification part in this 1st Example, and an input. Voltage standing wave ratio (VSW
R), and FIG. 7 is a diagram showing an example of the relationship between the input VSWR of the buffer amplification section and the fluctuation of the oscillation frequency of the oscillation circuit section in the first embodiment.

【0018】本第1の実施例では緩衝増幅部20に印加
する直流電源電圧V3 を1(V)程度に設定することに
より、図6から緩衝増幅部20の入力の電圧定在波比
(VSWR)を約5.2に抑えることができる。
In the first embodiment, by setting the DC power supply voltage V 3 applied to the buffer amplification section 20 to about 1 (V), the voltage standing wave ratio ( VSWR) can be suppressed to about 5.2.

【0019】また、図7から、緩衝増幅部20の入力の
VSWRを約5程度に抑えることにより、発振回路部3
0の発振周波数(本第1の実施例では900MHz)の
変動を+50KHz程度に抑え込むことができる。
Further, from FIG. 7, by suppressing the VSWR of the input of the buffer amplification section 20 to about 5, the oscillation circuit section 3
The fluctuation of the oscillation frequency of 0 (900 MHz in the first embodiment) can be suppressed to about +50 KHz.

【0020】さらに、図5から緩衝増幅部20の直流電
源電圧V2 =3(V),V3 =1(V)に設定すれば、
直流電源電圧V2 =3(V)が常時印加されている場合
に比較して利得及び消費電流が大幅に減少し、発振回路
部30からの信号の電力増幅部10への漏洩を減少させ
ることができると共に、電池の消耗を少なくすることが
できる。
Further, from FIG. 5, if the DC power supply voltages V 2 = 3 (V) and V 3 = 1 (V) of the buffer amplifier 20 are set,
Gain and current consumption are significantly reduced as compared with the case where a DC power supply voltage V 2 = 3 (V) is constantly applied, and leakage of a signal from the oscillation circuit unit 30 to the power amplification unit 10 is reduced. It is possible to reduce the battery consumption.

【0021】さらにまた、図4ののスミスチャートか
ら、直流電源電圧V2 =3(V),V3 =1(V)に設
定した場合のVSWRがわかり、V3 =0(V)に設定
した場合に比較してVSWRの変動が小さいことがわか
る。
Furthermore, from the Smith chart of FIG. 4, the VSWR when the DC power supply voltages V 2 = 3 (V) and V 3 = 1 (V) are found, and V 3 = 0 (V) is set. It can be seen that the change in VSWR is smaller than that in the case of the above.

【0022】このように、本第1の実施例では、電力増
幅部10のオフ時のアンテナ1からの電力の漏洩および
発振回路部30の周波数の変動を従来例に比して少なく
することができる。
As described above, in the first embodiment, the leakage of power from the antenna 1 and the fluctuation of the frequency of the oscillation circuit section 30 when the power amplification section 10 is off can be reduced as compared with the conventional example. it can.

【0023】図2は本発明の第2の実施例を示し、緩衝
増幅部側のスイッチのみを示す図である。
FIG. 2 shows the second embodiment of the present invention and is a diagram showing only the switches on the buffer amplification section side.

【0024】図2において、本第2の実施例は、図1に
示す第1の実施例におけるスイッチ50をスイッチ50
aに、また抵抗50を抵抗52に代え、他の構成要件
(図示省略)は総て第1の実施例と同一である。
In FIG. 2, the second embodiment is similar to the switch 50 in the first embodiment shown in FIG.
In addition, the other components (not shown) are the same as those in the first embodiment except that the resistor 50 is replaced by a and the resistor 50 is replaced by the resistor 52.

【0025】本第2の実施例においては、スイッチ50
aが閉じたときには緩衝増幅部20には直流電源電圧V
2 が印加され、スイッチ50aが開いたときには直流電
源電圧V2 の電位が抵抗器52により降下した電圧(直
流電源電圧V3 に相当)が印加される。即ち、本第2の
実施例では直流電源電圧V3 が不要である。
In the second embodiment, the switch 50
When a is closed, the DC power supply voltage V is applied to the buffer amplifier 20.
When 2 is applied and the switch 50a is opened, a voltage (corresponding to the DC power supply voltage V 3 ) obtained by dropping the potential of the DC power supply voltage V 2 by the resistor 52 is applied. That is, the DC power supply voltage V 3 is unnecessary in the second embodiment.

【0026】図3は本発明の第3の実施例を示し、緩衝
増幅部側のスイッチのみを示す図である。
FIG. 3 shows the third embodiment of the present invention, and is a diagram showing only the switches on the buffer amplification section side.

【0027】図3において、本第3の実施例は図2に示
す第2の実施例におけるスイッチ50aを、トランジス
タ53に代え、他の構成要件(図示省略)は総て第1及
び第2の実施例と同一である。
In FIG. 3, in the third embodiment, the switch 50a in the second embodiment shown in FIG. 2 is replaced with a transistor 53, and other constituent elements (not shown) are all the first and second embodiments. Same as the embodiment.

【0028】本第3の実施例では、トランジスタ53の
ベースにON/OFF信号のロー(L)(V)の電圧が
印加されるとトランジスタ53はオン状態となって緩衝
増幅部20へ直流電源電圧V2 が印加され、逆にON/
OFF信号のハイ(H)(V)の電圧が印加されるとト
ランジスタ52はオフとなって、直流電源電圧V2 が抵
抗52で降下した電圧(V3 に相当)が緩衝増幅部20
に印加される。
In the third embodiment, when a low (L) (V) voltage of the ON / OFF signal is applied to the base of the transistor 53, the transistor 53 is turned on and a DC power source is supplied to the buffer amplification section 20. Voltage V 2 is applied, and on the contrary, ON /
When the high (H) (V) voltage of the OFF signal is applied, the transistor 52 is turned off, and the voltage (corresponding to V 3 ) obtained by dropping the DC power supply voltage V 2 at the resistor 52 is the buffer amplification unit 20.
Is applied to

【0029】この第2及び第3の実施例においても、第
1の実施例で説明した同じ理由によって、電力増幅部1
0のOFF時のアンテナ1からの電力の漏洩および発振
回路部30の周波数の変動を従来例より少なくすること
ができる。
In the second and third embodiments as well, for the same reason explained in the first embodiment, the power amplifier 1
It is possible to reduce the leakage of power from the antenna 1 and the frequency fluctuation of the oscillation circuit section 30 when the 0 is OFF as compared with the conventional example.

【0030】[0030]

【発明の効果】以上説明したように本発明は、発振回路
部とアンテナへ電波電力を供給する電力増幅部とを有
し、かつ発振回路部と電力増幅部との間に少なくとも1
つの緩衝増幅部を有する携帯電話機において、緩衝増幅
部の電源電圧を電力増幅部の動作と同期して電圧値に異
にする2種類の直流電源電圧に切り替える切替手段を有
することにより、電力増幅部のオフ時の緩衝増幅部の利
得および消費電流を従来より低減させるので、アンテナ
からの漏洩電力を従来より低減させることができると共
に、緩衝増幅部の印加電圧の変動を少なく設定すること
によって、入力電圧定在波比を従来より小さく抑えられ
るので、発振回路部の発振周波数の変動(ゆらぎ)も従
来より小さくすることができる効果がある。
As described above, the present invention has an oscillation circuit section and a power amplification section for supplying radio wave power to an antenna, and at least 1 is provided between the oscillation circuit section and the power amplification section.
In a mobile phone having two buffer amplifying sections, the power amplifying section is provided with switching means for switching the power supply voltage of the buffer amplifying section to two types of DC power supply voltage which are different in voltage value in synchronization with the operation of the power amplifying section. Since the gain and the current consumption of the buffer amplifier when turning off are reduced compared to the conventional one, the leakage power from the antenna can be reduced as compared with the conventional one, and by setting the fluctuation of the applied voltage of the buffer amplifier to be small, Since the voltage standing wave ratio can be suppressed to be smaller than the conventional value, there is an effect that the fluctuation (fluctuation) of the oscillation frequency of the oscillation circuit section can be made smaller than the conventional value.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示すブロック図であ
る。
FIG. 1 is a block diagram showing a first embodiment of the present invention.

【図2】本発明の第2の実施例を示し、緩衝増幅部側の
スイッチのみを示す図である。
FIG. 2 is a diagram showing a second embodiment of the present invention and showing only switches on the buffer amplification section side.

【図3】本発明の第3の実施例を示し、緩衝増幅部側の
スイッチのみを示す図である。
FIG. 3 is a diagram showing a third embodiment of the present invention and showing only switches on the buffer amplification section side.

【図4】第1の実施例における緩衝増幅部にトランジス
タ2SC4095を用いたときのトランジスタのパラメ
ータS11を直流電源電圧の変化に対してプロットしたス
ミスチャートである。
FIG. 4 is a Smith chart in which the parameter S 11 of the transistor when the transistor 2SC4095 is used in the buffer amplification unit in the first embodiment is plotted against the change of the DC power supply voltage.

【図5】第1の実施例における緩衝増幅部の直流電源電
圧の変動に対する利得及び消費電流を示す図である。
FIG. 5 is a diagram showing a gain and a consumption current with respect to a change in the DC power supply voltage of the buffer amplification unit in the first embodiment.

【図6】第1の実施例における緩衝増幅部にトランジス
タ5SC4095を用いたときの印加される直流電源電
圧と入力の電圧定在波比(VSWR)との関係の一例を
示す図である。
FIG. 6 is a diagram showing an example of a relationship between an applied DC power supply voltage and a voltage standing wave ratio (VSWR) of an input when a transistor 5SC4095 is used in the buffer amplification unit in the first embodiment.

【図7】第1の実施例における緩衝増幅部の入力のVS
WRと発振回路部の発振周波数の変動との関係の一例を
示す図である。
FIG. 7 is a diagram illustrating a VS of an input of the buffer amplification unit according to the first embodiment.
It is a figure which shows an example of a relationship between WR and the fluctuation of the oscillation frequency of an oscillation circuit part.

【図8】第1の従来例を示すブロック図である。FIG. 8 is a block diagram showing a first conventional example.

【図9】第2の従来例を示すブロック図である。FIG. 9 is a block diagram showing a second conventional example.

【符号の説明】[Explanation of symbols]

1 アンテナ 2 受信フィルタ 3,4 送信フィルタ 10 電力増幅部 20 緩衝増幅部 30 発振回路部 40,50,50a スイッチ 51,52,54 抵抗 53 トランジスタ 60 スイッチ制御部 DESCRIPTION OF SYMBOLS 1 Antenna 2 Reception filter 3,4 Transmission filter 10 Power amplification section 20 Buffer amplification section 30 Oscillation circuit section 40, 50, 50a Switch 51, 52, 54 Resistance 53 Transistor 60 Switch control section

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 発振回路部とアンテナへ電波電力を供給
する電力増幅部とを有し、かつ前記発振回路部と前記電
力増幅部との間に少なくとも1つの緩衝増幅部を有する
携帯電話機において、前記緩衝増幅部の電源電圧を前記
電力増幅部の動作と同期して電圧値を異にする2種類の
直流電源電圧に切り替える切替手段を有する事を特徴と
する携帯電話機。
1. A mobile phone having an oscillation circuit section and a power amplification section for supplying radio power to an antenna, and having at least one buffer amplification section between the oscillation circuit section and the power amplification section. A mobile phone having a switching means for switching the power supply voltage of the buffer amplification unit to two types of DC power supply voltages having different voltage values in synchronization with the operation of the power amplification unit.
【請求項2】 前記切替手段は前記電力増幅部の動作を
オン/オフさせるスイッチと連動している事を特徴とす
る請求項1記載の携帯電話機。
2. The mobile phone according to claim 1, wherein the switching means is interlocked with a switch for turning on / off the operation of the power amplification section.
【請求項3】 前記切替手段の入力部と出力部とが第1
の抵抗器で接続されている事を特徴とする請求項1及び
2記載の携帯電話機。
3. An input unit and an output unit of the switching means are first.
The mobile phone according to claim 1 or 2, wherein the mobile phone is connected by the resistor.
【請求項4】 前記切替手段はエミッタが1種類の前記
直流電源電圧に接続しコレクタが前記緩衝増幅部の電圧
印加端子に接続するトランジスタと、前記エミッタと前
記コレクタ間を接続する前記第1の抵抗器と、一端を前
記トランジスタのベースに接続し他端で前記スイッチを
オン/オフさせる信号を受信する第2の抵抗器とを有す
ることを特徴とする請求項1,2及び3記載の携帯電話
機。
4. The switching means includes a transistor whose emitter is connected to one type of the DC power supply voltage and whose collector is connected to a voltage application terminal of the buffer amplification section, and the first transistor which connects between the emitter and the collector. 4. The portable device according to claim 1, further comprising a resistor and a second resistor having one end connected to the base of the transistor and the other end receiving a signal for turning on / off the switch. Telephone.
JP6289523A 1994-11-24 1994-11-24 Mobile phone Expired - Fee Related JP2788859B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6289523A JP2788859B2 (en) 1994-11-24 1994-11-24 Mobile phone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6289523A JP2788859B2 (en) 1994-11-24 1994-11-24 Mobile phone

Publications (2)

Publication Number Publication Date
JPH08149036A true JPH08149036A (en) 1996-06-07
JP2788859B2 JP2788859B2 (en) 1998-08-20

Family

ID=17744363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6289523A Expired - Fee Related JP2788859B2 (en) 1994-11-24 1994-11-24 Mobile phone

Country Status (1)

Country Link
JP (1) JP2788859B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7155251B2 (en) 2002-02-26 2006-12-26 Kabushiki Kaisha Toshiba Mobile radio apparatus and radio unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6346008A (en) * 1986-08-13 1988-02-26 Hitachi Ltd Power controlling method
JPH04246903A (en) * 1991-02-01 1992-09-02 Nec Corp High frequency power amplifier

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6346008A (en) * 1986-08-13 1988-02-26 Hitachi Ltd Power controlling method
JPH04246903A (en) * 1991-02-01 1992-09-02 Nec Corp High frequency power amplifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7155251B2 (en) 2002-02-26 2006-12-26 Kabushiki Kaisha Toshiba Mobile radio apparatus and radio unit

Also Published As

Publication number Publication date
JP2788859B2 (en) 1998-08-20

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