JPH08149012A - Signal input circuit for one-bit analog-digital converter - Google Patents

Abstract

PURPOSE: To prevent the oscillation due to an excessive input while securing a wide dynamic range covering the higher bands through the lower ones by keeping the sample frequency of an A/D converter at a comparatively low level with respect to the frequency band to be converted. CONSTITUTION: A pre-emphasis circuit 21 of a signal input circuit 11 emphasizes the high band components of the signals of audible frequency bands to undergo the digital conversion. Then the emphasized analog input signal is limited within the prescribed wave height limit value by a limiter circuit 22 so that an A/D converter 14 has never an excessive input by pre-emphasis. Then the components less than the frequency band to be converted are filtered by an LPF 23, and the distortion components such as the higher harmonics, etc., that are generated by the limitation given within the wave height limit value are eliminated. Therefore, the lower band components are never relatively suppressed even when subjected to the de-emphasis processing 19.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention provides an analog input signal Δ
The present invention relates to a signal input circuit for an analog / digital converter that performs Σ modulation and converts into a 1-bit digital signal.

[0002]

2. Description of the Related Art A technique for converting an analog input signal into a digital signal to perform recording / reproduction and signal processing is particularly preferably used in audio equipment. As an audio device, for example, a digital audio tape recorder (abbreviated as DAT) is configured to quantize an analog input signal at a sampling frequency of 48 kHz, convert it into 16-bit digital data, and record it on a magnetic tape. There is.

In such analog / digital conversion, the sampling frequency must determine the frequency band in which the conversion is possible, and be at least twice the frequency of the analog input signal to be converted. In DAT, 48 kHz is selected as described above in order to be able to convert up to 22000 Hz including a surplus in the audible frequency band. The number of quantization bits is a factor that determines the dynamic range. For example, in the DAT, in order to set the dynamic range to 90 dB or more,
The number of quantization bits is 16 bits.

On the other hand, when a digital signal is converted into an analog signal, in addition to the voice signal component up to 22000 Hz,
The signal components of the upper sideband and the lower sideband having the frequency deviation of 22000 Hz are included on the high frequency side and the low frequency side centering on the sampling frequency of 48 kHz, respectively. Therefore, in order to make the sound, the frequencies between the audio signal component and the lower sideband component are extremely close to each other, so that the filtering characteristic of the low-pass filter (abbreviated as LPF) for filtering only the audio signal component is sharpened. There is a need to.

However, when such a filter having a sharp filtering characteristic is used, a phase distortion called group delay occurs in which the delay time changes with respect to each frequency of the audio signal. For this reason, in recent years, sampling has been performed by a so-called oversampling method in which the sampling frequency is set to, for example, four times.

Quantization noise due to analog / digital conversion is distributed from DC to 1/2 of the sampling frequency,
It is known that the total noise power is determined by the resolution of the analog / digital converter. Therefore, when the sampling frequency is increased as described above, the noise distribution is widened and the noise power in the voice signal band can be reduced. Therefore, along with the progress of semiconductor technology,
So-called ΔΣ conversion, which converts an analog input signal into a digital signal with 1 bit, has been performed.

The delta-sigma converter has a structure as shown in FIG. 10 (b) for an analog input signal as shown in FIG. 10 (a).

A binary signal of [0] or [1] is output. Note that FIG. 10 shows the case where the frequency of the analog input signal shown in FIG. 10A is 1500 Hz and the sampling frequency is 768 kHz. As described above, the 1-bit analog / digital converter derives the output of the pulse density corresponding to the waveform of the analog input signal.

However, in the analog / digital conversion by the ΔΣ modulation as described above, the quantization noise is low on the low frequency side as shown in FIG. 11 which is a spectrum analysis of the conversion data shown in FIG. 10 (b). Although it is at a level, it tends to increase as it goes to the higher frequency side. That is, as is apparent from FIG. 11, the dynamic range is affected even within the audible frequency band of 20 kHz.
It is understood that there is a quantization noise of 0 dB or more.

Therefore, in the DAT, when the number of quantization bits is 16 and the sampling frequency is 48 kHz, in order to secure a sufficient dynamic range, the sampling frequency for converting into a 1-bit signal is Three
It is necessary to use very high frequencies on the order of ~ 12 MHz. However, in the newly proposed apparatus for recording / reproducing 1-bit signals as they are, the sampling frequency is 768 kHz of 48 kHz × 16 bits in order to match the transmission capacity used for existing digital audio.
It is set to 1.536 MHz from z. Therefore, in order to suppress the increased quantization noise, a typical prior art 1-bit signal recording / reproducing apparatus is configured as shown in FIG.

That is, in the 1-bit signal recording / reproducing apparatus 1, the analog input signal to the input terminal 2 is preliminarily enhanced in the high-frequency component in the pre-emphasis circuit 3, and then the analog / digital converter 4 by 1-bit ΔΣ modulation is used. Is configured to enter. After passing through the interface circuit 5, the 1-bit digital data from the analog / digital converter 4 is given to the deck 6 and recorded on the magnetic tape.

The data reproduced from the magnetic tape is
After passing through the interface circuit 7, the digital / analog converter 8 converts the analog signal into an analog signal having an amplitude level corresponding to the pulse density. After that, the analog signal is output from the output terminal 10 after the high-frequency component is suppressed in the de-emphasis circuit 9 by a value corresponding to the amount of enhancement in the pre-emphasis circuit 3. In this way, the high frequency components of the audio signal are preliminarily enhanced to perform the analog / digital conversion, and the enhanced component is suppressed after the digital / analog conversion, so that the quantization noise is generated even at the sampling frequency as described above. Is configured to suppress.

[0012]

However, the analog / digital converter 4 oscillates when an excessive input is applied, and for example, 15 shown in FIG.
Sampling frequency of 76 Hz
If it is set to 8 kHz, the data after the ΔΣ conversion will be, as shown in FIG.

[0] and [1] are repeated. The frequency spectrum when such data is converted from digital to analog is as shown in FIG.
The original signal component is not retained.

Therefore, in the above-mentioned 1-bit signal recording / reproducing apparatus 1, the frequency spectrum of the audio signal input from the input terminal 2 is 0d as shown in FIG. 15 (a).
When the line α1 of B is input at a level that has a peak limit value, the low-frequency component is increased as indicated by reference numeral α2 in FIG. 15 (b) along with the enhancement of the high-frequency component in the pre-emphasis circuit 3. It will be relatively suppressed. Therefore, when the de-emphasis circuit 9 suppresses the high frequency component by the amount of enhancement, the maximum level of the audio signal indicated by reference numeral α3 in FIG.
There is a problem that the dynamic range becomes narrower near the quantization noise level shown by 4.

An object of the present invention is to provide a signal input circuit for a 1-bit analog / digital converter capable of performing a stable conversion operation while ensuring a wide dynamic range without unnecessarily increasing the sampling frequency. It is to be.

[0015]

The invention according to claim 1 is
In a signal input circuit for an analog / digital converter that converts an analog input signal into a 1-bit digital signal, a pre-emphasis circuit that enhances the analog input signal toward the higher frequency side of the frequency band to be converted, A limiter circuit for limiting the output of the pre-emphasis circuit within a predetermined wave height limit value; and a low-pass filter for filtering a component of the output of the limiter circuit that is equal to or lower than the frequency band to be converted, and the analog / digital converter The sampling frequency is relatively low with respect to the frequency band to be converted.

According to a second aspect of the present invention, the wave height limit value is selected to be slightly lower than the oscillation limit value of the analog input signal to the analog / digital converter.

In the invention according to claim 3, the peak value of the analog input signal to be input to the pre-emphasis circuit is less than the oscillation limit value of the analog input signal to the analog / digital converter. To do.

[0018]

According to the first aspect of the present invention, in a signal input circuit for an analog / digital converter for converting an analog input signal such as a voice signal into a 1-bit digital signal by ΔΣ conversion or the like, first, a pre-emphasis circuit is used. The analog input signal is increased as it goes to the higher frequency band of 0 to 22000 Hz to be converted, and then the increased analog input signal is limited by a limiter circuit to within a predetermined wave height limit value. /
The digital converter is limited so as not to be over-input by the pre-emphasis. Then, the output of the limiter circuit is filtered by the low-pass filter for components below the frequency band to be converted to remove distortion components such as harmonics generated by the limitation within the peak height value.

Therefore, even if the sampling frequency of the analog / digital converter is set to about 2 MHz or less, which is lower than the frequency band to be converted, which is suitable for the transmission capacity and the like, the high frequency component in which the noise increases increases in harmonics. Since the generation of a wave is suppressed and the wave height is reasonably increased within a predetermined wave height limit value, even if the de-emphasis process is performed, the low frequency component is not relatively suppressed. In this way, even if the sampling frequency is relatively low, it is possible to suppress the generation of noise in the high frequency components and ensure a wide dynamic range. Further, it is possible to surely suppress the excessive input to the analog / digital converter and to perform the stable operation.

Further preferably, according to the invention of claim 2, the peak height limiting value is selected to be slightly lower than the peak height limiting value of the analog input signal to the analog / digital converter. Therefore, it is possible to suppress oscillation due to excessive input of the analog / digital converter and effectively use the allowable input range of the analog / digital converter.

Further preferably, according to the invention of claim 3, the peak value of the analog input signal to be inputted to the pre-emphasis circuit is selected to be less than the oscillation limit value of the analog input signal to the analog / digital converter. Be done. Therefore, since the entire frequency band is set to be less than the oscillation limit value in advance, and only the high-frequency component enhanced by the pre-emphasis circuit temporarily becomes equal to or higher than the oscillation limit value, it is limited by the limiter circuit. The value is constant over the entire frequency band, and it is possible to prevent the narrowing of the dynamic range due to the level suppression of the low frequency component as described in the prior art.

[0022]

EXAMPLE An example of the present invention will be described below with reference to FIGS.

FIG. 1 is a block diagram showing the electrical construction of a 1-bit signal recording / reproducing apparatus 12 using a signal input circuit 11 according to an embodiment of the present invention. An analog audio signal, which is an input signal input from the input terminal 13, is first subjected to pre-emphasis and peak value limitation in the signal input circuit 11, and then input to the analog / digital converter 14. The analog / digital converter 14 converts the input audio signal into a 1-bit digital audio signal by ΔΣ modulation with a sampling frequency of 768 kHz to 1.536 MHz.

The digital audio signal from the analog / digital converter 14 is output to the deck 16 after passing through the interface circuit 15. The deck 16 records the input digital audio signal on the magnetic tape by the rotary head.

The digital audio signal reproduced by the deck 16 passes through the interface circuit 17,
The digital / analog converter 18 converts the analog voice signal. The analog audio signal is processed by the de-emphasis circuit 19 in the signal input circuit 1 as described later.
After the de-emphasis process corresponding to the pre-emphasis process in No. 1 is performed, it is output from the output terminal 20 to a power amplifier or the like.

The signal input circuit 11 performs a pre-emphasis process 21 for enhancing the input analog audio signal as it goes to the high frequency side, and an output from the pre-emphasis circuit 21 to a predetermined wave height limit value. It comprises a limiter circuit 22 for limiting the internal frequency and an LPF 23 for filtering only the component of the audible frequency band from the output of the limiter circuit 22.

FIG. 2 is a circuit diagram showing a specific configuration of the pre-emphasis circuit 21. The analog audio signal from the input terminal 13 is supplied to the pre-emphasis circuit 21.
Input terminal P1. Voltage dividing resistors R1 and R2 are interposed between the input terminal P1 and the ground line, and the input analog audio signal is divided by these voltage dividing resistors R1 and R2, and then is fed to the amplifier circuit 24. Is entered. A capacitor C1 for bypassing a high frequency component is connected in parallel to the voltage dividing resistor R1. For example, the capacitance of the capacitor C1 is 0.001 μF, and the resistance values of the voltage dividing resistors R1 and R2 are each 100K.
Ω and 1 KΩ.

Therefore, the analog audio signal input to the input terminal P1 is strengthened toward the high frequency side and is input to the amplifier circuit 24. The gain of the amplifier circuit 24 is flat over the entire audible frequency band, so that the pre-emphasis circuit 21 has a frequency characteristic as shown in FIG. Therefore, the output terminal P2
In the output, an output including a level in which the mid-low frequency component is limited to less than the wave height limit value, the high frequency component is increased as the frequency becomes higher, and the level including the level exceeding the wave height limit value is derived.

FIG. 4 is a circuit diagram showing a specific configuration of the limiter circuit 22. The limiter circuit 22 is roughly configured to include a differential amplifier 25, resistors R3 to R5, and Zener diodes D1 and D2. The audio signal whose high frequency component has been enhanced by the pre-emphasis circuit 21 is input from the input terminal P3 to the inverting input terminal of the differential amplifier 25 via the input resistor R3. This differential amplifier 25
The non-inverting input terminal of is grounded via a resistor R4. The output from the differential amplifier 25 is output from the output terminal P4 to the LPF 23, and is also fed back to the inverting input terminal via the feedback resistor R5. Further, a series circuit of Zener diodes D1 and D2 connected in reverse polarity to each other is connected in parallel to the resistor R5.

Therefore, when the input level to the input terminal P3 is shown on the X axis in FIG. 5, the output level to the output terminal P4 is within the peak height W1 of the predetermined amplitude as shown on the Y axis. The peak value is limited to.

The LPF 23 has a resistor R as shown in FIG.
6 and a capacitor C2, which is an RC integrator circuit, and the input signal to the input terminal P5 is, as shown in FIG.
After filtering with a filtering characteristic having a cut-off frequency fc of Hz, it is output from the output terminal P6 to the analog / digital converter 14.

Therefore, in the signal input circuit 11 configured as described above, when the analog audio signal to the input terminal 13 is low-frequency components and high-frequency components as shown in FIGS. 8 (a) and 9 (a). If the component also has a very large amplitude near the peak height limit value W1, α12, the pre-emphasis circuit 21
8B and FIG. 9 when the high frequency component is enhanced in FIG.
As indicated by reference numeral α13 in (b), the amplitude of the high frequency component exceeds the peak height limit value W1. However, in the limiter circuit 22, as shown in FIG.
As shown in FIG. 9C and FIG. 9B, the components exceeding the wave height limit values W1, α12 are the wave height limit values W1, α12.
Limited to within. At this time, the harmonic component included in the edge generated as indicated by the reference symbol α11 is removed by the LPF 23 as shown in FIG.

As described above, by providing the limiter circuit 22 and the LPF 23 for preventing the harmonic distortion accompanying the limiter circuit 22, the pre-emphasis circuit 21 enhances the high frequency component in FIG. As shown, the amplitude of the low frequency component is not suppressed relatively, and a sufficient dynamic range can be secured for the noise level.

The wave height limit value W1 is set so as to be equal to or slightly smaller than the input amplitude oscillation limit value of the analog / digital converter 14, so that the allowable input range of the analog / digital converter 14 is effective. And can prevent the analog / digital converter 14 from oscillating.

Thus, the signal input circuit 11 according to the present invention
By using the analog / digital converter 14
The sampling frequency of is the frequency band of the input signal to be transformed,
That is, for the audible frequency band, not to the relatively high frequency of about 3 to 12 MHz which can secure a sufficient S / N of high frequency components, but to the interface circuit 15 and other digital audio equipment in the subsequent stage. Even if the frequency is as low as 2 MHz or less corresponding to the transmission capacity, the stable conversion operation can be performed without generating oscillation due to excessive input while securing a wide dynamic range.

[0036]

As described above, the signal input circuit for a 1-bit analog-to-digital converter according to the first aspect of the present invention enhances the high frequency component of the analog input signal by the pre-emphasis circuit, and then the predetermined value by the limiter circuit. Limit within the wave height limit value to prevent the analog / digital converter from being over-input. Further, a low-pass filter removes distortion components such as higher harmonic components generated by the limitation.

Therefore, the sampling frequency of the analog / digital converter is set to 0 to 22000H suitable for the transmission capacity and the like.
2MHz, which is relatively low compared to the frequency band of z
Even in the following cases, the high frequency components that increase noise are reasonably enhanced, and even if de-emphasis processing is performed, the low frequency components are not relatively suppressed and a wide dynamic range can be secured. it can. In addition, it is possible to reliably suppress an excessive input to the analog / digital converter, prevent oscillation, etc., and perform stable operation.

In the signal input circuit according to the second aspect of the present invention, as described above, the crest limit value is selected to be slightly lower than the crest limit value for the analog / digital converter.
Therefore, oscillation due to excessive input of the analog / digital converter can be suppressed and the allowable input range of the analog / digital converter can be effectively used.

Furthermore, in the signal input circuit according to the third aspect of the present invention, as described above, the peak value of the analog input signal to be input to the pre-emphasis circuit is the oscillation of the analog input signal to the analog / digital converter. Selected below the limit. Therefore, since the entire frequency band is set to be less than the oscillation limit value in advance and only the high frequency component enhanced by the pre-emphasis circuit temporarily exceeds the oscillation limit value, it is limited by the limiter circuit. The limit value is constant over the entire frequency band, and it is possible to prevent the narrowing of the dynamic range due to the level suppression of the low frequency component as described in the prior art.

[Brief description of drawings]

FIG. 1 is a block diagram showing an electrical configuration of a signal input circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific configuration of a pre-emphasis circuit 21 in the signal input circuit.

FIG. 3 is a graph showing frequency characteristics of the pre-emphasis circuit 21.

FIG. 4 is a circuit diagram showing a specific configuration of a limiter circuit 22 in the signal input circuit.

5 is a graph showing input / output characteristics of the limiter circuit 22. FIG.

FIG. 6 is an air circuit diagram showing a specific configuration of an LPF 23 in the signal input circuit.

FIG. 7 is a graph showing frequency characteristics of the LPF 23.

FIG. 8 is a waveform diagram for explaining the operation of the signal input circuit.

FIG. 9 is a diagram showing a frequency spectrum for explaining the operation of the signal input circuit.

FIG. 10 is a waveform diagram for explaining the operation of 1-bit analog / digital conversion.

FIG. 11 is a graph showing a frequency spectrum after a conversion operation of a predetermined input signal in a normal operation of the 1-bit analog / digital converter.

FIG. 12 D with typical prior art input signal processing
It is a block diagram which shows the electric constitution of AT.

FIG. 13 is a diagram showing converted data for explaining an oscillating operation due to an excessive input of the 1-bit analog / digital converter.

FIG. 14 is a graph showing a frequency spectrum after the conversion operation at the time of oscillation as shown in FIG. 13 with respect to the input signal of the predetermined frequency of the 1-bit analog / digital converter.

FIG. 15 is a waveform diagram for explaining an input signal processing operation in the conventional DAT.

[Explanation of symbols]

 11 signal input circuit 12 1-bit signal recording / reproducing device 14 analog / digital converter 15 interface circuit 16 deck 17 interface circuit 18 digital / analog converter 19 de-emphasis circuit 21 pre-emphasis circuit 22 limiter circuit 23 low-pass filter

Claims (3)

[Claims] 1. A signal input circuit for an analog / digital converter for converting an analog input signal into a 1-bit digital signal, wherein the analog input signal is enhanced as it goes to a high frequency side of a frequency band to be converted. An emphasis circuit, a limiter circuit for limiting the output of the pre-emphasis circuit within a predetermined crest limit value, a low-pass filter for filtering a component of the output of the limiter circuit below the frequency band to be converted, the analog A signal input circuit for a 1-bit analog / digital converter, wherein a sampling frequency of the / digital converter is relatively low with respect to the frequency band to be converted. 2. The 1-bit analog / digital converter according to claim 1, wherein the wave height limit value is selected to be slightly lower than an oscillation limit value of an analog input signal to the analog / digital converter. Signal input circuit. 3. The peak value of the analog input signal to be input to the pre-emphasis circuit is less than the oscillation limit value of the analog input signal to the analog / digital converter. A signal input circuit for the 1-bit analog / digital converter described.