JPH08125809A - Image reader - Google Patents

Abstract

PURPOSE: To allow the reader to cope with an increasing main scanning speed by making main scanning for image reading asynchronously with subscanning by driving of a paper feed motor so as to control smoothly the sub-scanning speed. CONSTITUTION: An image is read periodically in the main scanning direction in response to a main scanning period signal by an image read means 1, which provides image data through the reception of a read enable signal. A motor drive means 3 receives a motor clock signal being an output of a motor clock output means 2 to drive a motor subscanning an image. A fetch signal output means 4 outputs a fetch signal to the image read means 1 at the start of a succeeding main scanning period every time 1st prescribed number of motor clocks are outputted. A register means 5 latches a speed setting input and a speed setting means 6 gives the latched output of the register means 5 to the motor clock output means every time a 2nd prescribed number of motor clock signals is outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading apparatus used in a facsimile machine or the like.

[0002]

2. Description of the Related Art In an image reading apparatus used for a facsimile apparatus or the like, a signal processing speed of a codec for compressing and coding an image is increased, and a main scanning speed can be increased. However, if the sub-scanning speed is simply increased accordingly, the paper feeding motor for sub-scanning is rapidly activated at the start end of the image original, and the motor is overloaded and stable activation cannot be performed. Further, even if a motor capable of rapid start-up is adopted, the meshing of the paper feed gap becomes poor at the time of rapid start-up, and in either case, the image quality deteriorates. Therefore, it is necessary to change the sub-scanning speed smoothly.

FIG. 5 is an explanatory diagram for explaining the characteristics of a conventional image reading apparatus. In the figure, 40 is the number of pulses converted per second of the motor clock, 41 is the main scanning period signal, 4
2 is a motor clock. The motor clock 42 is a clock for generating a pulse for driving the pulse motor, and in the super fine mode, one line of paper is fed per clock. When the motor is started from the stopped state, the number of pulses 40 converted per second of the motor clock increases stepwise. However, since the motor clock 42 is controlled in synchronization with the main scanning period signal 41 for reading an image, the motor clock 42 is obtained by dividing the main scanning period. Therefore, the number of pulses is 0pp
From s, 600pps, 1200pps, 2400pp
Like s, it can be changed only in double steps. Therefore, in the past, the sub-scanning speed could not be changed smoothly.

[0004]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described circumstances, and the main scanning for image reading and the sub-scanning by driving the paper feed motor are made asynchronous so that the sub-scanning is performed. An object of the present invention is to provide an image reading device that enables smooth control of speed, supports high-speed main scanning speed, and can read an image without degrading image quality even in a period until reaching a steady speed. To do.

[0005]

According to a first aspect of the present invention, in an image reading apparatus, a reading means for reading an image in a main scanning direction and receiving an acquisition signal and outputting the image signal is provided. , A motor clock output means, a means for driving a motor for inputting the motor clock and sub-scanning an image, and taking in the motor clock every time a first predetermined number is output at the start of the next main scanning cycle It is characterized by having a means for outputting a signal.

According to a second aspect of the invention, in the image reading apparatus according to the first aspect, there is provided a register means for holding the speed setting input and supplying the held output to the motor clock output means. It is what

According to a third aspect of the present invention, in the image reading apparatus according to the second aspect, the holding output of the register means is output every time the motor clock is output by a second predetermined number. It has a speed setting means for supplying to.

[0008]

When the motor clock for driving the pulse motor is output by the first predetermined number, the image capture signal is output at the start of the next main scanning cycle, thereby performing the main scanning for image reading. Even if the sub-scanning by the drive of the paper feed motor is asynchronous, the image can be read and
The sub-scanning speed can be smoothly controlled.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an explanatory view for explaining the outline of the constitution of the present invention. In the figure, 1 is an image reading means, 2 is a motor clock output means, 3 is a motor drive means, 4 is a capture signal output means, 5 is a register means, and 6 is a speed setting means. The image reading means 1 receives the main scanning period signal and the capture signal and outputs an image signal. The motor clock output means 2 supplies the motor clock to the motor drive means 3 and the fetch signal output means 4. The motor driving means 3 inputs a motor clock and drives a motor for sub-scanning an image. The take-in signal output means 4 inputs the motor clock and the main scanning period signal, and outputs the take-in signal at the start of the next main scanning period signal every time the motor clock is output by the first predetermined number. The register means 5 receives the speed setting input, and the speed setting means 6 supplies the output to the motor clock output means 2.

The operation of the outline of this configuration will be described. In the image reading means 1, the image is periodically read in the main scanning direction according to the main scanning period signal, and the image data is output upon receiving the reading permission signal. The motor drive unit 3 inputs the motor clock output from the motor clock output unit 2 and drives a motor for sub-scanning an image. The capture signal output means 4 outputs a capture signal to the image reading means 1 at the start of the next main scanning cycle each time a first predetermined number of motor clocks are output. The register means 5 holds the speed setting input, and the speed setting means 6 supplies the held output of the register means 5 to the motor clock output means every time a second predetermined number of motor clocks are output.

FIG. 2 is an explanatory view for explaining the main part of one embodiment of the present invention. In the figure, 10 is a motor speed setting register, 11 is a capture interval setting register, 12 is a speed change interval setting register, 13 is a frequency divider, 14 is a first counter, 1
5 is a second counter, 16 is a motor pulse generating means, 17
Is an acquisition signal output means.

A CPU (not shown) is a data bus D-BU.
It is connected to each input of the motor speed setting register 10, the fetch interval setting register 11, and the speed change interval setting register 12 via S. The output of each of these registers is
It is connected to the inputs of the frequency divider 13, the first counter 14, and the second counter 15.

The main clock or a clock obtained by previously dividing the main clock is input to the frequency divider 13.
The motor clock MTCLK, which is the output of the frequency divider 13, is
It is connected to the clock inputs of the motor pulse generator 16, the first counter 14, and the second counter 15. The motor pulse generation means 16 inputs the motor clock MTCLK and the rotation direction setting signal CW / CCW, and outputs motor driving pulses (excitation phases) “MA”, “MB”, “I0”, “I1”.

The capture signal output means 17 is the first counter 1
4, read permission signal TSCAN, C not shown
A CCD driving clock signal φTG for driving a CD and a response signal LNST from an image processing means (not shown) are input,
The capture signal TRSCANB is output. The CCD drive clock signal φTG may be output independently of the motor drive system.

The motor interrupt signal INTMT, which is the output of the second counter 15, serves as a signal for loading the output of the motor speed setting register 10 into the frequency divider 13, and also the CPU.
It becomes an interrupt signal for.

FIG. 3 is an explanatory diagram for explaining the waveform of the main part of one embodiment of the present invention. In the figure, 20 is a motor clock MTCLK which is an output of the frequency divider 13, 21 is a read permission signal TSCAN, and 22 is a CCD driving clock signal φT.
G and 23 are capture signals TRSCANB, 24 is a symbol representing image capture, and 25 is a motor interrupt signal INTMT. The operation of the embodiment of the present invention shown in FIG. 2 will be described with reference to the waveforms shown in FIG.

In the motor speed setting register 10,
A set value for setting the drive speed of the sub-scanning motor is input from a CPU (not shown). This setting value is the second
Motor interrupt signal INTMT output from the counter 15
It is loaded into the frequency divider 13 at the output timing of 25.
The frequency divider 13 frequency-divides the main clock and uses the count value of the loaded value as the pulse width of the motor clock MTC.
Output LK20. The motor pulse generation means 16 inputs the motor clock MTCLK20 and outputs motor drive pulses (excitation phases) "MA", "MB", "I0", "I1" according to the rotation direction setting signal CW / CCW. It outputs and drives a pulse motor (not shown). In this embodiment, the pulse motor feeds the image original in the sub-scanning direction by an interval corresponding to one line in the super fine mode by the one-cycle motor clock MTCLK20. In this way, the pulse motor feeds the image original in the sub-scanning direction at the set motor drive speed.

In the capture interval setting register 11, a set value of the number of motor clocks per capture interval is input from a CPU (not shown), and at the time of initial setting or at an arbitrary time point, a load signal (not shown) is used to set this value. Set value to 1st
The value is supplied to the counter 14, and the first counter 14 repeatedly counts up to this set value. In this one embodiment,
The setting value is 2 when the facsimile machine is in the fine mode. In addition, when the facsimile machine is in the normal mode and in the super fine mode,
It becomes 4, 1. The first counter 14 outputs the motor clock M by 2 which is the value set by the capture interval setting register 11.
Each time the TCLK 20 is counted at its down edge, the read enable signal TSCAN 21 is taken in by the capture signal output means 1
Output to 7. The capture signal output means 17 rises when the read enable signal TSCAN 21 is output, and falls when the CCD drive clock signal φTG22 indicating the start of the next main scan cycle falls, the main scan capture signal TRSCAN.
B23 is output. Therefore, in the fine mode, the symbol 24 indicating the image capturing is provided once every two steps of the motor in synchronization with the start of the next main scanning cycle.
The read signal is captured in one cycle of the main scan indicated by. Similarly, in the normal mode, it is once every four steps of the motor, and in the super fine mode, it is once every one step of the motor.
The capture signal output means 17 outputs the capture signal TRSCANB23 only when receiving the response signal LNST from the image processing means (not shown). When the image processing means can no longer process the read signal, the main scanning capture signal TRSCANB23 prohibits the read signal from being transferred to the image processing means.

In the speed change interval setting register 12, a set value of the number of motor clocks per speed change interval is inputted from a CPU (not shown), and at the time of initial setting or at an arbitrary time, a load signal (not shown) is used to set The set value is supplied to the second counter 15, and the second counter 15
Repeatedly counts up to this set value. In this embodiment, the set value is 2. The second counter 15
The motor interrupt signal INTMT25 is output every time the motor clock MTCLK20 is counted by its up edge by the value 2 set by the speed change interval setting register 12. As described above, this motor interrupt signal INTMT25 becomes an interrupt signal to the CPU at the same time as the setting value of the motor speed setting register 10 is loaded into the frequency divider 13. Therefore, the motor drive speed is changed in synchronization with the motor clock MTCLK20. Therefore, there is no possibility of supplying a transient pulse that causes the stepping motor to be out of tune when the speed is changed. Also, by notifying the CPU of the speed change point, the CP
Ensure motor control by U.

FIG. 4 is an explanatory diagram for explaining the characteristics of one embodiment of the present invention. In the figure, 30 is the number of pulses converted per second of the motor clock, 31 is a CCD driving clock signal φTG which is a main scanning period signal, 32 is a symbol representing image capture, 33 is a motor clock MTCLK, 34
Is the capture signal TRSCANB. In this illustration, 1
The case where the super fine mode is one line of pulse and the speed change interval is one pulse period is shown. CCD drive clock signal φTG31, symbol 32 indicating image capture, motor clock MTCLK33,
The main scan capture signal TRSCANB34 has been previously described in FIGS.
The signals and symbols are the same as those described above, and the description thereof will be omitted. Reference numeral 30 represents the number of pulses converted per second of the motor clock, which is compared with 40 used in FIG. 5 for explaining the characteristics of the conventional technique.

The number of pulses converted per second of the motor clock changes from 0 pps to 600 pps, thereafter increases by 300 pps and smoothly rises to 2400 pps. Note that the change characteristic of the motor speed is merely an example. The starting characteristic in the actual device can be set as shown in the figure, but depending on how the set value is given to the motor drive speed setting register 10 and, if necessary, the set value to the speed change interval setting register 12 Depending on the way of giving, it is possible to obtain a starting characteristic with a higher degree of freedom than in the prior art. Motor drive speed setting register 10
A deceleration period can also be provided by reducing the set value for. Further, instead of immediately capturing the image when the motor is started, the image may be captured after approaching the constant speed.

In the above-described one embodiment, only the operation at the time of starting the motor has been described. However, conversely, the motor speed can be controlled so that the motor can be smoothly decelerated even when the motor is stopped, and the mechanical load on the motor, gear, etc. due to the rapid stop at the end of the document can be reduced. Further, the speed of the motor may be temporarily smoothly increased or decreased according to the progress of the processing of the image processing means for processing the captured image signal to change the frequency of capturing the image reading signal.

[0023]

As is apparent from the above description, according to the image reading apparatus of the present invention, even a small-sized and low-cost motor having a low self-starting frequency can be rotated at a high speed at a constant speed by performing smooth slew-up. Is possible, and there is an effect that there is no deterioration in image quality.

[Brief description of drawings]

FIG. 1 is an explanatory diagram illustrating an outline of a configuration of the present invention.

FIG. 2 is an explanatory diagram illustrating a main part of an embodiment of the present invention.

FIG. 3 is an explanatory diagram illustrating a waveform of a main part of one embodiment of the present invention.

FIG. 4 is an explanatory diagram illustrating characteristics of one example of the present invention.

FIG. 5 is an explanatory diagram illustrating characteristics of a conventional image reading apparatus.

[Explanation of symbols]

1 ... Image reading means, 2 ... Motor clock output means, 3 ...
Motor driving means, 4 ... Acquisition signal output means, 5 ... Register means, 6 ... Speed setting means, 10 ... Motor speed setting register, 11 ... Acquisition interval setting register, 12 ... Speed change interval setting register, 13 ... Dividing Bowl, 14 ... 1st counter, 1
5 ... 2nd counter, 16 ... Motor pulse generating means, 17
... Means for outputting captured signals.

Claims (3)

[Claims] 1. A reading means for reading an image in a main scanning direction and receiving an acquisition signal to output an image signal, a motor clock output means, and a means for driving a motor for inputting the motor clock and sub-scanning the image. And the motor clock is the first
An image reading apparatus having means for outputting a capture signal at the start of the next main scanning period signal each time a predetermined number of is output. 2. The image reading apparatus according to claim 1, further comprising register means for holding a speed setting input and supplying the held output to the motor clock output means. 3. The speed setting means for supplying a holding output of the register means to the motor clock output means each time the motor clock is output by a second predetermined number. Image reading device.