JPH08125785A - Telephone set - Google Patents

Telephone set

Info

Publication number
JPH08125785A
JPH08125785A JP6286131A JP28613194A JPH08125785A JP H08125785 A JPH08125785 A JP H08125785A JP 6286131 A JP6286131 A JP 6286131A JP 28613194 A JP28613194 A JP 28613194A JP H08125785 A JPH08125785 A JP H08125785A
Authority
JP
Japan
Prior art keywords
voltage
power supply
hook
backup
telephone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6286131A
Other languages
Japanese (ja)
Other versions
JP3336548B2 (en
Inventor
Naoko Sato
直子 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kenwood KK
Original Assignee
Kenwood KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kenwood KK filed Critical Kenwood KK
Priority to JP28613194A priority Critical patent/JP3336548B2/en
Publication of JPH08125785A publication Critical patent/JPH08125785A/en
Application granted granted Critical
Publication of JP3336548B2 publication Critical patent/JP3336548B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Devices For Supply Of Signal Current (AREA)

Abstract

PURPOSE: To effectively utilize the backup power supply by supplying power supply voltage, line voltage and backup voltage to the enable input of a microcomputer and controlling a switch element by these voltages. CONSTITUTION: Because a switching transistor TrQ1 is turned on when power supply voltage + VD or line voltage + VL exists, the off-hook terminal B of a hook switch 3 is grounded and the terminal becomes 'L'. An enable input port becomes 'H' at the time of the on-hook of a receiver and becomes 'L' at the time of the off-hook. Because the TrQ1 is turned off when both of the voltage + VD, + VL do not exist, the state of the input port always remains 'H' as it is. At this time, a CPU 1 does not perform the whole operation and backs up an internal memory from a backup powr source. As a result, the voltage + VL or the voltage + VB of the backup posr source back up till they become the reset voltage of an IC 2 for voltage level detection or below. Therefore, the unnecessary power consumption of the backup power source can be suppressed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電話機に関し、特にバッ
クアップ電源の有効活用を図った電話機に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a telephone, and more particularly to a telephone which effectively utilizes a backup power source.

【0002】[0002]

【従来の技術】図3は、従来の電話機の一例の回路図で
あり、1は電話機の動作制御用マイクロコンピュータ
(以下CPUという)であり、動作電源電圧(例えば+
9V)として電源電圧+VD ,回線電圧+VL ,バック
アップ電源電圧+VB のいずれかがあれば、イネーブル
入力ポートHSが論理“L”の時動作状態、論理“H”
の時動作停止状態となるものである。CPU1のイネー
ブル入力ポートHSには、ダイオードD1,D2,D3
及び抵抗R1を介して電源電圧+VD ,回線電圧+VL
,バックアップ電源電圧+VB が供給されると共に、
フックスイッチ3の共通端子Cが接続されている。フッ
クスイッチ3は、受話器(図示しない)を持ち上げた時
(オフフック時)はB側に切り換わり、受話器を置いた
ままの時(オンフック時)はA側に切り換わる。フック
スイッチのA端子はオープンとされ、B端子は接地され
ている。CPU1のリセット入力ポートRESETには
電圧レベル検出用IC2の出力が供給されている。電圧
レベル検出用IC2は、ダイオードD1,D2,D3を
介して電源電圧+VD ,回線電圧+VL ,バックアップ
電源電圧+VB が供給され、これらの電圧が全て所定電
圧(例えば2.1V)以下になると、リセット電圧を出
力してCPU1をリセットし、誤動作を防止するための
ものである。
2. Description of the Related Art FIG. 3 is a circuit diagram of an example of a conventional telephone, in which 1 is a telephone operation control microcomputer (hereinafter referred to as CPU), and an operating power supply voltage (for example, +).
9V), if any of the power supply voltage + VD, line voltage + VL, and backup power supply voltage + VB, the operating state when the enable input port HS is logic "L", logic "H"
At that time, the operation is stopped. The diodes D1, D2, D3 are connected to the enable input port HS of the CPU1.
And power supply voltage + VD, line voltage + VL via resistor R1
, While the backup power supply voltage + VB is supplied,
The common terminal C of the hook switch 3 is connected. The hook switch 3 switches to the B side when the receiver (not shown) is lifted (when off hook), and switches to the A side when the receiver is left on (on hook). The A terminal of the hook switch is open and the B terminal is grounded. The output of the voltage level detection IC 2 is supplied to the reset input port RESET of the CPU 1. The voltage level detection IC 2 is supplied with the power supply voltage + VD, the line voltage + VL, and the backup power supply voltage + VB via the diodes D1, D2 and D3, and is reset when all of these voltages fall below a predetermined voltage (for example, 2.1V). This is for outputting a voltage to reset the CPU 1 to prevent malfunction.

【0003】上記構成の従来の電話機は、何らかの理由
で電源が接続されておらずかつ回線コネクタも接続され
ていない状態、すなわち電源電圧+VD も回線電圧+V
L も利用できない状態においては、受話器を置いたまま
でフックスイッチ3がA側になっていると、CPU1の
イネーブル入力ポートHSにバックアップ電源電圧+V
B が供給されるので、CPU1は全体動作は行なわない
が、その内部メモリはバックアップ電源電圧+VB が供
給されてバックアップされる。また、受話器を持ち上げ
ると、フックスイッチ3がB側に切り換わり、CPU1
のイネーブル入力ポートHSがフックスイッチ3を介し
て接地されて論理“L”となるので、CPU1は、動作
電源としてバックアップ電源が働いて、全体が動作状態
になる。したがって、オフフック状態の継続中は、バッ
クアップ電源の電圧+VB がCPU1のリセット電圧以
下に下がるまで、CPU1全体が動作状態のままとな
る。
The conventional telephone having the above structure is in a state where the power source is not connected and the line connector is not connected for some reason, that is, the power supply voltage + VD and the line voltage + V.
When L is not available, if the hook switch 3 is on the A side with the handset held, the backup power supply voltage + V will be applied to the enable input port HS of the CPU 1.
Since B is supplied, the CPU 1 does not perform the entire operation, but its internal memory is backed up by being supplied with the backup power supply voltage + VB. Moreover, when the handset is lifted, the hook switch 3 is switched to the B side, and the CPU 1
Since the enable input port HS of 1 is grounded via the hook switch 3 and becomes a logical "L", the backup power source of the CPU 1 operates as an operating power source, and the entire CPU 1 is in an operating state. Therefore, while the off-hook state continues, the entire CPU1 remains in the operating state until the voltage + VB of the backup power source falls below the reset voltage of the CPU1.

【0004】[0004]

【発明が解決しようとする課題】このように、上記従来
の電話機では、停電時でも回線電圧を利用してCPUを
動作させることができるが、電話機を電話回線に接続す
るのを忘れていた場合、本来停電時にCPUの内部メモ
リのみをバックアップすればよいバックアップ電源は、
上記のようにCPU全体を動作させると、その電源容量
を余分に消費する結果となり好ましくない。本発明は、
上記従来の問題を解消して、バックアップ電源を有効に
活用できる電話機を提供することにある。
As described above, in the above-mentioned conventional telephone, the CPU can be operated by utilizing the line voltage even in the case of power failure, but when the telephone is forgotten to be connected to the telephone line. , The backup power supply that originally only needs to back up the internal memory of the CPU when a power failure occurs,
If the CPU as a whole is operated as described above, the power supply capacity thereof is additionally consumed, which is not preferable. The present invention
An object of the present invention is to provide a telephone that solves the above-mentioned conventional problems and can effectively utilize a backup power supply.

【0005】[0005]

【課題を解決するための手段】本発明に係る電話機は、
動作制御用CPUを有する電話機において、前記CPU
のイネーブル入力に電源電圧と回線電圧とバックアップ
電源電圧を供給するようにすると共にフックスイッチを
接続し、前記フックスイッチのオフフック端子と接地間
に、電源電圧及び回線電圧で制御されるスイッチ素子を
接続したものである。また、上記構成においてさらに、
電源電圧と回線電圧とバックアップ電源を入力とする第
1の電圧レベル検出手段を備え、該第1の電圧レベル検
出手段の出力をCPUのリセット入力に供給するように
構成したものである。また、上記構成においてさらに、
バックアップ電源を入力とする第2の電圧レベル検出手
段を備え、該電圧レベル検出手段の出力をスイッチ素子
の制御電圧として加えるように構成したものである。
A telephone according to the present invention comprises:
In a telephone having a CPU for operation control, the CPU
A power supply voltage, a line voltage, and a backup power supply voltage are supplied to the enable input of, and a hook switch is connected, and a switch element controlled by the power supply voltage and the line voltage is connected between the off-hook terminal of the hook switch and the ground. It was done. Further, in the above configuration,
A first voltage level detecting means for inputting a power supply voltage, a line voltage and a backup power supply is provided, and an output of the first voltage level detecting means is supplied to a reset input of the CPU. Further, in the above configuration,
A second voltage level detecting means having a backup power supply as an input is provided, and an output of the voltage level detecting means is applied as a control voltage of the switch element.

【0006】[0006]

【作用】電源電圧も回線電圧も利用できない状態にある
とき、受話器をオフフックしても動作制御用CPU全体
が動作状態にならないようにし、バックアップ電源はC
PUの内部メモリのみに供給されるようにする。したが
って、バックアップ電源のバックアップ時間が従来より
長くなり有効に活用される。
When the power supply voltage and the line voltage are unavailable, the operation control CPU is prevented from operating even if the receiver is off-hook, and the backup power supply is C
Only the internal memory of the PU is supplied. Therefore, the backup time of the backup power supply is longer than in the conventional case, and it can be effectively utilized.

【0007】[0007]

【実施例】図1は、本発明による電話機の一実施例の回
路図である。なお、図3の構成要素と同じ構成要素は同
じ符号を付し、その詳細な説明は省略する。図1の回路
は、図3の回路構成に下記の構成を追加する。すなわ
ち、フックスイッチ3のB端子はスイッチングトランジ
スタQ1を介して接地される。スイッチングトランジス
タQ1のベースには、ダイオードD4,D5及び抵抗R
2を介して電源電圧+VD ,回線電圧+VL が供給され
る。
1 is a circuit diagram of an embodiment of a telephone according to the present invention. The same components as those of FIG. 3 are designated by the same reference numerals, and detailed description thereof will be omitted. The circuit of FIG. 1 has the following configuration added to the circuit configuration of FIG. That is, the B terminal of the hook switch 3 is grounded via the switching transistor Q1. At the base of the switching transistor Q1, diodes D4 and D5 and a resistor R are provided.
Power supply voltage + VD and line voltage + VL are supplied via 2.

【0008】上記の構成において、電源電圧+VD もし
くは回線電圧+VL がある場合、スイッチングトランジ
スタQ1はオンするので、フックスイッチ3のオフフッ
ク端子Bは接地されて“L”となる。したがって、イネ
ーブル入力ポートHSは、受話器のオンフック時は
“H”、オフフック時は“L”となる。次に、電源電圧
+VD がなく、かつ回線電圧+VL もない場合は、スイ
ッチングトランジスタQ1はオフするので、イネーブル
入力ポートHSの状態はオンフック時もオフフック時
も、常に“H”のままとなる。したがって、この場合に
はCPU1は全体動作は行なわないが、内部メモリには
バックアップ電源よりバックアップする状態になる。回
線電圧+VL あるいはバックアップ電源の電圧+VB
が、第1の電圧レベル検出手段としての電圧レベル検出
用IC2のリセット電圧(例えば2.1V)以下になる
まで内部メモリのバックアップが行なわれる。以上のよ
うに、図1に示した回路では、停電時や電話回線にコネ
クタを接続していない状態で、受話機を持ち上げても
(オフフック)CPUのメモリ保持動作以外の動作を禁
止するので、バックアップ電源の不要な電力消費を抑え
られ、メモリバックアップ時間をかせげる。
In the above structure, when there is the power supply voltage + VD or the line voltage + VL, the switching transistor Q1 is turned on, and the off-hook terminal B of the hook switch 3 is grounded to "L". Therefore, the enable input port HS is "H" when the receiver is on-hook and "L" when the receiver is off-hook. Next, when there is no power supply voltage + VD and no line voltage + VL, the switching transistor Q1 is turned off, so that the state of the enable input port HS is always "H" during both on-hook and off-hook. Therefore, in this case, the CPU 1 does not perform the entire operation, but the internal memory is in a state of being backed up by the backup power supply. Line voltage + VL or backup power supply voltage + VB
However, the internal memory is backed up until the reset voltage (for example, 2.1 V) of the voltage level detecting IC 2 as the first voltage level detecting means becomes lower than the reset voltage. As described above, in the circuit shown in FIG. 1, even when the handset is lifted (off-hook) during a power failure or when the connector is not connected to the telephone line, operations other than the memory holding operation of the CPU are prohibited. Unnecessary power consumption of the backup power supply can be suppressed and memory backup time can be saved.

【0009】図2は、本発明による電話機の他の実施例
の回路図である。この回路は、図1の回路と同一の構成
に加えて、さらに、電源電圧+VD ,回線電圧+VL ,
バックアップ電源電圧+VB を入力とし、入力電圧が所
定値(例えば2.7V)以下になると出力を発生する第
2の電圧レベル検出手段としての電圧レベル検出用IC
4を備え、電圧レベル検出用IC4の出力をスイッチン
グトランジスタQ1のベースに加えるように構成したも
のである。
FIG. 2 is a circuit diagram of another embodiment of the telephone according to the present invention. This circuit has the same configuration as the circuit of FIG. 1 and further includes a power supply voltage + VD, a line voltage + VL,
A voltage level detection IC as a second voltage level detection means which receives the backup power supply voltage + VB as an input and generates an output when the input voltage becomes a predetermined value (eg, 2.7 V) or less.
4 is provided and the output of the voltage level detecting IC 4 is added to the base of the switching transistor Q1.

【0010】電話機のACアダプタがコンセントに差し
込まれていて電源がある時、あるいは電話機が電話回線
に接続されオフフックしている(回線電圧+VL があ
る)時、あるいはバックアップ電源が電圧レベル検出用
IC4のリセット電圧以上の時、ダイオードD4もしく
はD5または電圧レベル検出用IC4の出力は“H”と
なるので、スイッチングトランジスタQ1はオンし、フ
ックスイッチ3がB側になっている時は、CPU1のイ
ネーブル入力ポートHSは“L”となり、CPU1は全
体動作状態となる。逆に、電源がなく、かつ電話回線に
接続されてなく、かつバックアップ電源が2、7V以下
の場合、ダイオードD4、D5、電圧レベル検出用IC
4の出力は全て“L”となるので、スイッチングトラン
ジスタQ1はオフし、CPU1のイネーブル入力ポート
HSはオンフック、オフフックにかかわらず“H”とな
る。
When the AC adapter of the telephone is plugged into an outlet and has a power source, or when the telephone is connected to the telephone line and is off-hook (there is a line voltage + VL), or the backup power source is the voltage level detecting IC4. When the voltage is equal to or higher than the reset voltage, the output of the diode D4 or D5 or the voltage level detection IC 4 becomes "H". Therefore, the switching transistor Q1 is turned on, and when the hook switch 3 is on the B side, the enable input of the CPU 1 is performed. The port HS becomes "L", and the CPU 1 is in the whole operating state. On the contrary, when there is no power source and is not connected to the telephone line and the backup power source is 2.7V or less, the diodes D4 and D5, the voltage level detection IC
Since the outputs of all 4 are "L", the switching transistor Q1 is turned off, and the enable input port HS of the CPU 1 is "H" regardless of whether it is on-hook or off-hook.

【0011】イネーブル入力ポートHSが“H”の場
合、CPU1は内部メモリのバックアップのみを行なう
モードになり、電圧レベル検出用IC2の出力が“L”
となる2、1Vまで、バックアップ電源より内部メモリ
へのバックアップを行なう。以上のように、図2に示し
た回路では、外部電源なし、回線電圧+VL なし、バッ
クアップ電源がCPU1のリセット電圧よりも下がった
場合、強制的にオンフックとなり、受話器を持ち上げて
もCPU1は全体動作せず、内部メモリのバックアップ
のみを行なう。よってバックアップ時間が長くなる。す
なわち、停電時や電話回線にコネクタを接続していない
状態で、受話器を持ち上げても(オフフック)、バック
アップ電源の電圧がリセット電圧まで低下した場合、C
PUのメモリ保持動作以外の動作を禁止するので、バッ
クアップ電源の不要な電力消費を抑えられ、メモリバッ
クアップ時間をかせぐことができる。
When the enable input port HS is "H", the CPU 1 is in a mode for backing up only the internal memory, and the output of the voltage level detecting IC 2 is "L".
Up to 2, 1 V, the backup power supply backs up to the internal memory. As described above, in the circuit shown in FIG. 2, when there is no external power supply, there is no line voltage + VL, and the backup power supply is lower than the reset voltage of the CPU1, the CPU1 is forcibly turned on hook and the CPU1 operates as a whole even if the handset is lifted. No, only backup the internal memory. Therefore, the backup time becomes long. That is, if the backup power supply voltage drops to the reset voltage even when the handset is lifted (off-hook) during a power failure or when the connector is not connected to the telephone line, C
Since operations other than the memory holding operation of the PU are prohibited, unnecessary power consumption of the backup power supply can be suppressed and the memory backup time can be saved.

【0012】[0012]

【発明の効果】本発明による電話機によれば、停電時や
電話回線にコネクタを接続していない状態で、受話機を
持ち上げても(オフフック)、CPUのメモリ保持動作
以外の動作を禁止するので、バックアップ電源の不要な
電力消費を抑えられ、メモリバックアップ時間をかせぐ
ことができる。
According to the telephone of the present invention, even if the receiver is lifted (off-hook) during a power failure or when the connector is not connected to the telephone line, operations other than the memory holding operation of the CPU are prohibited. , The unnecessary power consumption of the backup power supply can be suppressed and the memory backup time can be saved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による電話機の一実施例の回路図であ
る。
FIG. 1 is a circuit diagram of an embodiment of a telephone according to the present invention.

【図2】図2は、本発明による電話機の他の実施例の回
路図である。
FIG. 2 is a circuit diagram of another embodiment of a telephone according to the present invention.

【図3】従来の電話機の一例の回路図である。FIG. 3 is a circuit diagram of an example of a conventional telephone.

【符号の説明】[Explanation of symbols]

1 動作制御用CPU 2 電圧レベル検出用IC 3 フックスイッチ 4 電圧レベル検出用IC +VD 電源電圧 +VL 回線電圧 +VB バックアップ電源 Q1 スイッチングトランジスタ 1 CPU for operation control 2 IC for voltage level detection 3 Hook switch 4 IC for voltage level detection + VD Power supply voltage + VL Line voltage + VB Backup power supply Q1 Switching transistor

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 動作制御用マイクロコンピュータを有す
る電話機において、前記マイクロコンピュータのイネー
ブル入力に電源電圧と回線電圧とバックアップ電源電圧
を供給するようにすると共にフックスイッチを接続し、
前記フックスイッチのオフフック端子と接地間に、電源
電圧及び回線電圧で制御されるスイッチ素子を接続した
ことを特徴とする電話機。
1. A telephone having an operation control microcomputer, wherein a power supply voltage, a line voltage and a backup power supply voltage are supplied to an enable input of the microcomputer and a hook switch is connected.
A telephone characterized in that a switch element controlled by a power supply voltage and a line voltage is connected between the off-hook terminal of the hook switch and the ground.
【請求項2】 請求項1記載の電話機において、電源電
圧と回線電圧とバックアップ電源を入力とする第1の電
圧レベル検出手段を備え、該第1の電圧レベル検出手段
の出力をマイクロコンピュータのリセット入力に供給す
るように構成した電話機。
2. The telephone according to claim 1, further comprising first voltage level detecting means for inputting a power supply voltage, a line voltage and a backup power supply, and the output of the first voltage level detecting means is reset by a microcomputer. A telephone configured to feed the input.
【請求項3】 請求項1または2記載の電話機におい
て、バックアップ電源を入力とする第2の電圧レベル検
出手段を備え、該第2の電圧レベル検出手段の出力をス
イッチ素子の制御電圧として加えるように構成した電話
機。
3. The telephone according to claim 1, further comprising a second voltage level detecting means having a backup power supply as an input, and applying an output of the second voltage level detecting means as a control voltage of a switch element. Phone configured in.
JP28613194A 1994-10-27 1994-10-27 Phone Expired - Fee Related JP3336548B2 (en)

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JP28613194A JP3336548B2 (en) 1994-10-27 1994-10-27 Phone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28613194A JP3336548B2 (en) 1994-10-27 1994-10-27 Phone

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Publication Number Publication Date
JPH08125785A true JPH08125785A (en) 1996-05-17
JP3336548B2 JP3336548B2 (en) 2002-10-21

Family

ID=17700339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28613194A Expired - Fee Related JP3336548B2 (en) 1994-10-27 1994-10-27 Phone

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Country Link
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JP3336548B2 (en) 2002-10-21

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