JPH08125262A - Semiconductor light-emitting device having v-shaped groove structure - Google Patents

Semiconductor light-emitting device having v-shaped groove structure

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Publication number
JPH08125262A
JPH08125262A JP26283994A JP26283994A JPH08125262A JP H08125262 A JPH08125262 A JP H08125262A JP 26283994 A JP26283994 A JP 26283994A JP 26283994 A JP26283994 A JP 26283994A JP H08125262 A JPH08125262 A JP H08125262A
Authority
JP
Japan
Prior art keywords
layer
active layer
groove
semiconductor device
refractive index
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26283994A
Other languages
Japanese (ja)
Other versions
JP3446344B2 (en
Inventor
Kenji Shimoyama
謙司 下山
Satoru Nagao
哲 長尾
Kazumasa Kiyomi
和正 清見
Hideki Goto
秀樹 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Chemical Corp
Original Assignee
Mitsubishi Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Chemical Corp filed Critical Mitsubishi Chemical Corp
Priority to JP26283994A priority Critical patent/JP3446344B2/en
Priority to EP95307641A priority patent/EP0709902B1/en
Priority to DE69525128T priority patent/DE69525128T2/en
Publication of JPH08125262A publication Critical patent/JPH08125262A/en
Priority to US08/970,145 priority patent/US6265733B1/en
Priority to US09/785,428 priority patent/US6744066B2/en
Priority to US09/867,440 priority patent/US6589807B2/en
Application granted granted Critical
Publication of JP3446344B2 publication Critical patent/JP3446344B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE: To provide a V-shaped groove structure, which can easily obtain a quantum fine wire of good quality. CONSTITUTION: A double heterostructure, wherein a first light guide layer of a refractive index larger than that of first and second clad layers is vertically inserted between the clad layers of the refractive index smaller than that of the guide layer, is epitaxially grown on a semiconductor substrate, a groove with a section formed into a V shape is provided in at least one part of an epitaxially grown layer of a double heterostructure and an active layer is provided on the bottom part of the groove with the section formed into the V shape. Moreover, the left and right parts of the active layer are brought into contact with the light guide layer and a third clad layer of a refractive index smaller than that of the active layer is provided on the upper part of the active layer. Thereby, a semiconductor device having a structure, wherein the active layer is buried in the V-shaped groove, is manufactured.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の利用分野】本発明は半導体発光装置、好ましく
は量子効果を用いた半導体発光装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, preferably a semiconductor light emitting device using the quantum effect.

【0002】[0002]

【従来の技術】量子井戸、量子細線、量子箱等の量子マ
イクロ構造を有する半導体装置は、特に半導体発光装置
として特に好適に用いられ、電子と正孔の量子化効果に
よって、低しきい値電流、高変調帯域、高コヒーレンス
特性等において、優れた特性が得られている。
2. Description of the Related Art A semiconductor device having a quantum microstructure such as a quantum well, a quantum wire, and a quantum box is particularly preferably used as a semiconductor light emitting device, and has a low threshold current due to a quantization effect of electrons and holes. Excellent characteristics are obtained in high modulation band, high coherence characteristics, and the like.

【0003】そして量子細線の作成方法としては、量子
井戸構造を作っておいてから、電子線露光等による微細
なフォトリソグラフィー法とイオンビームによる垂直エ
ッチングを組み合わせて用いて細線を形成する方法や、
図4に示す基板上にV字形状の溝を設け、この後に断面
がV字になる溝(以下、「V溝」という)形状を有する
基板全面にダブルヘテロ構造を成長させる方法が行われ
ている。
As a method of forming a quantum wire, a quantum well structure is formed and then a fine photolithography method by electron beam exposure or the like and vertical etching by an ion beam are used in combination to form a wire.
A method of forming a V-shaped groove on the substrate shown in FIG. 4 and then growing a double hetero structure on the entire surface of the substrate having a groove having a V-shaped cross section (hereinafter referred to as “V groove”) is performed. There is.

【0004】[0004]

【発明が解決すべき課題】しかし、量子細線は微少な領
域であるために、レーザ構造に応用しても、出射面での
光密度が非常に大きくなりやすくなり、非常に微弱な光
出力しか得ることができないとういう問題が生じてしま
っている。特性面以外に作製面でも以下の問題が存在し
ている。前者の方法は、加工による溝側壁の損傷が大き
く、細線の品質は劣ったものになりやすい。一方後者
は、成長速度の方位依存性を利用し、量子細線を選択的
に行うことができるが、V溝を形成しようとする部分の
組成によっては、形成したV溝の底が丸みを帯びてしま
ったり、あるいはウェットエッチングのさいに、エッチ
ング表面に酸化膜が形成されてしまったり、不純物で汚
染されてしまったり、あるいはエッチングにより、V溝
の底が丸まってしまったりすることがある。
However, since the quantum wire is in a very small area, even if it is applied to a laser structure, the light density at the emitting surface tends to be very high, and the light output is very weak. There is a problem that you cannot get it. In addition to the characteristics, the following problems exist in terms of fabrication. In the former method, the side wall of the groove is largely damaged by the processing, and the quality of the fine wire is likely to be inferior. On the other hand, in the latter, the quantum wire can be selectively formed by utilizing the orientation dependence of the growth rate, but the bottom of the formed V groove is rounded depending on the composition of the portion where the V groove is to be formed. In some cases, during wet etching, an oxide film is formed on the etching surface during wet etching, it is contaminated with impurities, or the bottom of the V groove is rounded due to etching.

【0005】このため、高品質の量子細線の作製技術の
確立のみならず、素子特性を充分発揮できる量子細線周
りの構造の最適化もまた現在の課題である。
Therefore, not only the establishment of a technique for producing high-quality quantum wires, but also the optimization of the structure around the quantum wires capable of sufficiently exhibiting the device characteristics is a current subject.

【0006】[0006]

【課題を解決するための手段】そこで本発明者らは、鋭
意研究の結果、かかる課題が、特定の構造により解決さ
れることを見いだし本発明に到達した。すなわち本発明
の目的は、品質のよい量子細線を有する半導体装置を提
供することであり、かかる目的は、屈折率のより大きい
第1光ガイド層を屈折率のより小さい第1及び第2クラ
ッド層で上下に挟み込んだダブルヘテロ構造を半導体基
板上にエピタキシャル成長させ、該ダブルヘテロ構造の
エピタキシャル成長層の少なくとも一部に断面がV字に
なる溝を有し、該V字になる溝の底の部分に活性層が設
けられ、かつ該活性層の左右が該光ガイド層に接してお
り、該活性層の上部に該活性層よりも屈折率の小さい第
3クラッド層を設けることにより、該活性層がV溝内に
埋め込まれた構造を有する半導体装置、より好ましくは
該活性層と第3クラッド層との間に、屈折率が該活性層
よりも小さくかつ該第3クラッッド層よりも大きい第2
光ガイド層を設けた構造を有する半導体装置、該第1ク
ラッド層と該第1光ガイド層が同一の第1の導電型であ
り、該第3クラッド層と該第2光ガイド層が同一の第2
の導電型であり、該第2クラッド層が第2の導電型もし
くは高抵抗である半導体装置、該活性層が、量子井戸構
造を有する半導体装置、該V字になる溝の斜面が、{1
11}B面である半導体装置、V字になる溝が、気相エ
ッチングにより形成された前記半導体装置等により、容
易に達成される。
The inventors of the present invention, as a result of intensive research, have found that such a problem can be solved by a specific structure, and have reached the present invention. That is, an object of the present invention is to provide a semiconductor device having a high quality quantum wire, and an object of the present invention is to provide a first optical guide layer having a larger refractive index with first and second clad layers having a smaller refractive index. The double hetero structure sandwiched between the upper and lower sides is epitaxially grown on a semiconductor substrate, and a groove having a V-shaped cross section is formed in at least a part of the epitaxial growth layer of the double hetero structure. The active layer is provided, and the left and right sides of the active layer are in contact with the light guide layer, and the third cladding layer having a smaller refractive index than the active layer is provided on the active layer, whereby the active layer is formed. A semiconductor device having a structure embedded in a V groove, more preferably a second device having a refractive index smaller than that of the active layer and larger than that of the third cladding layer between the active layer and the third cladding layer.
A semiconductor device having a structure in which an optical guide layer is provided, the first cladding layer and the first optical guide layer are of the same first conductivity type, and the third cladding layer and the second optical guide layer are the same. Second
A semiconductor device having a second conductivity type or a high resistance, the active layer having a quantum well structure, and the slope of the V-shaped groove is {1
The semiconductor device having the 11} B plane and the V-shaped groove are easily achieved by the semiconductor device and the like formed by vapor phase etching.

【0007】以下に本発明を詳細に説明する。本発明の
半導体装置の構造は、III−V族化合物半導体、II−VI
族化合物半導体等に好適に使用できる。そして本発明の
構造は、活性領域内でのキャリアの伝導を利用した電子
素子として好適に用いられるが、特に好適には発光半導
体装置として用いられる。
The present invention will be described in detail below. The structure of the semiconductor device of the present invention is III-V compound semiconductor, II-VI.
It can be suitably used for group compound semiconductors and the like. The structure of the present invention is preferably used as an electronic element utilizing the conduction of carriers in the active region, and particularly preferably used as a light emitting semiconductor device.

【0008】本発明の半導体装置の構造を、実施例で作
成したIII−V族の(100)面GaAs基板上に成長
させた図1の装置の説明図を用いて説明する。(10
0)面を用いたのは、V溝の対称性や直進性によって量
子井戸の対称性や直進性が影響を受けるため、この点で
最も有利である方位を選んだためであるが、極端に量子
井戸の対称性や直進性が影響を受けない限り、任意の方
向の基板を用いることができる。もちろんオフアングル
方向についても同様のことが言える。本発明のV溝は、
基板又は基板上に成長したエピタキシャル層に設けられ
る。そして、V溝の方向は、<110>方向から10°
以下が好ましく、より好ましくは5°以下である。10
°を越えて<110>方向からずれると、V溝の側面の
状態が、ギザギザの階段状になりやすくあまり好ましく
ない。
The structure of the semiconductor device of the present invention will be described with reference to the explanatory view of the device of FIG. 1 grown on the III-V group (100) plane GaAs substrate prepared in the embodiment. (10
The (0) plane is used because the symmetry and straightness of the V-groove affect the symmetry and straightness of the quantum well. A substrate in any direction can be used as long as the symmetry and straightness of the quantum well are not affected. Of course, the same can be said for the off-angle direction. The V groove of the present invention is
It is provided on a substrate or an epitaxial layer grown on the substrate. The direction of the V groove is 10 ° from the <110> direction.
The following is preferable, and 5 ° or less is more preferable. 10
If it deviates from the <110> direction by more than °, the state of the side surface of the V groove is likely to be jagged and is not so preferable.

【0009】そして活性層は、このV溝の底の部分に設
けられる。活性層の厚さは、活性層として量子井戸構造
を用いる場合、量子細線として用いるためには20nm
以下が好ましいが、50nm程度まではある程度の量子
効果が得られる。活性層の組成や導電型については、通
常使用される全てのものが使用でき、特に限定されな
い。本発明においては、屈折率のより大きい第1光ガイ
ド層を屈折率のより小さい第1及び第2クラッド層で上
下に挟み込んだダブルヘテロ構造を半導体基板上にエピ
タキシャル成長させ、該ダブルヘテロ構造のエピタキシ
ャル成長層の少なくとも一部に断面がV字になる溝を有
し、該V字になる溝の底の部分に活性層が設けられ、か
つ該活性層の左右が該光ガイド層に接しており、該活性
層の上部に該活性層よりも屈折率の小さい第3クラッド
層を設けることにより、該活性層がV溝内に埋め込まれ
た構造を有する半導体装置、活性層をV溝の底に設けた
ため、発光特性の優れた量子細線を作成することができ
る。
The active layer is provided at the bottom of the V groove. When the quantum well structure is used as the active layer, the thickness of the active layer is 20 nm for use as quantum wires.
The following is preferable, but some quantum effect can be obtained up to about 50 nm. With respect to the composition and conductivity type of the active layer, any of those usually used can be used, and there is no particular limitation. In the present invention, a double hetero structure in which a first optical guide layer having a higher refractive index is vertically sandwiched by first and second cladding layers having a lower refractive index is epitaxially grown on a semiconductor substrate, and the double hetero structure is epitaxially grown. At least a part of the layer has a groove having a V-shaped cross section, an active layer is provided at the bottom of the V-shaped groove, and the left and right sides of the active layer are in contact with the light guide layer, By providing a third cladding layer having a smaller refractive index than the active layer on the active layer, a semiconductor device having a structure in which the active layer is embedded in the V groove, and the active layer is provided at the bottom of the V groove. Therefore, it is possible to create a quantum wire having excellent light emission characteristics.

【0010】本発明の好ましい態様としては、該活性層
と第3クラッド層との間に、屈折率が該活性層よりも小
さくかつ該第3クラッッド層よりも大きい第2光ガイド
層を設けた構造であり、このような構造をとることで、
量子細線からなる活性層内で電子と正孔の再結合により
発生したレーザ光を量子細線の周囲に光を染み出せるよ
うになり、光出力の増加が可能となる。このとき、第1
及び第2光ガイド層の屈折率は、同じにしておくと、対
称性の良い円形ビームが得やすくなる。そして本発明の
好適な構造の一つは、該第1クラッド層と該第1光ガイ
ド層が同一の第1の導電型であり、該第3クラッド層と
該第2光ガイド層が同一の第2の導電型であり、該第2
クラッド層が第2の導電型もしくは高抵抗とすることで
あり、このような構造をとることで、電流をV溝の底に
ある活性層に集中させることができるのでレーザダイオ
ード等に特に好適に用いられる。
In a preferred embodiment of the present invention, a second optical guide layer having a refractive index smaller than that of the active layer and larger than that of the third cladding layer is provided between the active layer and the third cladding layer. It is a structure, and by taking such a structure,
The laser light generated by the recombination of electrons and holes in the active layer made of quantum wires can be exuded around the quantum wires, and the light output can be increased. At this time, the first
When the refractive indices of the second light guide layer are the same, it is easy to obtain a circular beam with good symmetry. One of preferred structures of the present invention is that the first cladding layer and the first light guide layer are of the same first conductivity type, and the third cladding layer and the second light guide layer are the same. The second conductivity type, the second
The clad layer is of the second conductivity type or of high resistance, and by adopting such a structure, the current can be concentrated in the active layer at the bottom of the V groove, which is particularly suitable for a laser diode or the like. Used.

【0011】そしてこのV溝の斜面は、{111}B面
であることが好ましい。{111}B面とは、III−V
族化合物半導体であればV族のみが表面にならぶ{11
1}面になり、II−VI族化合物半導体であればVI族のみ
が表面にならぶ{111}面になる。これは、一般に
{111}B面上には、結晶成長が生じにくく、V溝の
底から成長を始めることが容易であるためである。
The slope of the V groove is preferably the {111} B plane. The {111} B plane is III-V.
If it is a group compound semiconductor, only the group V has a surface {11
If the compound semiconductor is a II-VI group compound semiconductor, only the group VI becomes a {111} plane. This is because crystal growth generally does not easily occur on the {111} B plane, and it is easy to start growth from the bottom of the V groove.

【0012】そして本発明のV溝は、気相エッチングに
より形成することが好ましい。これは、従来のようにウ
ェットエッチングでV溝を作成すると、V溝の底が、丸
まった形状になりやすく、また、不純物がエッチング面
に残ったり、酸化膜が形成されたりすると、エッチング
面に接する形で活性層を設けても、品質のよい活性層を
得ることが困難になりやすいためである。
The V groove of the present invention is preferably formed by vapor phase etching. This is because when the V groove is formed by wet etching as in the conventional case, the bottom of the V groove tends to have a rounded shape, and when impurities remain on the etching surface or an oxide film is formed on the etching surface, This is because it is difficult to obtain a high quality active layer even if the active layer is provided in contact with each other.

【0013】又、V溝は逆ピラミッド状のような、長手
方向の長さを持たないような構造でもよいことはいうま
でもない。本発明の構造の好ましい製造方法の1例とし
ては、まず基板上に第1クラッド層となる層をエピタキ
シャル成長させる。このとき用いる成長方法は、有機金
属気相成長法(MOCVD法)が好ましい。このエピタ
キシャルウェハ表面に、フォトリソグラフィー法等のパ
ターニングプロセスを用いてストライプ状の窒化シリコ
ン膜を形成する。このとき窒化シリコン膜のストライプ
の方向は、<110>方向であることが好ましい。この
後、有機金属気相成長(MOCVD)法用のリアクタ内
にエッチングガスを導入することにより、窒化シリコン
膜をマスクとした、第1クラッド層のin−situガ
スエッチングを行い、先端の鋭く尖ったV溝を形成し、
そのまま基板を空気中にさらすことなく連続的に量子細
線及び第2クラッド層をV溝内に成長させる。このとき
好適なエッチングガスとしては、HClが挙げられる。
又、この方法を用いると、不純物がエッチング面に残っ
たり、酸化膜が形成されたりすることがないので、エッ
チング面に直接活性層を成長させても、品質のよい活性
層をえることができる。また、必要に応じて、V溝内へ
の成長層の最表面にコンタクト層を形成してもよいこと
は言うまでもない。
Needless to say, the V-groove may have a structure having no length in the longitudinal direction, such as an inverted pyramid shape. As an example of a preferred method of manufacturing the structure of the present invention, first, a layer to be the first cladding layer is epitaxially grown on the substrate. The growth method used at this time is preferably a metal organic chemical vapor deposition method (MOCVD method). A stripe-shaped silicon nitride film is formed on the surface of the epitaxial wafer by using a patterning process such as a photolithography method. At this time, the stripe direction of the silicon nitride film is preferably the <110> direction. After that, by introducing an etching gas into the reactor for metal organic chemical vapor deposition (MOCVD) method, in-situ gas etching of the first cladding layer is performed using the silicon nitride film as a mask, and the tip is sharply pointed. Forming a V-groove,
The quantum wires and the second cladding layer are continuously grown in the V groove without exposing the substrate to the air as it is. At this time, HCl is a suitable etching gas.
Further, when this method is used, impurities are not left on the etching surface or an oxide film is not formed, so that a high-quality active layer can be obtained even if the active layer is directly grown on the etching surface. . Further, it goes without saying that a contact layer may be formed on the outermost surface of the growth layer in the V groove, if necessary.

【0014】以下本発明を実施例を用いて更に詳細に説
明するが、本発明はその要旨を越えない限り、実施例に
限定されるものではない。 (実施例1)最初に、n型(100)GaAs基板上
に、MOCVD法にて、n型GaAsバッファ層(0.
5μm)、n型Al0.5Ga0.5Asクラッド層(2μ
m)、n型Al0.2Ga0.8As光ガイド層(0.5μ
m)、アンドープAl0.5Ga0.5As高抵抗層(1μ
m)、アンドープGaAsキャップ層(0.2nm)を
この順に形成した。このエピ基板の表面に、窒化シリコ
ンをPCVD法で成膜し、これをフォトリソグラフィー
法で[011]方向に伸びる幅1μmの窒化シリコン膜
が、1μmおきに並ぶ形状にマスクした。このマスク済
のサンプルを再びMOCVD装置にセットした。セット
後、アルシン(AsH3)雰囲気下で700℃まで昇温
し、それからHClガスを用いてエッチングを行い、
{111}B面を両側側面に有するV溝を形成した。エ
ッチングを停止した直後に温度を700℃に維持したま
ま、トリメチルガリウム(TMG)を供給し、V溝内に
3nmのGaAs活性層を形成し、さらにTMGと共に
トリメチルアルミニウム(TMA)も同時に供給し、
0.3μmのp型Al0.8Ga0.2As光ガイド層、1μ
mのp型Al0.5Ga0.5Asクラッド層を作製し、再び
アルシンとTMGを供給し、0.1μmのp型GaAs
層を形成した。この製造プロセスの説明を図2に示す。
このとき、{111}B面上は、エピタキシャル成長が
困難であるため、V溝の側壁には成長が起こらず、結果
としてV溝の底にGaAsの量子細線が、自己整合的に
形成される。又、成長中にもHClをIII族原料と同モ
ル程度の1sccm程度供給することにより、窒化シリ
コン層上に、AlGaAsの多結晶の析出を防いだ。こ
の成長中にHClを供給する手法は、特にGaAlAs
層のアルミニウム組成が0.4以上の時に好適に用いら
れ、そして高いアルミニウム組成を有するAlGaAs
の選択成長が可能となるので、活性層へのキャリアの閉
じ込めに効果がある。
Hereinafter, the present invention will be described in more detail with reference to examples, but the present invention is not limited to the examples as long as the gist thereof is not exceeded. (Embodiment 1) First, an n-type GaAs buffer layer (0.
5 μm), n-type Al 0.5 Ga 0.5 As clad layer (2 μm
m), n-type Al 0.2 Ga 0.8 As optical guide layer ( 0.5 μm)
m), undoped Al 0.5 Ga 0.5 As high resistance layer (1 μm
m) and an undoped GaAs cap layer (0.2 nm) were formed in this order. A silicon nitride film was formed on the surface of this epitaxial substrate by the PCVD method, and a silicon nitride film having a width of 1 μm extending in the [011] direction was masked by photolithography so as to be arranged at intervals of 1 μm. The masked sample was set again in the MOCVD apparatus. After setting, the temperature is raised to 700 ° C. in an arsine (AsH 3 ) atmosphere, and then etching is performed using HCl gas.
V-grooves having {111} B planes on both side surfaces were formed. Immediately after stopping the etching, while maintaining the temperature at 700 ° C., trimethylgallium (TMG) was supplied to form a GaAs active layer of 3 nm in the V groove, and trimethylaluminum (TMA) was also supplied together with TMG.
0.3 μm p-type Al 0.8 Ga 0.2 As optical guide layer, 1 μm
m p-type Al 0.5 Ga 0.5 As clad layer was prepared, arsine and TMG were supplied again, and 0.1 μm p-type GaAs
A layer was formed. An explanation of this manufacturing process is shown in FIG.
At this time, since epitaxial growth is difficult on the {111} B plane, growth does not occur on the side wall of the V groove, and as a result, a GaAs quantum wire is formed in the bottom of the V groove in a self-aligned manner. Also, during the growth, HCl was supplied at about 1 sccm, which is about the same mole as the group III raw material, to prevent the deposition of AlGaAs polycrystals on the silicon nitride layer. The method of supplying HCl during this growth is
AlGaAs preferably used when the aluminum composition of the layer is 0.4 or more and having a high aluminum composition
Since it is possible to selectively grow the carrier, it is effective in confining carriers in the active layer.

【0015】こうして成長させたサンプルの上下に電極
を形成し、レーザチップに劈開して、レーザ素子を作製
した。図1に示すように、1mAという低しきい値でレ
ーザ発振し、5mWまでの光出力が得られた。これらの
結果は、高品質かつ実用に耐えうる量子細線レーザを作
製できたことを示している。
Electrodes were formed on the upper and lower sides of the sample thus grown and cleaved into laser chips to produce laser devices. As shown in FIG. 1, laser oscillation was performed at a low threshold value of 1 mA, and an optical output of up to 5 mW was obtained. These results show that a quantum wire laser with high quality and practical use could be manufactured.

【0016】[0016]

【発明の効果】本発明により、高品質かつ実用に耐えう
る光出力をだせる量子細線レーザを容易に作製すること
が可能となる。
According to the present invention, it becomes possible to easily manufacture a quantum wire laser capable of producing an optical output of high quality and capable of withstanding practical use.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は本発明の、実施例にて作成した1態様を
示す説明図である。
FIG. 1 is an explanatory diagram showing one mode created in an embodiment of the present invention.

【図2】図2は本発明の、実施例に用いた製造プロセス
の説明図である。
FIG. 2 is an explanatory diagram of a manufacturing process used in an example of the present invention.

【図3】図3は本発明の、実施例にて作成したレーザ素
子の電流−電圧特性を示す図である。
FIG. 3 is a diagram showing current-voltage characteristics of laser devices prepared in Examples of the present invention.

【図4】図4は、従来の量子細線を用いた素子の典型を
示した説明図である。
FIG. 4 is an explanatory diagram showing a typical example of a device using a conventional quantum wire.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 後藤 秀樹 茨城県牛久市東猯穴町1000番地 三菱化学 株式会社筑波事業所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hideki Goto 1000, Higashihuinana-cho, Ushiku-shi, Ibaraki Mitsubishi Chemical Corporation Tsukuba Plant

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】屈折率のより大きい第1光ガイド層を屈折
率のより小さい第1及び第2クラッド層で上下に挟み込
んだダブルヘテロ構造を半導体基板上にエピタキシャル
成長させ、該ダブルヘテロ構造のエピタキシャル成長層
の少なくとも一部に断面がV字になる溝を有し、該V字
になる溝の底の部分に活性層が設けられ、かつ該活性層
の左右が該光ガイド層に接しており、該活性層の上部に
該活性層よりも屈折率の小さい第3クラッド層を設ける
ことにより、該活性層がV溝内に埋め込まれた構造を有
する半導体装置。
1. A double hetero structure in which a first optical guide layer having a larger refractive index is vertically sandwiched by first and second clad layers having a smaller refractive index, is epitaxially grown on a semiconductor substrate, and the double hetero structure is epitaxially grown. At least a part of the layer has a groove having a V-shaped cross section, an active layer is provided at the bottom of the V-shaped groove, and the left and right sides of the active layer are in contact with the light guide layer, A semiconductor device having a structure in which a third clad layer having a refractive index smaller than that of the active layer is provided on the active layer so that the active layer is embedded in a V groove.
【請求項2】該活性層と該第3クラッド層との間に、屈
折率が該活性層よりも小さくかつ該第3クラッッド層よ
りも大きい第2光ガイド層を設けた構造を有する請求項
1記載の半導体装置。
2. A structure in which a second optical guide layer having a refractive index smaller than that of the active layer and larger than that of the third cladding layer is provided between the active layer and the third cladding layer. 1. The semiconductor device according to 1.
【請求項3】該第1クラッド層と該第1光ガイド層が同
一の第1の導電型であり、該第3クラッド層と該第2光
ガイド層が同一の第2の導電型であり、該第2クラッド
層が第2の導電型もしくは高抵抗である請求項1又至2
記載の半導体装置。
3. The first cladding layer and the first light guide layer are of the same first conductivity type, and the third cladding layer and the second light guide layer are of the same second conductivity type. The second clad layer has a second conductivity type or high resistance.
13. The semiconductor device according to claim 1.
【請求項4】該活性層が、量子井戸構造を有する請求項
1又至3記載の半導体装置。
4. The semiconductor device according to claim 1, wherein the active layer has a quantum well structure.
【請求項5】該V字になる溝の斜面が、{111}B面
である請求項1乃至4のいずれかに記載の半導体装置。
5. The semiconductor device according to claim 1, wherein the slope of the V-shaped groove is a {111} B plane.
【請求項6】該V字になる溝が、気相エッチングにより
形成された請求項1乃至5のいずれかに記載の半導体装
置。
6. The semiconductor device according to claim 1, wherein the V-shaped groove is formed by vapor phase etching.
JP26283994A 1994-10-26 1994-10-26 Semiconductor light emitting device having V-groove structure Expired - Fee Related JP3446344B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP26283994A JP3446344B2 (en) 1994-10-26 1994-10-26 Semiconductor light emitting device having V-groove structure
EP95307641A EP0709902B1 (en) 1994-10-26 1995-10-26 Light-emitting semiconductor device and method for manufacturing the same
DE69525128T DE69525128T2 (en) 1994-10-26 1995-10-26 Semiconductor light emitting device and manufacturing method
US08/970,145 US6265733B1 (en) 1994-10-26 1997-11-13 Semiconductor device and method for manufacturing the same
US09/785,428 US6744066B2 (en) 1994-10-26 2001-02-20 Semiconductor device and method for manufacturing the same
US09/867,440 US6589807B2 (en) 1994-10-26 2001-05-31 Semiconductor device and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26283994A JP3446344B2 (en) 1994-10-26 1994-10-26 Semiconductor light emitting device having V-groove structure

Publications (2)

Publication Number Publication Date
JPH08125262A true JPH08125262A (en) 1996-05-17
JP3446344B2 JP3446344B2 (en) 2003-09-16

Family

ID=17381339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26283994A Expired - Fee Related JP3446344B2 (en) 1994-10-26 1994-10-26 Semiconductor light emitting device having V-groove structure

Country Status (1)

Country Link
JP (1) JP3446344B2 (en)

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