JPH08123718A - Buffer controller - Google Patents

Abstract

(57) [Summary] [Object] The present invention relates to a buffer control device used in a computer system or the like having a plurality of processing units and requiring buffer control, and managing a data storage state in a buffer area on a memory. The purpose of the present invention is to enable a quick troubleshooting so that the acquisition order and the release order of the buffer areas can be accurately known when a trouble occurs. [Structure] It has a function of acquiring a buffer area for storing data on the memory 1 and a function of releasing the acquired buffer area, and when acquiring the buffer area, an acquisition serial number is added to the header part of the buffer area. It comprises an acquisition sequence number writing unit 3 for writing in the acquisition sequence and a release sequence number writing unit 4 for writing the release sequence number in the header part of the buffer region in the release sequence when releasing the buffer region.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a plurality of processing units (CP
U), which is used in a computer system or the like that requires buffer control and manages a data storage state in a buffer area on a memory.

[0002]

2. Description of the Related Art In recent years, with the increase of processing fields and enhancement of functions in computer systems, internal control methods have become complicated. For example, a computer system having a plurality of processing units (CPUs) and requiring buffer control includes a buffer control device having a function of acquiring a buffer area on a memory and a function of releasing the acquired buffer area,
This buffer control device manages the data storage state in the buffer area.

As the internal control method becomes complicated, it is necessary to consider the investigation method when a trouble occurs. Currently, as the investigation method when trouble occurs,
There are one that analyzes the cause of trouble based on the data trace results that have been sequentially collected by a dump, and one that analyzes the cause of trouble based on the header and data that remain in the buffer area.

[0004]

However, in the former investigation method described above, there are cases where a program for performing such an analysis cannot be introduced due to the limitation of the memory capacity. Also, the latter investigation method has a problem that the accurate result of buffer area acquisition and release cannot be known during buffer analysis, so the investigation result lacks credibility and quick trouble response is not possible. .

The present invention was devised in view of such a problem, and when a trouble occurs, it is possible to accurately know the acquisition order and the release order of the buffer areas, thereby enabling quick trouble response. An object is to provide a buffer control device.

[0006]

FIG. 1 is a block diagram of the principle of the present invention. In FIG. 1, 1 is a memory having a buffer area, 2 is a buffer control device of the present invention, and this buffer control device 2 is The memory 1 has a function of acquiring a buffer area for storing data and a function of releasing the acquired buffer area, and manages the data storage state in this buffer area.

In the buffer control device 2, the acquisition sequence number writing unit 3 that writes the acquisition sequence numbers in the header portion of the buffer region when acquiring the buffer region, and the buffer region when releasing the buffer region. The release serial number writing unit 4 for writing the release serial numbers in the release order is provided in the header part of (1). In addition, the buffer control device 2 releases the plurality of buffer areas at the same time, and an acquisition group number writing unit that writes a common acquisition group number in the header portion of the plurality of buffer areas when acquiring the plurality of buffer areas at the same time. When this is done, a release group number writing unit for writing a common release group number in the header portion of the plurality of buffer areas may be provided (claim 2).

Furthermore, the buffer control device 2 may include an acquisition sequence number counter for generating an acquisition sequence number and a release sequence number counter for generating a release sequence number (claim 3), and an acquisition group number. May be provided with an acquisition group number counter for generating a release group number and a release group number counter for generating a release group number (claim 4).

[0009]

In the buffer control device of the present invention described above with reference to FIG. 1, when the buffer area is acquired, the acquisition serial number writing unit 3 writes the acquisition serial numbers in the header portion of the buffer area in the order of acquisition, while the buffer area is acquired. When releasing, the release serial number writing unit 4 writes the release serial numbers in the header portion of the buffer area in the release order.

At this time, the acquisition serial number and the release serial number are generated by the acquisition serial number counter and the release serial number counter.
Therefore, when a trouble occurs, the order of acquiring the buffer area and the order of releasing the buffer area can be accurately known by referring to the header of the buffer area on the memory, based on the acquisition serial number and the release serial number. It is possible (claims 1 and 3).

Further, when a plurality of buffer areas are acquired at the same time, the acquisition group number writing section writes a common acquisition group number in the header part of the plurality of buffer areas, while simultaneously releasing a plurality of buffer areas. At this time, the release group number writing unit writes a common release group number in the header portions of the plurality of buffer areas.

At this time, the acquisition group number and the release group number are generated by the acquisition group number counter and the release group number counter. Therefore, when a trouble occurs, the relevance of the buffer areas acquired and released by one request can be accurately known based on the acquisition group number and the release group number (claims 2 and 4).

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram showing a buffer control device as one embodiment of the present invention. In FIG. 2, 10 is a plurality of (three in the figure) processing units (CPUs), and 11 is data for each processing unit 10. An input control unit 12 controls input such as input and command input, and an output control unit 12 controls output of processing results from each processing unit 10.

Further, 13 is a shared memory having a common buffer area 14 in addition to various data and programs required by each processing unit 10, 15 is a buffer control unit, and this buffer control unit 15 stores data in the memory 13. It has a function of acquiring the buffer area 14 for the operation and a function of releasing the acquired buffer area, and manages the data storage state in the buffer area 14.

In the common buffer area 14, FIG.
As shown in FIG. 5, a plurality of (five in the figure) buffer areas (data blocks) 14-1 to 14-5 are provided, and free buffer queues are formed by linking the released areas. This empty buffer queue is managed by a leading pointer (address of leading empty buffer area) and a final pointer (address of final empty buffer area). In addition, each buffer area (data block)
As shown in FIG. 3, each of 14-1 to 14-5 is composed of a header part and a data part. In the header part, in addition to a pointer to the next buffer, an acquisition serial number and an acquisition group number ( No.), release serial number, release group number (No.)
It has a memo area for writing.

The buffer control unit 15 of this embodiment includes an acquisition serial number writing unit 16 and an acquisition group number writing unit 1.
7, release serial number writing unit 18, release group number writing unit 19
Also, a buffer control table 20 is provided.
Here, the acquisition serial number writing unit 16 writes the acquisition serial numbers in the header portion (acquisition serial number memo area) of the buffer area 14 when acquiring the buffer area 14, in the order of acquisition. 17 refers to a plurality of buffer areas 1 when acquiring a plurality of buffer areas 14 at the same time.
The common acquisition group number is written in the acquisition group number memo area of the header portion of No. 4.

When releasing the acquired buffer area 14, the release sequence number writing section 18 writes the release sequence numbers in the release sequence number memo area of the header part of the buffer area 14 in the release order, and the release group number. The writing unit 19 writes a common release group number in the release group number memo area of the header portion of the plurality of buffer areas 14 when releasing the plurality of buffer areas 14 at the same time.

The buffer control table 20 stores various data used by the buffer control routine during its control operation. In the present embodiment, the acquisition sequence number, the acquisition group number, the release sequence number and the release group number described above are stored. For generation, as shown in FIG. 4, it has areas of an acquisition serial number counter, an acquisition group number counter, a release serial number counter, and a release group number counter, and the values of these counter areas are changed every time acquisition / release processing is performed. It is configured to count up. Note that "0" is set as the initial value of these counters.

Next, the operation of this embodiment constructed as described above will be described with reference to FIGS. First, according to the flowchart (steps S1 to S23) shown in FIG.
A control processing procedure by the buffer control unit 15 at the time of buffer acquisition / release processing will be described. When the buffer management routine shown in FIG. 6 is used, the identification and number of buffer acquisition / release are designated.

When the buffer management routine is activated, it is first determined which of buffer acquisition / buffer release is requested (step S1). When the buffer acquisition is requested, the buffer acquisition processing is performed on the common buffer area 14 of the shared memory 13 (step S2), and then the acquisition serial number obtained from the acquisition serial number counter area of the buffer control table 20 is acquired. , Is stored in the acquired serial number memo area in the header of the acquired buffer area 14 (step S3).

Then, the value of the acquisition serial number counter area of the buffer control table 20 is incremented by 1 (step S4), and it is determined whether or not the value of the new acquisition serial number counter area exceeds a preset maximum value (step S4). Step S
5). If the maximum value is not exceeded, the process proceeds to step S7 described later, while if the maximum value is exceeded, the value of the acquisition serial number counter area of the buffer control table 20 is set to 0 (step S6), and then step S7 described later. Move to.

In step S7, the acquisition group number obtained from the acquisition group number counter area of the buffer control table 20 is stored in the acquisition group number memo area in the header of the acquired buffer area 14. Thereafter, 1 is subtracted from the buffer acquisition number designated at the time of starting the routine (step S8), and it is determined whether or not the subtraction result is 0 or less (step S9).

In the above-mentioned steps S2 to S8, the subtraction result in step S8 is 0 in step S9.
It is repeated until it is determined that (below). As a result, when a plurality of buffer areas are acquired at one time, the acquisition sequence number can be updated and added one by one while giving a common acquisition group number to the group.

When the acquisition sequence number and the acquisition group number are given to all the buffer areas acquired at the same time (YES in step S9), the value of the acquisition group number counter area of the buffer control table 20 is incremented by 1. It counts up (step S10), and it is determined whether or not the value of the new acquisition group number counter area exceeds a preset maximum value (step S11). If it does not exceed the maximum value, the processing is terminated as it is, while if it exceeds the maximum value, the value of the acquisition group number counter area of the buffer control table 20 is set to 0 (step S12), and then the processing is terminated.

On the other hand, if it is determined in step S1 that the buffer release is requested, the buffer release process is performed on the common buffer area 14 of the shared memory 13 (step S13), and then the buffer control table 20.
The release serial number obtained from the release serial number counter area is stored in the release serial number memo area in the header of the released buffer area 14 (step S14).

Then, the value of the release serial number counter area of the buffer control table 20 is incremented by 1 (step S15), and it is determined whether or not the value of the new release serial number counter area exceeds the preset maximum value (step S15). Step S16). If it does not exceed the maximum value, step S described later.
On the other hand, if the maximum value is exceeded, the value of the release serial number counter area of the buffer control table 20 is set to 0 (step S17), and then the process proceeds to step S18 described later.

In step S18, the release group number obtained from the release group number counter area of the buffer control table 20 is stored in the release group number memo area in the header of the released buffer area 14. After this,
1 is subtracted from the buffer release number designated at the time of starting the routine (step S19), and it is determined whether the subtraction result is 0 or less (step S20).

The above steps S13 to S19 are repeated until it is determined in step S20 that the result of the subtraction in step S19 is 0 (or less). Thus, when a plurality of buffer areas are released at one time, the release sequence number can be updated and given one by one while giving a common release group number to the group.

When a release serial number and a release group number are given to all the buffer areas released at the same time (YES in step S20), the value of the release group number counter area of the buffer control table 20 is set to 1
Only the count is incremented (step S21), and it is determined whether the value of the new release group number counter area exceeds a preset maximum value (step S22). If it does not exceed the maximum value, the processing is terminated as it is, while if it exceeds the maximum value, the value of the release group number counter area of the buffer control table 20 is set to 0 (step S23), and then the processing is terminated.

Next, referring to FIGS. 7 to 10, an example of writing concrete acquisition serial numbers and acquisition group numbers to the buffer areas 14-1 to 14-5 will be described.
4, an example of writing a specific release serial number and release group number to the buffer areas 14-1 to 14-5 will be described. Note that specific values of the acquisition serial number counter, the acquisition group number counter, the release serial number counter, and the release group number counter in the buffer management table 20 are also illustrated. Also, in the figure, the group number is "GpN
In addition, ".?" in the memo area for acquisition serial number, acquisition group number, release serial number, and release group number of each buffer area 14-1 to 14-5 in the figure. Indicates that some serial number and number have been previously written and the value is undefined.In the present embodiment, the serial number and number are overwritten and written on the undefined value, and The actual numbers are shown for the serial numbers and numbers related to the examples.

First, as shown in FIG. 7, it is assumed that all five buffer areas 14-1 to 14-5 are linked in the released state as empty buffer queues. At this time,
The value of the acquisition serial number counter / acquisition group number counter is
The initial value is set to "00". When only one buffer area is acquired in the state shown in FIG. 7, as shown in FIG. 8 (b), both of the acquired serial number / acquisition group number memo areas of the acquired buffer area 14-1 are " 0
0 "and" 00 "are written. Further, as shown in FIG. 8A, four buffers 14-2 to 14-5 are linked as an empty buffer queue, and the acquisition serial number counter /
The values of the acquired group number counters are all set to "01".

In the state shown in FIG. 7, the buffer area is set to 2 at a time.
9B, “00” and “00” are written in both the acquisition serial number / acquisition group number memo area of the first acquired buffer area 14-1 as shown in FIG. 9B. In the memo area for the acquired serial number / acquired group number of the second buffer area 14-2, "0" is set.
1 "and" 00 "are written. Further, as shown in FIG. 9A, three buffers 14-3 to 14-5 are linked as an empty buffer queue, and the value of the acquisition sequence number counter is" 02 ". In addition, the value of the acquired group number counter is "0.
It is set to 1 ".

When only one more buffer area is acquired in the state shown in FIGS. 9A and 9B, the third acquired buffer area 14-3 is acquired as shown in FIG. 10B. In the memo area for serial number / acquired group number, "0"
2 "and" 01 "are written. Also, as shown in FIG. 10A, two buffers 14-4 and 14-5 are linked as an empty buffer queue, and the value of the acquisition sequence number counter is" 03 ". Then, the value of the acquisition group number counter is set to "02".

Then, as shown in FIG. 11, from the state in which only one buffer area 14-1 is released and the other four buffer areas 14-2 to 14-5 are acquired,
The case of releasing each buffer area will be described. At this time, the values of the release serial number counter / release group number counter are set to the initial value "00". In the state shown in FIG. 11, the buffer area 14-2 shown in FIG.
When only one is released, as shown in FIG.
The released buffer area 14-2 is linked to the free buffer queue, and "00" and "00" are written in the release serial number / release group number memo area of the buffer area 14-2. At this time, the values of the release serial number counter / release group number counter are both set to "01".

In the state shown in FIG. 11, when the two buffer areas 14-2 and 14-3 shown in FIG. 13A are released at once, as shown in FIG. 13B, the two released buffer areas 14-2 and 14-3 are released. The buffer areas 14-2 and 14-3 are linked to the free buffer queue, and "00" and "00" are written in the release serial number / release group number memo area of the first buffer area 14-2. "01" and "00" are written in the release serial number / release group number memo area of the second buffer area 14-3, respectively. At this time, the value of the release serial number counter is set to "02" and the value of the release group number counter is set to "01".

When only one buffer area 14-4 shown in FIG. 14 (a) is released in the state shown in FIGS. 13 (a) and 13 (b), it is released as shown in FIG. 14 (b). The buffer area 14-4 is also linked to the free buffer queue, and “02” and “0” are respectively stored in the release serial number / release group number memo area of the buffer area 14-4.
1 ”is written. At this time, the value of the release serial number counter is“ 03 ”and the value of the release group number counter is“ 0 ”.
Set to 2 ".

As described above, in the embodiment of the present invention, the group number for recognizing the serial number at the time of buffer acquisition / release and the acquisition / release of plural buffer areas at once in the header of the buffer area 14. There is an area to write down and
Using this area, prepare a routine (see Fig. 6) to manage the serial number and group number when acquiring the buffer, and the serial number and group number when releasing the buffer. We have adopted the method of requesting to.

As a result, when trouble occurs, the order in which the buffers are acquired, the order in which the buffers are released, and one request are acquired.
You can know exactly the relationship of the released buffer.
That is, it becomes clear how many buffers were used and in what order. Therefore, since it is extremely effective as a material for trouble investigation and the buffers used in the correct order can be analyzed, the transmission / reception data between the processes can be investigated, so that quick trouble response can be realized.

In the above-described embodiment, the case where the buffer area 14 is composed of five areas has been described, but the present invention is not limited to this.

[0040]

As described above in detail, according to the buffer control apparatus of the present invention, when a trouble occurs, the header area of the buffer area on the memory is referred to to determine the order in which the buffer areas are acquired and the buffer areas. Since the release order can be accurately known based on the acquisition serial number and the release serial number, the buffers used in the correct order can be analyzed, and the data sent and received between each process can be investigated. Therefore, there is an effect that can be dealt with promptly (claims 1 and 3).

In addition, based on the acquisition group number and the release group number in the header section, it is acquired by one request,
The relation of the released buffer area can be known accurately, and it becomes clear how many buffer areas were actually used and in what order when trouble occurred. It is possible to investigate various transmission / reception data, and it is possible to respond more reliably and promptly to troubles (claims 2 and 4).

[Brief description of drawings]

FIG. 1 is a principle block diagram of the present invention.

FIG. 2 is a block diagram showing a buffer control device as an embodiment of the present invention.

FIG. 3 is a diagram showing a format of a buffer area of the present embodiment.

FIG. 4 is a diagram showing a buffer control table of the present embodiment.

FIG. 5 is a block diagram showing a configuration of a common buffer area (link state of an empty buffer queue) according to the present embodiment.

FIG. 6 is a flowchart for explaining the operation of this embodiment.

FIG. 7 is a diagram for explaining an example of buffer area acquisition in this embodiment.

8A and 8B are views for explaining an example of buffer area acquisition in the present embodiment.

9A and 9B are diagrams for explaining an example of buffer area acquisition in this embodiment.

10A and 10B are diagrams for explaining an example of buffer area acquisition in this embodiment.

FIG. 11 is a diagram for explaining an example of releasing a buffer area in the present embodiment.

12A and 12B are diagrams for explaining an example of releasing a buffer area in the present embodiment.

13A and 13B are diagrams for explaining an example of releasing a buffer area in this embodiment.

14A and 14B are diagrams for explaining an example of releasing a buffer area in this embodiment.

[Explanation of symbols]

 1 Memory 2 Buffer Control Device 3 Acquisition Serial Number Writing Unit 4 Release Serial Number Writing Unit 10 Processing Unit (CPU) 11 Input Control Unit 12 Output Control Unit 13 Shared Memory 14 Common Buffer Area 14-1 to 14-5 Buffer Area 15 Buffer Control unit 16 Acquisition serial number writing unit 17 Acquisition group number writing unit 18 Release serial number writing unit 19 Release group number writing unit 20 Buffer control table

Claims (4)

[Claims] 1. A buffer control device having a function of acquiring a buffer area for storing data on a memory and a function of releasing the acquired buffer area, and managing a data storage state in the buffer area. , When acquiring the buffer area, the acquisition serial number is written in the header section of the buffer area in the order of acquisition. When acquiring the buffer area, the release serial number is written in the header section of the buffer area in the order of release. A buffer control device comprising a release serial number writing unit. 2. When acquiring a plurality of buffer areas at the same time, an acquisition group number writing section for writing a common acquisition group number in a header part of the plurality of buffer areas, and for releasing a plurality of buffer areas at the same time. The buffer control device according to claim 1, further comprising: a release group number writing unit that writes a common release group number in a header portion of the plurality of buffer areas. 3. The buffer control device according to claim 1, further comprising an acquisition sequence number counter for generating the acquisition sequence number and a release sequence number counter for generating the release sequence number. 4. The acquisition group number counter for generating the acquisition group number and the release group number counter for generating the release group number are provided. Buffer controller.