JPH08107523A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE: To provide a solid-state image pickup device, with which the aperture of a picture element can be secured higher than the conventional device, concerning the solid-state image pickup device equipped with an IL-CCD type photodetector. CONSTITUTION: Between adjacent odd-number picture element train 13 and even-number picture element train 14 of a photodetector 1, one line of VCCD 3 is provided while commonly connecting the picture elements in both the trains and transfer gate control circuits 15 and 16 are separately provided to electrically connect the respective odd- number picture element trains 13 and even-number picture element trains 14 with the VCCD 3. Further, this device is equipped with a picture element selector 19 for selecting any picture element while receiving control signals 17 and 18 inputted to the control circuits 15 and 16 and a frame memory 20 for storing and outputting an inputted digital image signal under the control of the picture element selector 19. Thus, since the respective oddnumber picture element trains 13 and even-number picture element trains 14 use the VCCD 3 provided between them alternately for each field period, the ratio of the VCCD 3 to be occupied per picture element is reduced, device sensitivity is improved by improving the aperture and further, the S/N is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device using an interline charge coupled device as a photodetector.

[0002]

2. Description of the Related Art An infrared imaging device will be described as a conventional example of a solid-state imaging device. FIG. 8 is a block diagram showing an example of a conventional infrared imaging device, where 1 is a photodetector and 2
Is a vertical pixel column, 3 is a vertical charge-coupled device (Vertica).
l Charge Coupled Device (hereinafter referred to as VCCD), 4 is a transfer gate control circuit for electrically connecting the pixel column 2 and VCCD 3, and 5 is a transfer gate control signal (φ) input to the transfer gate control circuit 4.
T) and 6 are horizontal charge-coupled devices (Horizontal)
Charge Coupled Device, H
CCD, 7 is a floating diffusion amplifier (hereinafter referred to as FDA), 8 is a preamplifier,
Reference numeral 9 is an A / D converter, 10 is an image correction processing unit, 11 is a video D / A converter, and 12 is a display monitor.

Next, an example of the operation of the conventional infrared image pickup device will be described with reference to FIG. First, in the photodetector 1, the incident infrared rays are photoelectrically converted by the photoelectric converters of each pixel column 2 and accumulated for a certain period of time. After that, the transfer gate control circuit 4 operates by the transfer gate control signal 5, and the signal charges accumulated in each pixel column 2 are transferred to the VCCD 3 all at once. After that, the signal charges transferred by the operations of the VCCD 3 and the HCCD 6 are output as a voltage by the operation of the FDA 7, amplified by the preamplifier 8, and then converted into a digital image signal by the A / D converter 9. Further, after undergoing various image correction processes in the correction processing unit 10,
It is displayed on the monitor 12 through the video D / A converter 11.

[0004]

The conventional infrared image pickup device is constructed as described above, but since one column of VCCDs 3 is required for each vertical pixel column 2, V CCDs are formed in each pixel.
The structure includes the CCD 3. Since the VCCD 3 is a region (insensitive region) where photoelectric conversion is not performed, if this region is large, the ratio of the photoelectric conversion portion in one pixel area (aperture ratio).
However, there is a problem in that the sensitivity of the image pickup device is reduced.

Further, the HCCD 6 has one for each pixel column 2.
Since it is configured to perform the processing for the steps,
And the number of stages of the HCCD 6 are equal. Here, considering compatibility with external equipment, the signal readout method is NTSC.
(National Television System
em Commitee) and HDTV (HighDe)
It is appropriate to comply with the standards such as the definition television (Finish Television), and the frame rate at this time is 3
It becomes 0 Hz. Therefore, in order to increase the number of pixel rows 2, H
It is necessary to speed up the CCD transfer clock (hereinafter referred to as CLK) frequency, but high-speed read CLK
Then, the transfer efficiency of the HCCD is reduced, which leads to deterioration of the image resolution. That is, the increase in the number of pixels of the light detection element 1 is
There is a problem in that the transfer efficiency of D limits the operation.

Further, there is an electronic shutter system as a means for suppressing the generation of signal charge more than necessary in the conventional infrared image pickup device, but in this case, a charge discharging drain section must be provided in each pixel. However, for the same reason as described above, there is a problem that the aperture ratio of one pixel is reduced and the device sensitivity is reduced.

Further, there is a skimming method as a means for suppressing unnecessary signal charge transfer in the conventional infrared image pickup device. In this case, however, a skimming gate in the pixel must be provided and the There are problems such as complication and a decrease in device sensitivity due to a decrease in aperture ratio.

The present invention has been made to solve the above problems, and is an interline charge coupled device (Interline Charge Coupled).
Device, hereinafter referred to as an IL-CCD), but the aperture ratio of the pixel can be made higher than before, and HCCD transfer C accompanying the increase in the number of pixels of the photodetector
It is possible to suppress the increase in the speed of LK, suppress the decrease in the pixel aperture ratio due to the adoption of the electronic shutter system, and further enable the skimming operation without providing the gate for skimming in the pixel. An object of the present invention is to provide a solid-state imaging device.

[0009]

A solid-state image pickup device according to the present invention is provided with one row of VCCDs in which pixels of both rows are commonly connected between adjacent odd-numbered pixel rows and even-numbered pixel rows of a photodetector. A pixel selector that separates transfer gate control circuits for electrically connecting the odd-numbered pixel columns and the even-numbered pixel columns to the VCCD, and further receives a transfer gate control signal input to the control circuit to perform pixel selection, And a frame memory for storing and outputting a digital image signal input under the control of the pixel selector.

Further, the solid-state image pickup device according to the present invention is provided with an HCCD for commonly processing a pair of adjacent odd-numbered pixel rows and corner-number pixel rows of the photodetector.

Further, in the solid-state image pickup device according to the present invention, between the even-numbered pixel columns and the odd-numbered pixel columns adjacent to each other of the photodetecting element, one column of the charge discharging drain portion to which the pixels of both columns are connected in common is provided, and The discharge gate control circuit for electrically connecting the odd-numbered pixel column and each even-numbered pixel column to the drain portion is separately provided.

Further, in the solid-state image pickup device according to the present invention, the CLK voltage level applied to each transfer gate for electrically connecting each odd pixel column and each even pixel column of the photodetector to the VCCD is arbitrarily set. A transfer gate level setting unit is provided for this purpose.

Further, the solid-state image pickup device according to the present invention is provided with a signal level judgment unit for receiving an input digital image signal and giving a predetermined output to the transfer gate level setting unit according to the signal level thereof. .

[0014]

According to the present invention, either the odd pixel column or the even pixel column is operated by the operation of the transfer gate control signal input to the transfer gate control circuit provided independently for each odd pixel column and even pixel column. Is selected to set the signal charge to VCC
Transfer to D. The A / D image signal is stored in the frame memory under the control of the pixel selector, and is also output from the frame memory under the control of the pixel selector.

Further, the signal charge sent from the VCCD is sent to the FDA by the operation of the HCCD having a transfer stage number which is half of the total number of pixel columns of the photodetector.

In each of the odd-numbered pixel column and the even-numbered pixel column, the charge discharging drain section provided in common discharges the generated charge for a predetermined time by the operation of the discharge gate control circuit, and then the drain section is operated by the control circuit. The connection with is turned off and the generated charge is accumulated.

Further, the transfer gate level setting section concerning the transfer gate control signal arbitrarily sets the CLK level of the transfer gate control signal, changes the potential level when the transfer gate is opened, and transfers the signal charge in the pixel. Control the amount of.

Further, the signal level judging section receives the output signal level from each pixel and gives a predetermined output to the transfer gate level setting section according to the output signal level.

[0019]

【Example】

Example 1. FIG. 1 is a block diagram of an infrared imaging device showing an embodiment of the present invention, in which 13 is an odd pixel column, 14 is an even pixel column, and 15 is an odd pixel column 13 and an odd number for electrically connecting the VCCD 3 Pixel column transfer gate control circuit, 16 is an even pixel column transfer gate control circuit for electrically connecting the even pixel column 14 and the VCCD 3, and 17 is an odd pixel column input to the odd pixel column transfer gate control circuit 15. Transfer gate control signal (φTA), 18 is an even pixel column transfer gate control signal (φTB) input to the even pixel column transfer gate control circuit 16, 19 is a pixel selector, 2
0 is a frame memory.

Next, the operation of the infrared image pickup device in the first embodiment will be described with reference to FIG. For example, when the frame rate of the infrared imaging device in the first embodiment is 30 Hz, 1/60 seconds at the beginning of one frame is an odd pixel column field and the remaining 1/60 seconds is an even pixel column field. Within the time of the field for odd pixel columns, the transfer gate control circuit 15 for odd pixel columns operates by the transfer gate control signal 17 for odd pixel columns, and the signal charges accumulated in the odd pixel columns 13 are transferred to the VCCD 3 all at once. To be done. After that, the signal charges transferred by the operations of the VCCD 3 and the HCCD 6 are output as a voltage by the operation of the FDA 7, amplified by the preamplifier 8, and then converted into a digital image signal by the A / D converter 9. Further, the pixel selector 19 which receives the transfer gate control signal 17 for odd pixel columns
Thus, the A / D-converted digital image signal is sequentially stored in the address corresponding to the odd pixel column of the frame memory 20. If the processing up to this point is performed during the odd pixel column field period, then the even pixel column field period starts, and the even pixel column transfer gate control signal 18 causes the even pixel column transfer gate control circuit 16 to operate and The signal charges accumulated in the column 14 are simultaneously transferred to the VCCD 3. After that, the signal charges transferred by the operations of the VCCD 3 and the HCCD 6 are output as a voltage by the operation of the FDA 7, amplified by the preamplifier 8, and then converted into a digital image signal by the A / D converter 9. Further, the digital image signal A / D converted by the pixel selector 19 which has received the transfer gate control signal 18 for even pixel columns is
The data are sequentially stored in the addresses corresponding to the even pixel columns of the frame memory 20. When the image signal for one frame is stored in the frame memory 20 in this way, the image signal is output from the frame memory 20 according to the display standard of the monitor 12 by the operation of the pixel selector 19, and the correction processing unit 10 performs various image corrections. After receiving the processing, it is displayed on the monitor 12 through the video D / A 11.

As described above, in the first embodiment, one column of VCC
Since D3 is shared by the odd-numbered pixel column 13 and the even-numbered pixel column 14, the proportion of the VCCD3 in the area of one pixel is small. This is shown in FIG. In FIG. 2, 21
Is a photoelectric conversion area in one pixel, and 22 is an area of the VCCD 3. Although (a) shows the pixel structure of the first embodiment and (b) shows the conventional pixel structure, it is clear that the first embodiment is superior in aperture ratio to the conventional example.

Further, in FIG. 1, the HCCD 6 is configured to commonly process a set of adjacent odd pixel rows 13 and even pixel rows 14. Therefore, the number of stages of the HCCD 6 is half the total number of pixel rows of the photodetector 1, and the CLK frequency can be reduced to half the transfer CLK of the conventional photodetector 1.

Embodiment 2 FIG. On the other hand, when an electronic shutter or skimming operation is performed in the infrared imaging device according to the present invention, a charge discharging drain portion is provided between adjacent even pixel rows 14 and odd pixel rows 13 where the VCCD 3 is not provided. It is possible to operate. FIG. 3 is a block diagram of the infrared imaging device at this time, in which 23 is an odd pixel discharge gate control circuit, 24 is an even pixel discharge gate control circuit, and 25 is an odd pixel discharge gate control signal (φD).
A) and 26 are discharge gate control signals (φD for even pixels)
B) and 27 are charge discharging drain parts, and 28 is a transfer gate level setting part. Further, FIG. 4 is a potential diagram per pixel showing an electronic shutter operation. Further, FIG. 5 is a potential diagram per pixel showing a skimming operation.

Next, the electronic shutter operation of the infrared imaging device in the second embodiment will be described with reference to FIGS. 3 and 4. For example, when the pixel in FIG. 4 is of the odd pixel column 13, the odd pixel discharge gate control circuit 23 is initially operated by the odd pixel discharge gate control signal 25 during the field period for the even pixel column, so that the odd pixel All the charges accumulated in the pixel column 13 are discharged to the discharging drain section 27 (FIG. 4-a). After a certain period of time, the odd pixel discharge gate control signal 23 causes the odd pixel discharge gate control circuit 25 to operate, and the odd pixel column 13 starts to accumulate charges (FIG. 4-b). Then, when the even pixel column field period ends and the odd pixel column field period starts, the odd pixel column transfer gate control signal 17 causes the odd pixel column transfer gate control circuit 15 to operate, and the odd pixel column 1
The signal charges accumulated in 3 are simultaneously transferred to the VCCD 3 (FIG. 4-c). After the transfer is completed, the discharge gate control signal 23 for odd pixels is operated by the discharge gate control signal 25 for odd pixels, and all the charges accumulated in the odd pixel columns 13 are discharged to the drain portion 27 for discharging (FIG. 4-). d).
This state continues until the next even pixel column field period. Therefore, the time for the signal charges to be accumulated in the odd-numbered pixel column 13 is the time from the closing of the discharge gate to the opening of the transfer gate, which means that the electronic shutter operation has been performed.
Note that the same operation as described above is performed for the even-numbered pixel column 14 while maintaining a time delay of 1/60 seconds with respect to the odd-numbered pixel column 13.

As described above, in the second embodiment, the drain portions 27 for discharging electric charges in one column are arranged in the even pixel column 14 and the odd pixel column 1.
Since the three sets are shared, the ratio of the charge discharging drain portion 27 in one pixel area can be reduced. Therefore, the electronic shutter operation can be added without reducing the aperture ratio, as compared with the conventional structure in which each pixel column is provided with the drain portion for discharge.

Next, the skimming operation of the infrared imaging device in the second embodiment will be described with reference to FIGS. 3 and 5.
In the transfer gate level setting unit 28, the level of the gate voltage applied to the transfer gate is changed from 0 level to 0
It can be set arbitrarily within a range up to the voltage to be applied.
When the set gate voltage is applied to the transfer gate, the transfer gate potential changes according to the gate voltage, and as a result, VC with a certain amount of accumulated charge remaining.
The charge is transferred to CD3 (FIGS. 5A and 5B). After the transfer is completed, the discharge gate control signal 25 or 26 causes the discharge gate control circuit 23 or 24 to operate to discharge the residual charge in the storage portion (FIG. 5-c), and then return to the normal storage operation (FIG. 5-). d). By using the transfer gate as a skimming gate in this manner, a skimming operation that does not require a dedicated skimming gate as in the conventional case can be performed.

Embodiment 3 FIG. Furthermore, by controlling the voltage applied to the transfer gate by the signal level determination unit,
It is possible to automatically set an appropriate skimming level. FIG. 6 shows an example of the infrared image pickup device at this time, and 29 indicates a signal level determination unit. Further, FIG. 7 is a block diagram of the transfer gate level setting unit 28 and the signal level judging unit, in which 30 is an adding circuit, 31 is a dividing circuit, and 3 is a dividing circuit.
Reference numeral 2 is a VCCD saturation level stored in the memory in advance, 33 is an optimum difference level stored in the memory in advance, and 34 is a voltage setting unit.

Next, the skimming operation of the infrared imaging device in the third embodiment will be described with reference to FIGS. 6 and 7. A
The image signal digitized by the / D converter 9 is input to the signal level determination unit 29. Signal level determination unit 29
Then, the input image signal for one screen is taken in, and the signal level is sequentially added by the addition circuit 30 for N pixels. Here, N is the number of pixels in one screen. Then, in the division circuit 31,
The average value per pixel is calculated and subtracted from the VCCD saturation level 32. Here, the VCCD saturation level is an output signal level corresponding to the maximum charge amount that can be transferred by the VCCD, and is stored in advance in the memory. Then, the difference signal is output to the transfer gate level setting unit 28. The transfer gate level setting unit 28 subtracts the optimum difference level 33 from the input difference signal. Here, the optimum difference level is a level at which the difference between the VCCD saturation level and the transfer signal level after skimming becomes optimum on the image, and is stored in advance in the memory. The signal after the subtraction is input to the voltage setting unit 34 next. Here, the voltage level to the transfer gate is set so that the input signal level becomes zero. By repeating this process several times, the signal input to the voltage setting unit 34 is suppressed to zero by the feedback process, and a constant voltage can be applied to the transfer gate. Therefore, the optimum skimming level can be automatically set by performing the series of processes.

Although the infrared image pickup device is used in the above embodiment, a similar effect can be obtained by a visible image pickup device.

[0030]

As described above, according to the present invention, one row of VCCDs in which the pixels of both rows are commonly connected is provided between the adjacent odd-numbered pixel rows and even-numbered pixel rows of the photodetector. The proportion of VCCD in the pixel area is reduced, which leads to improvement in device sensitivity and eventually S / N ratio.

Further, since the HCCD that commonly processes a pair of adjacent odd-numbered pixel rows and even-numbered pixel rows of the photodetector is provided, the number of horizontal transfer stages can be reduced to half of the total number of pixel rows, and the number of pixels is increased. Suppressing the increase in the speed of the HCCD transfer CLK associated with the above leads to an improvement in the transfer efficiency and an improvement in the image resolution.

Further, since the drain portion for discharging electric charges is provided between the adjacent even and odd pixel columns of the photodetector, the columns of the pixels are commonly connected to each other, so that the drain portion occupies one pixel area. Ratio becomes smaller, and the electronic shutter operation can be added without sacrificing the device sensitivity.

Further, since the transfer gate level setting section capable of arbitrarily setting the voltage applied to the transfer gate of the photodetector is provided, the transfer gate can be diverted to the skimming gate, and a complicated circuit in the pixel can be used. The skimming operation can be performed without requiring.

Further, since a signal level judging section for receiving an input digital image signal and giving a predetermined output to the transfer gate level setting section according to the signal level is provided, an appropriate skimming level can be automatically set. It becomes possible to do.

[Brief description of drawings]

FIG. 1 is a block diagram of an infrared imaging device showing a first embodiment of the present invention.

FIG. 2 is a diagram comparing an example of a pixel structure of an infrared imaging device according to a first embodiment of the present invention with an example of a pixel structure of a conventional infrared imaging device.

FIG. 3 is a block diagram of an infrared imaging device showing a second embodiment of the present invention.

FIG. 4 is a potential diagram per pixel showing an electronic shutter operation of the infrared imaging device showing the second embodiment of the present invention.

FIG. 5 is a potential diagram per pixel showing a skimming operation of the infrared imaging device according to the second embodiment of the present invention.

FIG. 6 is a block diagram of an infrared imaging device showing a third embodiment of the present invention.

FIG. 7 is a block diagram of a transfer gate level setting unit and a signal level determination unit of an infrared imaging device showing Embodiment 3 of the present invention.

FIG. 8 is a block diagram showing an example of a conventional infrared imaging device.

[Explanation of symbols]

1 Photodetector, 2 Vertical Pixel Row, 3 Vertical CC
D, 4 transfer gate control circuit, 5 transfer gate control signal, 6 horizontal CCD (HCCD), 7 floating diffusion amplifier, 8 preamplifier, 9 A
/ D converter, 10 image correction processing section, 11 video D / A converter, 12 display monitor, 13 odd pixel row, 14 even pixel row, 15 odd pixel row transfer gate control circuit, 16 even pixel row transfer gate control circuit 1
7 transfer gate control signal for odd pixel columns, 18 transfer gate control signal for even pixel columns, 19 pixel selector, 20
Frame memory, photoelectric conversion area in 211 pixels,
22 VCCD area, 23 odd pixel discharge gate control circuit, 24 even pixel discharge gate control circuit, 25 odd pixel discharge gate control signal, 26 even pixel discharge gate control signal, 27 charge discharge drain part, 28 transfer Gate level setting unit, 29 transfer level determining unit, 30 adding circuit, 31 dividing circuit, 32 VCCD saturation level,
33 optimum difference level, 34 voltage setting section.

Claims (5)

[Claims] 1. A solid-state imaging device using an interline charge-coupled device as a photodetecting element, wherein a pixel of both columns is commonly connected between adjacent odd-numbered pixel rows and even-numbered pixel rows of the photodetection elements. A vertical charge coupled device, a transfer gate control circuit in which each odd pixel column and each even pixel column are separately provided to electrically connect to the vertical charge coupled device, and a transfer gate input to the transfer gate control circuit. A solid-state imaging device comprising: a pixel selector that receives a control signal to select a pixel; and a frame memory that stores and outputs a digital image signal input under the control of the pixel selector. 2. The solid-state image pickup device according to claim 1, further comprising a horizontal charge-coupled device for commonly processing a set of adjacent odd-numbered pixel rows and corner-numbered pixel rows of the photodetecting elements. 3. An odd-numbered pixel column and an even-numbered pixel column, each of which is provided with a drain portion for discharging electric charge, in which pixels of both columns are commonly connected between adjacent even-numbered pixel columns and odd-numbered pixel columns of the photodetector. 2. The solid-state imaging device according to claim 1, further comprising a discharge gate control circuit for electrically connecting to the charge discharging drain portion. 4. A transfer gate for arbitrarily setting a clock voltage level applied to each transfer gate for electrically connecting each odd-numbered pixel column and each even-numbered pixel column of the photodetector to the vertical charge-coupled device. The solid-state imaging device according to claim 3, further comprising a level setting unit. 5. A signal level judgment section for receiving an input digital image signal and giving a predetermined output to the transfer gate level setting section in accordance with the signal level thereof. Solid-state imaging device.