JPH0799260A - Circuit device and mounting method thereof - Google Patents

Circuit device and mounting method thereof

Info

Publication number
JPH0799260A
JPH0799260A JP24130393A JP24130393A JPH0799260A JP H0799260 A JPH0799260 A JP H0799260A JP 24130393 A JP24130393 A JP 24130393A JP 24130393 A JP24130393 A JP 24130393A JP H0799260 A JPH0799260 A JP H0799260A
Authority
JP
Japan
Prior art keywords
hybrid integrated
integrated circuit
solder
circuit
solders
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24130393A
Other languages
Japanese (ja)
Inventor
Kunifumi Komiya
邦文 小宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Original Assignee
Toshiba Lighting and Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp filed Critical Toshiba Lighting and Technology Corp
Priority to JP24130393A priority Critical patent/JPH0799260A/en
Publication of JPH0799260A publication Critical patent/JPH0799260A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other

Abstract

PURPOSE:To achieve high density mounting by fixing only the bottom surface of a hybrid integrated circuit on a substrate made of resin with solders, and mounting the leadless surface-mounting type hybrid integrated circuit simply and securely. CONSTITUTION:Each hybrid integrated circuit 15 is mounted on a mother board 12 so that electrodes 17a and 17b of the circuit are mounted on solders 14 of solder lands 13a and 13b. The entire body is made to pass through a reflow furnace. Then, the solders 14 on the solder lands 13a and 13b are heated and fused. After the device goes out of the reflow furnace, the solders 14 are cooled, and the electrodes 17a and 17b of the hybrid integrated circuit 15 are fixed on the solder lands 13a and 13b on the mother board 12. Therefore, only the bottom face of the hybrid integrated circuit 15 are soldered to the mother board 12. Thus, the space around the hybrid integrated circuit 15 becomes wide, and the mounting can be performed at high density. The short circuit of the neighboring solders 14 of the hybrid integrated circuit 15 can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はPCBを初めとする樹脂
製の実装基板上に表面実装部品(SMD)を実装してな
る混成集積回路の底面のみを半田により固着する実装方
法をとる回路装置およびその実装方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit device adopting a mounting method in which only the bottom surface of a hybrid integrated circuit in which a surface mounting component (SMD) is mounted on a mounting substrate made of resin such as PCB is fixed by soldering. And how to implement it.

【0002】[0002]

【従来の技術】従来、この種の回路装置の一例としては
図4の断面図に示すように構成された実装が用いられ
る。
2. Description of the Related Art Conventionally, as an example of a circuit device of this type, a mounting structure as shown in the sectional view of FIG. 4 has been used.

【0003】この回路装置1は例えばガラスエポキシ基
板等の樹脂製基板のマザーボード2の所要の半田ランド
3a,3b上に、複数の混成集積回路4の電極5a,5
bをリフロー半田6により固着しており、各混成集積回
路4はセラミックス製基板上に、リードレス表面実装部
品を実装してなる。
This circuit device 1 has electrodes 5a, 5 of a plurality of hybrid integrated circuits 4 on required solder lands 3a, 3b of a mother board 2 made of a resin substrate such as a glass epoxy substrate.
b is fixed by reflow solder 6, and each hybrid integrated circuit 4 is formed by mounting a leadless surface mount component on a ceramic substrate.

【0004】つまり、マザーボード2の半田ランド3
a,3b上に、半田6のパターンを印刷等により形成
し、さらに、これら半田6のパターン上に、混成集積回
路4の電極5a,5bを載置した状態で、その全体を例
えば図中白矢印で示す方向へ移動させてリフロー炉内に
通して加熱する。
That is, the solder land 3 of the mother board 2
The patterns of the solder 6 are formed on the a and 3b by printing or the like, and the electrodes 5a and 5b of the hybrid integrated circuit 4 are placed on the patterns of the solder 6 and the whole of the pattern, for example, white in the figure. It is moved in the direction shown by the arrow and is passed through a reflow furnace to be heated.

【0005】すると、各半田6が半田ランド3a,3b
上で溶融して混成集積回路4の電極5a,5bに固着す
る。その際に、半田6は混成集積回路4の側面部の電極
5の側面に、図中上方へ立ち上がる末広のフィレット6
aを形成するが、このフィレット6aの有無を目視によ
りチェックすることにより、半田6の固着が良好である
か否か判断することができる。
Then, each solder 6 is connected to the solder lands 3a and 3b.
It is melted above and fixed to the electrodes 5a and 5b of the hybrid integrated circuit 4. At that time, the solder 6 is applied to the side surface of the electrode 5 on the side surface portion of the hybrid integrated circuit 4 so that the fillet 6 of the divergent edge rises upward in the figure.
Although a is formed, the presence or absence of the fillet 6a can be visually checked to determine whether or not the solder 6 is firmly fixed.

【0006】つまり、この半田6のフィレット6aが有
ることを目視により確認したときは、その半田6の固着
が良好であると判断することができ、フィレット6aが
無いことを目視により確認したときには、この半田6の
固着が不良であると判断することができる。
That is, when the presence of the fillet 6a of the solder 6 is visually confirmed, it can be determined that the solder 6 is firmly fixed, and when the absence of the fillet 6a is visually confirmed, It can be determined that the fixation of the solder 6 is defective.

【0007】なお、混成集積回路4としては例えば図
5,図6でそれぞれ示す混成集積回路4a,4b等が種
々あるが、これらの電極5a,5bは混成集積回路4の
セラミックス製等の回路基板7の側面と底面とに連続し
て形成されている。また、図中符号8は樹脂製または金
属製等のキャップである。
As the hybrid integrated circuit 4, there are various hybrid integrated circuits 4a and 4b shown in FIGS. 5 and 6, respectively. These electrodes 5a and 5b are made of a ceramic circuit board of the hybrid integrated circuit 4, for example. 7 is formed continuously on the side surface and the bottom surface. Reference numeral 8 in the figure is a cap made of resin or metal.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、このよ
うな従来の回路装置1では、混成集積回路4の周りに半
田6のフィレット6aを形成するので、その分、混成集
積回路4周りのスペースが必要となり、そのため高密度
実装を阻害し、あるいは混成集積回路4を高密度で実装
した場合には、隣り合うフィレット6a同士が電気的に
ショートし易くなるという課題がある。
However, in such a conventional circuit device 1, since the fillet 6a of the solder 6 is formed around the hybrid integrated circuit 4, a space around the hybrid integrated circuit 4 is required accordingly. Therefore, there is a problem that the high density mounting is hindered or the adjacent fillets 6a are easily electrically short-circuited when the hybrid integrated circuit 4 is mounted at a high density.

【0009】また、例えばマザーボード2がガラエポ等
の樹脂製であるのに対し、混成集積回路4の回路基板7
がセラミックス製であるので、互いに熱膨張率が異なる
ので、リフロー炉により加熱される際には図7に示すよ
うにマザーボード2が図中矢印方向に膨張する一方、回
路基板7が湾曲して変形する。このために、図8に示す
ように、半田6のフィレット6a等に応力が発生してク
ラック9が発生し、半田6の固着力を低下ないし喪失さ
せる場合がある。
Further, while the mother board 2 is made of resin such as glass epoxy, the circuit board 7 of the hybrid integrated circuit 4 is used.
Since they are made of ceramics, they have different coefficients of thermal expansion, so that when heated by a reflow furnace, the mother board 2 expands in the direction of the arrow in the figure as shown in FIG. 7, while the circuit board 7 is bent and deformed. To do. For this reason, as shown in FIG. 8, stress may be generated in the fillet 6a of the solder 6 and the like, and the crack 9 may be generated, which may reduce or lose the fixing force of the solder 6.

【0010】そこで本発明はこのような事情を考慮して
なされたもので、その目的は樹脂製基板上にリードレス
表面実装型の混成集積回路を簡単かつ確実に実装するこ
とができる上に、高密度実装を図ることができるリード
レス表面実装タイプの回路装置およびその実装方法を提
供することにある。
Therefore, the present invention has been made in view of the above circumstances, and an object thereof is to easily and surely mount a leadless surface mount type hybrid integrated circuit on a resin substrate. It is an object of the present invention to provide a leadless surface mounting type circuit device capable of high-density mounting and a mounting method thereof.

【0011】[0011]

【課題を解決するための手段】本発明は前記課題を解決
するために次のように構成される。
The present invention is configured as follows in order to solve the above-mentioned problems.

【0012】本願の請求項1に記載の発明(以下、第1
の発明という)は、樹脂製基板上に、表面実装部品をセ
ラミックス基板上に実装してなるリードレス表面実装型
の混成集積回路を、実装する回路装置において、前記樹
脂製基板上に、前記混成集積回路の底面のみを、半田に
より固着することにより実装したことを特徴とする。
The invention according to claim 1 of the present application (hereinafter, referred to as the first
Of the invention) is a circuit device for mounting a leadless surface mounting type hybrid integrated circuit in which surface mounting components are mounted on a ceramic substrate on a resin substrate. It is characterized in that only the bottom surface of the integrated circuit is mounted by fixing with solder.

【0013】また、本願の請求項2に記載の発明(以
下、第2の発明という)は、混成集積回路がセラミック
ス製銅厚膜印刷基板であることを特徴とする。
The invention according to claim 2 of the present application (hereinafter referred to as the second invention) is characterized in that the hybrid integrated circuit is a copper thick film printed board made of ceramics.

【0014】さらに、本願の請求項3に記載の発明(以
下、第3の発明という)は、樹脂製基板の半田ランド
と、この半田ランドに半田される混成集積回路の半田ラ
ンドとが、共に円形であることを特徴とする。
Further, in the invention according to claim 3 of the present application (hereinafter referred to as the third invention), the solder land of the resin substrate and the solder land of the hybrid integrated circuit to be soldered to this solder land are both It is characterized by being circular.

【0015】[0015]

【作用】[Action]

〈第1〜第3の発明〉樹脂製基板の半田ランド上に、リ
ードレス表面実装型の混成集積回路のセラミックス製基
板の底面のみを、リフロー半田等により固着するが、そ
の半田固着は充分に強固である。
<First to Third Inventions> Only the bottom surface of the ceramic substrate of the leadless surface mounting type hybrid integrated circuit is fixed onto the solder land of the resin substrate by reflow soldering or the like, but the solder fixing is sufficient. It is strong.

【0016】つまり、本発明によれば、熱膨張率が異な
る樹脂製基板とセラミックス基板とがそれぞれ熱膨張し
ても、クラックが入る半田フィレットが形成されないの
で、これら両基板の固着は強固である。
That is, according to the present invention, even if the resin substrate and the ceramic substrate having different thermal expansion coefficients are thermally expanded, solder fillets that cause cracks are not formed, so that the two substrates are firmly fixed to each other. .

【0017】しかも、これら半田の固化後は、セラミッ
クス製の混成集積回路の底面と樹脂製基板との間に主に
形成され、混成集積回路周りに半田フィレットが形成さ
れない。このために、混成集積回路周りのスペースが広
くなるので、その分、混成集積回路を樹脂基板上に高密
度で実装することができる上に、隣り合う半田フィレッ
ト同士が電気的にショートするのを防止することができ
る。
Moreover, after solidification of these solders, the solder fillet is formed mainly between the bottom surface of the ceramic hybrid integrated circuit and the resin substrate, and no solder fillet is formed around the hybrid integrated circuit. For this reason, the space around the hybrid integrated circuit becomes wider, and accordingly, the hybrid integrated circuit can be mounted on the resin substrate at a high density, and the adjacent solder fillets are electrically short-circuited. Can be prevented.

【0018】〈第3の発明〉樹脂製基板の半田ランド
と、セラミックス基板の半田ランドの両者が共に円形で
あるので、これら半田ランド間の半田が固化時にはほぼ
球形になる。このために、樹脂製基板と、セラミックス
基板との熱膨張率が異なっている場合でも、これらの伸
び差をほぼ球状の半田によりあらゆる方向から吸収する
ことができるので、半田にクラックが発生して、半田の
固着力の低下ないし喪失が発生するのを防止することが
できる。
<Third Invention> Since both the solder lands of the resin substrate and the solder lands of the ceramic substrate are circular, the solder between the solder lands becomes substantially spherical when solidified. For this reason, even if the resin substrate and the ceramic substrate have different coefficients of thermal expansion, the difference in expansion between them can be absorbed from almost any direction by the substantially spherical solder, and thus cracks occur in the solder. It is possible to prevent the decrease or loss of the adhesive strength of the solder.

【0019】[0019]

【実施例】以下、本発明の実施例を図1〜図3に基づい
て説明する。なお、図1〜図3中、同一または相当部分
には同一符号を付している。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 3, the same or corresponding parts are designated by the same reference numerals.

【0020】図1は本願第1〜第3,第6,第7の発明
を含む回路装置の一実施例の要部縦断面図であり、図に
おいて、回路装置11は、ガラスエポキシ樹脂等の樹脂
製基板であるマザーボード12上に、複数の半田ランド
13a,13bをスクリーン印刷等により形成すると共
に、これら半田ランド13a,13b上にはスクリーン
印刷等により適量の半田14をそれぞれ添加している。
FIG. 1 is a longitudinal sectional view of an essential part of an embodiment of a circuit device including the first to third, sixth and seventh inventions of the present application. In FIG. 1, the circuit device 11 is made of glass epoxy resin or the like. A plurality of solder lands 13a and 13b are formed on the mother board 12, which is a resin substrate, by screen printing or the like, and an appropriate amount of solder 14 is added to each of the solder lands 13a and 13b by screen printing or the like.

【0021】一方、混成集積回路15は樹脂製等のマザ
ーボード12とは熱膨張率が異なるセラミックス製等の
回路基板16上に、所要の回路パターンを銅ペーストの
印刷等により形成して図示しないリードレス混成集積回
路を実装しており、セラミックス製銅厚膜印刷基板に構
成されている。
On the other hand, the hybrid integrated circuit 15 is formed by printing a copper paste or the like on a circuit board 16 made of ceramics or the like having a different coefficient of thermal expansion from the mother board 12 made of resin or the like to form leads (not shown). It is mounted on a ceramic-less copper thick film printed circuit board.

【0022】そして、各混成集積回路15は回路基板1
6の底面のみに電極17a,17bをそれぞれ形成して
おり、従来例のように側面には形成していない。
Each hybrid integrated circuit 15 is connected to the circuit board 1
The electrodes 17a and 17b are formed only on the bottom surface of 6 and not on the side surfaces as in the conventional example.

【0023】そこで、これらの各混成集積回路15を、
その電極17a,17bが各半田ランド13a,13b
の各半田14上に載るようにマザーボード12上に載置
してから、その全体を例えば図中白矢印に示すように移
動させて図示しないリフロー炉内を通す。すると、各半
田ランド13a,13b上の半田14がリフロー炉内で
加熱されて溶融し、リフロー炉外へ出てから半田14が
冷却して混成集積回路15の各電極17a,17bが、
マザーボード12上の各半田ランド13a,13b上に
固着される。
Therefore, each of these hybrid integrated circuits 15 is
The electrodes 17a and 17b are solder lands 13a and 13b, respectively.
After being placed on the mother board 12 so as to be placed on each solder 14, the whole is moved as shown by a white arrow in the drawing and passed through a reflow furnace (not shown). Then, the solder 14 on each solder land 13a, 13b is heated and melted in the reflow furnace, and after the solder 14 is discharged from the reflow furnace, the solder 14 is cooled and the electrodes 17a, 17b of the hybrid integrated circuit 15 are
The solder lands 13a and 13b on the mother board 12 are fixed.

【0024】したがって本実施例によれば、混成集積回
路15の底面のみをマザーボード12に半田付けするの
で、混成集積回路15周りには図4で示す従来例のよう
な半田6のフィレット6a(図4参照)が形成されな
い。その結果、マザーボード12上の各混成集積回路1
5周りのスペースが広くなるので、その分、これら混成
集積回路15を高密度で実装することができる上に、隣
り合う混成集積回路15の半田14同士がショートする
のを防止することができる。
Therefore, according to the present embodiment, only the bottom surface of the hybrid integrated circuit 15 is soldered to the motherboard 12, so that the fillet 6a of the solder 6 as shown in FIG. 4) is not formed. As a result, each hybrid integrated circuit 1 on the motherboard 12
Since the space around 5 is widened, the hybrid integrated circuits 15 can be mounted at a high density by that amount, and the solders 14 of the adjacent hybrid integrated circuits 15 can be prevented from being short-circuited.

【0025】また、各混成集積回路15の側面に半田フ
ィレット6aが形成されないので、この半田フィレット
6にクラックが入って、半田14の固着力が低下ないし
喪失するのを防止することができる。
Further, since the solder fillet 6a is not formed on the side surface of each hybrid integrated circuit 15, it is possible to prevent the solder fillet 6 from being cracked and the fixing force of the solder 14 from being lowered or lost.

【0026】図2は本願第4,第5の発明を含む一実施
例の縦断面図であり、この回路装置21は各半田ランド
13a,13b周りのマザーボード12上に、半田14
の付着ないし流れを防止するレジスト22をコーティン
グして、各半田ランド13a,13bを円形に形成する
と共に、混成集積回路15の電極17a,17bの近傍
の側面とに、レジスト22をコーティングして半田濡れ
性を低下させている点に特徴がある。
FIG. 2 is a vertical sectional view of an embodiment including the fourth and fifth inventions of the present application. This circuit device 21 has solder 14 on the mother board 12 around each solder land 13a, 13b.
The solder 22 is coated on the side surfaces of the hybrid integrated circuit 15 in the vicinity of the electrodes 17a and 17b by coating the resist 22 to prevent the solder from adhering or flowing. It is characterized in that it has reduced wettability.

【0027】つまり、混成集積回路の底面の電極17
a,17bの近傍の側面には、レジスト22をコーティ
ングしているので、リフロー炉による加熱時に、半田1
4が溶けて混成集積回路の側面に立ち上がるフィレット
6a(図4参照)が形成するのを防止することができ
る。
That is, the electrode 17 on the bottom surface of the hybrid integrated circuit
Since the resist 22 is coated on the side surface in the vicinity of a and 17b, when the solder is heated by the reflow furnace, the solder 1
It is possible to prevent the formation of the fillet 6a (see FIG. 4) which is melted by 4 and rises on the side surface of the hybrid integrated circuit.

【0028】また、各半田ランド13a,13bと電極
17a,1bの両者を共に円形に形成しているので、こ
れら各半田ランド13a,13b上の各半田14は加熱
時に図3に示すように偏平な球形に形成される。
Further, since both the solder lands 13a and 13b and the electrodes 17a and 1b are both formed in a circular shape, the solder 14 on each of the solder lands 13a and 13b is flat as shown in FIG. 3 during heating. It is formed into a spherical shape.

【0029】このために、図7に示すように、マザーボ
ード2と混成集積回路の回路基板7の熱膨張率の相違に
形成する伸び差をこれら球形の半田14によりあらゆる
方向から吸収することができるので、この伸び差に起因
する半田6のクラック8(図8参照)の発生を未然に防
止することができる。
For this reason, as shown in FIG. 7, the difference in thermal expansion between the mother board 2 and the circuit board 7 of the hybrid integrated circuit, which is formed due to the difference in coefficient of thermal expansion, can be absorbed by these spherical solders 14 from all directions. Therefore, it is possible to prevent the crack 8 (see FIG. 8) of the solder 6 due to the difference in elongation from occurring.

【0030】なお、前記実施例では半田ランド13a,
13bと電極17a,17bの両者を円形にした場合に
ついて説明したが、必ずしも正円形である必要はなく、
楕円状であってもよい。また、前記実施例では半田14
の濡れ性を低下させる処理としてレジスト22をコーテ
ィングする場合について説明したが、酸化させて酸化膜
を形成することにより半田濡れ性を低下させてもよく、
その方法には限定されない。
In the above embodiment, the solder lands 13a,
The case where both 13b and the electrodes 17a and 17b are circular has been described, but it is not always necessary to have a perfect circle.
It may be oval. Further, in the above embodiment, the solder 14
Although the case of coating the resist 22 as the treatment for reducing the wettability of the solder has been described, the wettability of the solder may be reduced by forming an oxide film by oxidation.
The method is not limited.

【0031】また、以上で述べた電極および半田ランド
は、電気接続を行なう部分のみを意味し、例えばレジス
トで覆われた部分はこれら該当しない。
Further, the electrodes and solder lands described above mean only the portions for electrical connection, and the portions covered with resist, for example, do not correspond to these.

【0032】[0032]

【発明の効果】以上説明したように本願第1〜第3の発
明は、樹脂製基板の半田ランド上に、リードレス表面実
装型の混成集積回路の底面の電極のみを半田により固着
するので、その混成集積回路周りに半田のフィレットが
形成されるのを防止することができる。
As described above, in the first to third inventions of the present application, only the electrodes on the bottom surface of the leadless surface mounting type hybrid integrated circuit are fixed to the solder lands of the resin substrate by soldering. It is possible to prevent a solder fillet from being formed around the hybrid integrated circuit.

【0033】このために、混成集積回路を樹脂製基板上
に高密度で実装することができる上に、隣り合う混成集
積回路の半田同士が電気的にショートするのを防止する
ことができる。
Therefore, the hybrid integrated circuit can be mounted on the resin substrate at a high density, and the solders of the adjacent hybrid integrated circuits can be prevented from being electrically short-circuited.

【0034】また、樹脂製基板の半田ランドと、混成集
積回路の底面の両者を共に円形に形成するので、これら
両者間に介在される半田をほぼ球状に形成することがで
き、基板と混成集積回路の回路基板との伸び差をこの球
形の半田によりあらゆる方向から吸収することができる
ので、半田にクラックが発生するのを防止することがで
きる。
Further, since both the solder land of the resin substrate and the bottom surface of the hybrid integrated circuit are formed in a circular shape, the solder interposed between them can be formed in a substantially spherical shape, and the solder integration with the substrate is performed. Since the difference in expansion between the circuit and the circuit board can be absorbed from all directions by this spherical solder, it is possible to prevent cracks from occurring in the solder.

【図面の簡単な説明】[Brief description of drawings]

【図1】本願第1〜第3,第6,第7の発明を含む混成
集積回路の要部縦断面図。
FIG. 1 is a longitudinal sectional view of a main part of a hybrid integrated circuit including the first to third, sixth and seventh inventions of the present application.

【図2】本願第4,第5の発明を含む混成集積回路の要
部縦断面図。
FIG. 2 is a longitudinal sectional view of a main part of a hybrid integrated circuit including the fourth and fifth inventions of the present application.

【図3】図2の一部拡大図。FIG. 3 is a partially enlarged view of FIG.

【図4】従来の混成集積回路の一部縦断面図。FIG. 4 is a partial vertical cross-sectional view of a conventional hybrid integrated circuit.

【図5】従来の混成集積回路の斜視図。FIG. 5 is a perspective view of a conventional hybrid integrated circuit.

【図6】他の従来の混成集積回路の斜視図。FIG. 6 is a perspective view of another conventional hybrid integrated circuit.

【図7】図4で示す従来の混成集積回路におけるマザー
ボードと回路基板との熱膨張をそれぞれ示す図。
FIG. 7 is a diagram showing thermal expansions of a mother board and a circuit board in the conventional hybrid integrated circuit shown in FIG. 4, respectively.

【図8】図4で示す従来の混成集積回路の半田にクラッ
クが発生した場合の一部拡大図。
FIG. 8 is a partially enlarged view of the conventional hybrid integrated circuit shown in FIG. 4 when a crack occurs in solder.

【符号の説明】[Explanation of symbols]

11 回路装置 12 マザーボード 13a,13b 半田ランド 14 半田 15 混成集積回路 16 回路基板 17a,17b 電極 22 レジスト 11 circuit device 12 motherboard 13a, 13b solder land 14 solder 15 hybrid integrated circuit 16 circuit board 17a, 17b electrode 22 resist

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 樹脂製基板上に、表面実装部品をセラミ
ックス基板上に実装してなるリードレス表面実装型の混
成集積回路を、実装する回路装置において、前記樹脂製
基板上に、前記混成集積回路の底面のみを、半田により
固着することにより実装したことを特徴とする回路装
置。
1. A circuit device for mounting a leadless surface-mount type hybrid integrated circuit in which surface-mount components are mounted on a ceramic substrate on a resin substrate, wherein the hybrid integrated circuit is mounted on the resin substrate. A circuit device in which only the bottom surface of the circuit is mounted by being fixed by soldering.
【請求項2】 混成集積回路がセラミックス製銅厚膜印
刷基板であることを特徴とする請求項1記載の回路装
置。
2. The circuit device according to claim 1, wherein the hybrid integrated circuit is a ceramic copper thick film printed circuit board.
【請求項3】 樹脂製基板の半田ランドと、この半田ラ
ンドに半田される混成集積回路の半田ランドとが、共に
円形であることを特徴とする請求項1または2記載の回
路装置。
3. The circuit device according to claim 1, wherein the solder land of the resin substrate and the solder land of the hybrid integrated circuit soldered to the solder land are both circular.
JP24130393A 1993-09-28 1993-09-28 Circuit device and mounting method thereof Pending JPH0799260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24130393A JPH0799260A (en) 1993-09-28 1993-09-28 Circuit device and mounting method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24130393A JPH0799260A (en) 1993-09-28 1993-09-28 Circuit device and mounting method thereof

Publications (1)

Publication Number Publication Date
JPH0799260A true JPH0799260A (en) 1995-04-11

Family

ID=17072281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24130393A Pending JPH0799260A (en) 1993-09-28 1993-09-28 Circuit device and mounting method thereof

Country Status (1)

Country Link
JP (1) JPH0799260A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6710263B2 (en) 2000-02-28 2004-03-23 Renesas Technology Corporation Semiconductor devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6710263B2 (en) 2000-02-28 2004-03-23 Renesas Technology Corporation Semiconductor devices

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