JPH0794730A - Semiconductor device with overvoltage protective function - Google Patents

Abstract

PURPOSE:To provide overvoltage protection with good repeatability, by forming a second p-type base layer near to a main element with a smaller quantity of impurity than a main p-type base layer so that punch-through breaks out only in the region of the second base layer. CONSTITUTION:Since a p-type layer 8 has an impurity density smaller than the other p-type layers, a depletion layer is diffused easily in the p-type layer 8. When an applied voltage rises up to a voltage level that is determined on the basis of the amount of impurity, the depletion layer reaches an electrode 15, and thereby a punch-through state breaks out. A current begins to flow through pn-junction between the p-type layer 8 and a drift layer 4. In this state, the potential of the electrode 15 rises and the potential of a gate electrode 11 also rises through a diode 13. As a result, an inversion layer is formed in the surface of the p-type base layer under the gate electrode 11, and main IGBT is put in an ON state. Then, the energy by an overvoltage overvoltage is consumed by the whole element, and thereby the element is protected with safety.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a built-in overvoltage protection function and, more particularly, to a semiconductor device which is safely turned on when a forward overvoltage exceeding the breakdown voltage of the semiconductor device is applied. The present invention relates to a semiconductor device with a built-in overvoltage protection function that can protect against overvoltage.

[0002]

2. Description of the Related Art Generally, a switching element such as an IGBT, when an overvoltage higher than a rated voltage is applied to the element,
A protection circuit is provided to prevent damage to the device due to overvoltage. However, with a switching element having this type of protection circuit, when the overvoltage changes rapidly with time, there is a problem with the time delay between the detection of the overvoltage and the operation of the protection circuit, and the protection operation does not occur in time. It has a problem that it may be destroyed.

Therefore, there is a demand for a semiconductor device with a built-in overvoltage protection in which a protection function is built in the element, and as a conventional technique capable of realizing this, for example, Japanese Patent Laid-Open No. 4-291767, etc. The techniques described are known.

FIG. 7 is a sectional view showing the structure of a semiconductor device with a built-in overvoltage protection function according to the prior art. In FIG. 7, 1 is a semiconductor substrate, 2 is a collector layer, 3 is a collector buffer layer, 4 is a drift layer, 5 is a base layer, 9 is an anode electrode, 10 is a cathode electrode, 11 is a polysilicon gate electrode, 12, 14 is an insulating film, 13 is polysilicon
A diode, 15 is an attached electrode, 16 is an electrode wiring, and 25 is an attached region.

The illustrated prior art is an example in which an IGBT has a built-in overvoltage protection function, and the IGBT body has a p + collector layer 2, an n + collector buffer layer 3, and an n ~ drift layer 4.
The p + base layer 5 is formed in the n to drift layer 4 of the semiconductor substrate 1 made of. Further, the illustrated prior art is configured by providing a p-type semiconductor attachment region 25 adjacent to the base layer 5 of the main IGBT. In addition, the attached area 25
The width of the n-type drift layer 4 on the side of the collector layer 2 is set narrower than the width of the drift layer on the side of the collector layer 2 of the base layer 5, and the additional electrode 15 and the gate electrode 11 contacting the additional region 25 are formed. P on the side of the attached electrode 15 between
Type layer, diode 1 having n-type layer on the side of gate electrode 11
3 is connected.

The diode 13 is for effectively applying the potential to the gate when the potential of the gate electrode 11 is positively biased with respect to the potential of the anode electrode 9. That is, when the gate potential is positive with respect to the anode potential, the n + buffer layer 3 and the p + collector layer 2
The junction formed by and becomes a reverse bias junction, but normally this junction cannot secure the breakdown voltage at the element end face. The diode 13 ensures the breakdown voltage of the element in such a case.

According to the prior art having the above-mentioned structure, the width of the n-type drift layer of the pnp transistor 24 formed by the p + -attached region 25 and the semiconductor substrate thereunder, that is, the width of the open base layer is the pnp transistor of the IGBT body. Since it is narrower than the open base width, the pnp transistor 24 has a structure in which it easily punches through, and the pnp transistor 24 breaks down at a lower voltage than the IGBT body.

As described above, according to the above-mentioned conventional technique, since the breakdown voltage BV _{CEO '} between the collector and the emitter of the pnp transistor 24 in the attachment region 25 is lower than the breakdown voltage BV _CEO of the pnp transistor portion in the IGBT body region, The pnp transistor breaks down first, and its breakdown current passes through the diode 13 to charge the gate-emitter capacitance of the IGBT body. When the voltage between the gate and the emitter reaches the threshold value of the MOSFET, the IGBT is turned on. When the IGBT is turned on, the current in the semiconductor device is absorbed more uniformly in the whole device than in the avalanche breakdown state, so that the IGBT according to the prior art does not.
Can absorb large amounts of energy and can clamp the overvoltage as a relatively low voltage.

In the above-mentioned conventional technique, the pn of the attachment area 25 is
In order to make the base width of the p-transistor thinner than the base width of the IGBT region of the main body, it is necessary to make the depth of the p + attachment region 25 deeper than the base layer 5 of the IGBT of the main body. The operating voltage of the element shown in the figure is determined by the base width of the attachment region 25, but in order to bring this operating voltage within a certain target range, it is necessary to precisely control this base width. To this end, the depth of the p + attachment region 25 is set to μ
It is necessary to precisely control on the order of m.

However, it is difficult to control the depth of the p + attachment region 25 with good reproducibility, and generally, the breakdown voltage BV _{CEO of the} pnp transistor depends on the current amplification factor of the transistor according to the following equation.

[0011]

[Equation 1]

Here, BV _CBO is a base-collector breakdown voltage, α ₀ is a current amplification factor, and n is a constant.

The current amplification factor α ₀ depends on the carrier lifetime in the base, and the carrier lifetime varies depending on the silicon crystal specifications, the heat treatment conditions of the semiconductor device manufacturing process, and the like.

From the above-mentioned point, in the switching element having the built-in overvoltage protection function, it is required to control the operating voltage when the overvoltage is applied with high accuracy and reproducibility. It was difficult.

[0015]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
Since it is difficult to control the depth of the p + attachment region 25 with good reproducibility, there is a problem that the operating voltage at the time of overvoltage application cannot be controlled with high precision and reproducibility.

An object of the present invention is to solve the above-mentioned problems of the prior art, to easily control the operating voltage, to reduce fluctuation factors in the manufacturing process, and to perform reproducible overvoltage protection. An object is to provide a semiconductor device with a built-in overvoltage protection function.

[0017]

According to the present invention, the above object is to provide a second p base layer having a lower impurity concentration, strictly speaking, a smaller total amount of impurities than the p base layer of the body element in the vicinity of the body element. This is achieved by providing a so-called punch-through operation in this area.

The second p base layer is formed by using an ion implantation method, whereby the operating voltage for overvoltage protection can be precisely controlled.

[0019]

The semiconductor main body device with the built-in overvoltage protection function according to the present invention uses the punch-through operation of the emitter layer, which is less affected by the lifetime, and therefore the change in the operating voltage due to process variations is small. Since the ion implantation method is used for forming the impurity layer, the punch-through voltage can be controlled with high accuracy and reproducibility.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A practical example of a semiconductor device with a built-in overvoltage protection function according to the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a diagram for explaining the structure of the first embodiment of the present invention. FIG. 1 (a) is a sectional view thereof, and FIG. 1 (b) is a depletion when a forward voltage is applied. FIG. 2 is a diagram showing the spread of layers, and FIG. 2 is a diagram for explaining the relationship between the applied voltage and the amount of charges in the depletion layer in the first embodiment of the present invention. In FIG. 1, 6 is an n-type emitter layer, 7 is a p-type layer, 8 is a low-concentration p-type layer, and other reference numerals are the same as those in FIG. The illustrated embodiment shows an example in which the present invention is applied to an insulated gate bipolar transistor (IGBT).

In the semiconductor device according to the first embodiment of the present invention, as shown in FIG. 1A, a p-type collector layer 2 and n + are formed.
The buffer layer 3 and n having a higher specific resistance than the buffer layer 3.
A p base layer 5 as a first base layer for forming a channel layer of an IGBT, an n-type source layer 6, and a punch-through diode are formed on one main surface of the semiconductor substrate 1 constituted by the drift layer 4. A p-type layer 8 serving as a second base layer having an impurity concentration, and a p-type layer 8 adjacent to the p-type layer 8 and having the same impurity distribution as the p base layer 5 for ensuring a withstand voltage in the peripheral portion of the p-type layer 8. The shaping layer 7 is formed and configured. An anode electrode 9 is provided on the other main surface of the semiconductor substrate 1, that is, on the anode side, and a cathode electrode 10 is provided on one main surface of the semiconductor substrate 1, that is, on the cathode side. A polysilicon gate electrode 11 and a diode 13 formed of the same polysilicon as the gate electrode 11 are provided. The low impurity concentration p-type layer 8 forming the punch-through diode and the gate electrode 11 are connected by the diode 13, the electrode 15 and the electrode wiring 16.

Next, the operation of the first embodiment of the present invention having the above structure will be described with reference to FIG.

When a forward voltage is applied between the anode and cathode of the IGBT according to the first embodiment of the present invention,
That is, when a positive voltage is applied to the anode side and a negative voltage is applied to the cathode side, as shown in FIG. 1B, the p base layer 5 and the n ~ drift layer 4 connected to the cathode electrode 10 are connected. The depletion layer 20 spreads in the pn junction formed by. In this case, at the rated voltage of the IGBT element, the depletion layer 2
0 reaches the p-layer 7 and the p-layer 8 and the cathode surface region is in a so-called pinch-off state. This allows
The IGBT element can maintain the blocking state in the vicinity of the region of p ~ layer 8.

In the above description, since the p ~ layer 8 has a lower impurity concentration than the other p layers, the depletion layer easily spreads. Therefore, when the applied voltage becomes higher and the applied voltage reaches a certain voltage determined by the total amount of impurities in the p ~ layer 8, the depletion layer 20 reaches the electrode 15 and is in a so-called punch-through state. Then, the pn junction composed of the p ~ layer 8 and the n ~ drift layer 4 can no longer maintain the blocking state, and a current starts to flow. In this state, the potential of the electrode 15 rises and the potential of the gate electrode 11 connected via the diode 13 rises. As a result, an inversion layer is formed on the surface of the p base layer below the gate electrode 11, and the IGBT is turned on.

As described above, the first embodiment of the present invention is
When the GBT body is turned on, energy due to overvoltage is consumed by the entire element, and the element can be protected safely.

What is important in the protection operation as described above is p
Is the punch-through voltage of the layer 8, and this punch-through voltage is between the electrode 15 and the anode electrode p.
~ Drift layer 4, n + buffer layer 3, p + collector layer 2
Is determined by the structure of the pnp transistor formed by.

Generally, the breakdown voltage of a transistor is
_Withstand voltage BV _CBO when reverse bias is applied between collectors
And BV _CEO , which is the withstand voltage when the emitter and collector are reverse biased, and there is a relation of BV _CBO > BV _CEO due to the amplifying action of the transistor. Further, there is a problem that the leakage current is larger when the emitter and the collector are reversely biased. These problems can be improved to some extent by reducing the injection efficiency of the p + collector layer 2. That is, by reducing the injection efficiency of the p + collector layer 2, BV _CEO can be made closer to BV _CBO , and the leakage current can also be reduced.

The above-mentioned first embodiment of the present invention is as follows.
Although the pattern on the cathode side is not shown and only the cross-sectional shape is described, the present invention can make the gate electrode 11 a stripe pattern, or make the basic cell of the main body element circular or the like.

FIG. 2 shows the relationship between the voltage applied to the IGBT and the amount of charge in the depletion layer in the first embodiment of the present invention described above, and to what extent the target protection voltage can be obtained from the relationship shown in the figure. The amount of electric charges, that is, the total amount of impurities, can be understood. The total amount of impurities can be controlled relatively easily by using the ion implantation method. According to the ion implantation method, the dose amount N _DS which is the total amount of implanted ions per unit area is
By measuring the current I _{i of the} ion beam, it can be easily found by the following equation (2).

N _DS = I _i t / q (2) where I _i is the ion current [A / cm ² ], t is the implantation time [seconds], and q is the electron charge [coulomb].

FIG. 3 is a diagram for explaining the structure of the second embodiment of the present invention. FIG. 3 (a) is a sectional view taken along the line AA 'of FIG. 3 (b), and FIG. 3 (b) is the first embodiment of the present invention. It is a top view which shows the pattern by the side of the cathode of Example 2 and the code | symbol of a figure is the same as the case of FIG.

In the illustrated second embodiment of the present invention, a plurality of low impurity concentration p ~ layers 8 for punch-through operation and ap layer 7 for ensuring the peripheral breakdown voltage are arranged between the cells of the IGBT. It is composed.

In the second embodiment of the present invention, as described above, since a large number of p ~ layers 8 and p layers 7 are arranged side by side, a part of the p ~ layers 8 may be pinholes or the like. Even when a defect occurs, the breakdown voltage can be prevented from decreasing due to the pinch-off effect of the depletion layer from the high impurity concentration p layer 7.
The pattern example shown in FIG. 3B is a case where the gate electrode 11 has a stripe shape, and the vicinity of the overvoltage protection region is enlarged and shown.

In the second embodiment of the present invention, the overvoltage detected in this overvoltage protection region is applied to the gate electrode 11 of the IGBT, and the IGBT is turned on. As a result, the energy due to the overvoltage is consumed in the entire element, and the element itself can have a protective function.

In the illustrated embodiment, the gate electrode 11 is described as having a stripe pattern, but
The present invention is not limited to this pattern. For example, the basic cells of the main body element may be circular or the like, and the cells can be arranged at high density by making the protective region circular.

FIG. 4 is a view for explaining the structure of the third embodiment of the present invention. FIG. 4 (a) is a sectional view taken along the line AA 'of FIG. 4 (b), and FIG. 4 (b) is the same as the present invention. It is a top view showing the pattern by the side of the cathode of the 3rd example. The reference numerals in the figure are the same as those in FIG.

The third embodiment of the present invention shown in the drawing is the same as the first embodiment of the present invention described above, except that the p-layer 8 serving as the protective region is formed.
Also, the p + collector layer 2 at the position opposite to the region of the high-concentration p layer 7 is eliminated, and this portion is exposed as an n + buffer layer 3 on the surface of the semiconductor substrate to form a collector short-circuit structure. In this example, the p ~ layer 8 and the high-concentration p layer 7 are formed in a circular shape as shown in Fig. 5 (b).

Since the illustrated embodiment has the collector short-circuit structure, the effect of the transistor function of the pnp structure is eliminated, so that the leakage current can be reduced and the punch-through characteristics can be made sharp, so-called hard characteristics.

FIG. 5 is a sectional view for explaining the structure of the fourth embodiment of the present invention. In FIG. 5, 17 is a p layer, 18,
Reference numeral 19 is a p ~ layer, and other reference numerals are the same as those in FIG.

The fourth embodiment of the present invention is such that a relatively high breakdown voltage can be obtained by the planar structure. As shown in FIG. 5, a deep p ~ layer 18 with a low impurity concentration and a shallow p-layer 18 are provided. It is configured by combining the p ~ layers 19.
In this case, the p to layer 18 has an impurity concentration lower than that of the p layer 17, but the depth is formed deeper, and the total amount of impurities is larger than that of the p layer 17. Layer 17 will punch through.

The fourth embodiment of the present invention shown in the drawing is a p + collector layer 2 facing the p layer 17 which is an overvoltage protection region.
Has a lacking structure. Therefore, as in the case described with reference to FIG. 4, the effect of the pnp transistor action in the protection region can be eliminated, whereby leakage current can be reduced and the rise of current during overvoltage operation can be made steep. it can.

Although the above-described first to fourth embodiments have been described as those in which the present invention is applied to the n-channel type IGBT, the present invention is applied to the p-channel type element having the opposite conductivity type. Can be applied as well, and also IG
Not limited to BT, the present invention can be applied to all switching elements such as MOSFET and bipolar transistor.

FIG. 6 is a circuit diagram showing an application example of an IGBT having a built-in overvoltage protection function, which is a semiconductor device having a built-in overvoltage protection function according to the above-described embodiment of the present invention. The illustrated application example is
It is an example in which the IGBT according to the embodiment of the present invention is applied to an igniter circuit of an automobile. In FIG. 6, 30 is an IGBT element according to the embodiment of the present invention, 31 is an IGBT main body, 32
Is a punch through element built in the element, 33 is a polysilicon diode, 34 is a gate resistance, 35 is an input resistance of a gate circuit, 36 is a noise absorption resistance, 37 is an ignition coil, 38 is an ignition plug, 39 is a battery Is.

The illustrated igniter circuit sets the input voltage Vin to 0
When it is reduced to V and the IGBT body 31 is controlled to be turned off, the current I of the primary coil of the ignition coil 37 is reduced.
Ignition coil 3 trying to keep out flowing
The output voltage generated as Ldi / dt by the inductance L of 7 is induced to the secondary side of the ignition coil 37 and given to the ignition plug 38.

In the above operation, when the output voltage generated as Ldi / dt exceeds the protection voltage of the IGBT element 30 according to the embodiment of the present invention, the punch through element 32 causes punch through, and the diode 33 and the gate ground. A current flows through the resistance between them, and the gate is forward biased, whereby the IGBT 31 operates and consumes the energy of the inductive load.

As a result, the igniter circuit described above is
By using the semiconductor device according to the embodiment of the present invention in which the breakdown voltage of the punch-through element 32 is set to a value sufficiently lower than the breakdown voltage of the IGBT main body 31, it is possible to turn off the inductive load within the safe operation range. .

[0048]

As described above, according to the present invention, it is possible to obtain a semiconductor device having a small temperature dependence of its operating voltage, easy control of the operating voltage, and a reproducible overvoltage protection function. You can

[Brief description of drawings]

FIG. 1 is a diagram illustrating a structure of a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a relationship between an applied voltage and a charge amount in a depletion layer in the first embodiment of the present invention.

FIG. 3 is a diagram illustrating a structure of a second exemplary embodiment of the present invention.

FIG. 4 is a diagram illustrating a structure of a third exemplary embodiment of the present invention.

FIG. 5 is a sectional view illustrating the structure of the fourth embodiment of the present invention.

FIG. 6 is a circuit diagram showing an application example of the present invention.

FIG. 7 is a cross-sectional view showing the structure of a semiconductor device with a built-in overvoltage protection function according to the prior art.

[Explanation of symbols]

 1 semiconductor substrate 2 collector layer 3 collector buffer layer 4 drift layer 5 base layer 6 emitter layer 7 p-type impurity layer 8 p-type low-concentration layer 9 anode electrode 10 cathode electrode 11 polysilicon gate electrode 12, 14 insulating film 13 polysilicon -Diode 15 electrode 16 electrode wiring 17 p-type impurity layer 18, 19 p-type impurity layer 20 depletion layer 25 attachment region

Claims (7)

[Claims] 1. A one conductivity type collector layer adjacent to one main surface of a semiconductor substrate having a pair of main surfaces, another conductivity type collector buffer layer adjacent to the collector layer, the collector buffer layer and the semiconductor substrate. The other conductivity type drift layer adjacent to the other main surface of the one having a higher specific resistance than the collector buffer layer, and the one conductivity type first layer adjacent to the drift layer and selectively formed from the other main surface. A base layer and an emitter layer of the other conductivity type selectively formed in the base layer, and a portion of the first base layer sandwiched between the drift layer and the emitter layer serves as a channel region In a semiconductor device having a gate electrode with an insulating film interposed on the region, in the drift layer, the impurity is separated from the first base layer and is more impure than the other main surface is than the first base layer. An overvoltage protection function characterized in that a second base layer of a conductive type having a small total amount of material is provided, and a punchthrough operation is caused at this portion when an overvoltage is applied to turn on the semiconductor device to perform self-protection. Built-in semiconductor device. 2. A semiconductor substrate having a pair of main surfaces, a collector layer of one conductivity type adjacent to one main surface of the semiconductor substrate, a collector buffer layer of the other conductivity type adjacent to the collector layer, the collector buffer layer, and the semiconductor substrate. The other conductivity type drift layer adjacent to the other main surface of the one having a higher specific resistance than the collector buffer layer, and the one conductivity type first layer adjacent to the drift layer and selectively formed from the other main surface. A base layer and an emitter layer of the other conductivity type selectively formed in the base layer, and a portion of the first base layer sandwiched between the drift layer and the emitter layer serves as a channel region In a semiconductor device having a gate electrode with an insulating film interposed on the region, in the drift layer, the impurity is separated from the first base layer and is more impure than the other main surface is than the first base layer. An overvoltage protection function, characterized in that it has a second conductive-type second base layer having a small total amount of materials, and an electrode provided on the second base layer and the gate electrode are connected via a diode. Built-in semiconductor device. 3. The overvoltage protection according to claim 1, wherein a semiconductor layer of one conductivity type having the same impurity distribution as that of the first base layer 5 is provided around the second base layer. Function-embedded semiconductor device. 4. The semiconductor device with a built-in overvoltage protection function according to claim 1, 2 or 3, wherein a plurality of the second base layers are provided. 5. The semiconductor device with a built-in overvoltage protection function according to claim 1, wherein the second base layer is formed by ion implantation of impurities. 6. The semiconductor device with a built-in overvoltage protection function according to claim 1, wherein the collector layer is absent in the projection region of the second base layer toward the anode side. 7. The collector layer is absent in a region projected to the anode side of the second base layer, and the collector buffer layer is exposed to one main surface of the semiconductor substrate in this region. 1 out of 5
A semiconductor device with a built-in overvoltage protection function as described above.