JPH079112Y2 - Nuclear magnetic resonance apparatus - Google Patents

Nuclear magnetic resonance apparatus

Info

Publication number
JPH079112Y2
JPH079112Y2 JP1984104671U JP10467184U JPH079112Y2 JP H079112 Y2 JPH079112 Y2 JP H079112Y2 JP 1984104671 U JP1984104671 U JP 1984104671U JP 10467184 U JP10467184 U JP 10467184U JP H079112 Y2 JPH079112 Y2 JP H079112Y2
Authority
JP
Japan
Prior art keywords
signal
phase
supplied
time division
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1984104671U
Other languages
Japanese (ja)
Other versions
JPS6121119U (en
Inventor
英雄 志野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jeol Ltd
Original Assignee
Jeol Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jeol Ltd filed Critical Jeol Ltd
Priority to JP1984104671U priority Critical patent/JPH079112Y2/en
Publication of JPS6121119U publication Critical patent/JPS6121119U/en
Application granted granted Critical
Publication of JPH079112Y2 publication Critical patent/JPH079112Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)

Description

【考案の詳細な説明】 [産業上の利用分野] 本考案は、出力信号の位相を極めて速い応答速度で任意
の量変化させることのできる位相可変発振器を備えた核
磁気共鳴装置(NMR装置)に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention is a nuclear magnetic resonance apparatus (NMR apparatus) equipped with a phase variable oscillator capable of changing the phase of an output signal by an arbitrary amount at an extremely fast response speed. It is about.

[従来の技術] NMR装置においては、静磁場強度を一定に保持するため
に磁場ロック装置が設けられる。この磁場ロック装置
は、例えば測定試料に混入した重水素核の共鳴信号(分
散波形)を測定系とは別個に設けたロック用の送受信系
で常にモニターし、その共鳴信号に基づいて静磁場の強
度を制御するものである。この磁場ロック装置では、重
水素核へのロック用高周波の照射と共鳴信号の受信とを
適宜な周期で交互に行うが、その際共鳴信号が正確な分
散波形になるように、復調に用いられる高周波の重水素
核に照射される高周波に対する位相を微調節する必要が
ある。そこで従来は、例えば第4図に示すように高周波
発振器OSCと移相器PSから成る回路が用いられており、
ゲートG1から照射用高周波、ゲートG2から復調用の高周
波を取出すようにしている。
[Prior Art] In the NMR apparatus, a magnetic field lock device is provided to keep the static magnetic field strength constant. This magnetic field lock device constantly monitors, for example, a resonance signal (dispersed waveform) of deuterium nuclei mixed in a measurement sample with a lock transmission / reception system provided separately from the measurement system, and based on the resonance signal, a static magnetic field It controls the strength. In this magnetic field lock device, irradiation of deuterium nuclei with a high frequency for locking and reception of a resonance signal are alternately performed at an appropriate cycle. At that time, the resonance signal is used for demodulation so that the resonance signal has an accurate dispersed waveform. It is necessary to finely adjust the phase with respect to the high frequency irradiated on the high frequency deuterium nuclei. Therefore, conventionally, for example, as shown in FIG. 4, a circuit composed of a high-frequency oscillator OSC and a phase shifter PS is used.
The high frequency for irradiation is taken out from the gate G1, and the high frequency for demodulation is taken out from the gate G2.

[考案が解決しようとする問題点] このような従来例では、移相器としてコンデンサや抵抗
等から成るアナログ回路が用いられ、これをオペレータ
が調節するようにしているため、正確な位相合わせが困
難である、再現性が悪い、コンピュータによる制御が困
難である等の欠点があった。
[Problems to be Solved by the Invention] In such a conventional example, an analog circuit including a capacitor and a resistor is used as a phase shifter, and the operator adjusts the analog circuit. There are drawbacks such as difficulty, poor reproducibility, and difficulty in control by computer.

[問題点を解決するための手段] 本考案は上述した点に鑑みて成されたものであり、アナ
ログ的な移相回路を発振器に付属させるのではなく、任
意の位相の信号を時分割的に発生することのできる発振
器を備えたNMR装置を提供することを目的としている。
[Means for Solving the Problems] The present invention has been made in view of the above-described points, and does not attach an analog phase shift circuit to an oscillator, but outputs a signal of an arbitrary phase in a time division manner. It is an object of the present invention to provide an NMR apparatus equipped with an oscillator capable of generating a magnetic field.

本考案のNMR装置は、正弦波形を構成する多数のデジタ
ル値を記憶したメモリと、デジタル掃引信号を繰返し発
生する手段と、該デジタル掃引信号が一方の入力端子に
供給されると共に、その出力が前記メモリから読出しを
行うためのアドレス信号として該メモリへ供給される加
算手段と、該加算手段へ位相を表わすデジタル値を時分
割的に供給する位相値発生手段と、該加算手段の出力信
号をアドレス信号として前記メモリから読み出されたデ
ジタル値を前記位相値発生手段による時分割に同期して
時分割的にアナログ信号に変換することにより2種類の
位相値に対応した2種類のアナログ信号を時分割的に得
る手段と、該時分割的に得られた2種類のアナログ信号
のうち一方が供給されるロック用送受信コイルと、該ロ
ック用送受信コイルから得られた検出信号が供給される
と共に、前記時分割的に得られた2種類のアナログ信号
の他方が参照信号として供給される共鳴信号復調用復調
器と、該復調器から得られた共鳴信号に基づいて静磁場
強度を制御する磁場制御手段とを備えたことを特徴とし
ている。以下、図面に用いて本考案を詳説する。
The NMR apparatus of the present invention has a memory storing a large number of digital values forming a sine waveform, a means for repeatedly generating a digital sweep signal, the digital sweep signal being supplied to one input terminal, and the output thereof being An adder that is supplied to the memory as an address signal for reading from the memory, a phase value generator that supplies a digital value representing a phase to the adder in a time division manner, and an output signal of the adder are provided. By converting the digital value read from the memory as an address signal into an analog signal in a time division manner in synchronization with the time division by the phase value generating means, two kinds of analog signals corresponding to two kinds of phase values can be obtained. Means for obtaining in a time division manner, lock transmitting / receiving coil to which one of the two kinds of analog signals obtained in a time division manner is supplied, and the transmitting / receiving coil for lock And a resonance signal obtained from the demodulator for resonance signal demodulation to which the detection signal obtained from the above is supplied and the other of the two types of analog signals obtained in the time division manner is supplied as a reference signal. And a magnetic field control means for controlling the static magnetic field intensity based on the signal. Hereinafter, the present invention will be described in detail with reference to the drawings.

[実施例] 第1図は本考案の一実施例を示すブロック図であり、図
において1は静磁場を発生する磁石、2は磁場強度を可
変するための補正コイル、3は観測用の送受信コイル、
4はロック用の送受信コイルである。5は同じ周波数で
位相の異なる2つの高周波を時分割で発生する発振器
で、夫々の高周波は混合器6,7において別の高周波と混
合され、重水素核の共鳴周波数にまで周波数を上げられ
た後、一方はゲート8を介して前記送受信コイル4へ送
られ、他方はゲート9を介して後述する復調器10へ参照
信号として供給される。送受信コイル4に誘起された共
鳴信号は、ゲート11を介して取出され、復調器10へ送ら
れて復調される。磁場制御回路12は、復調により得られ
た共鳴信号に基づいて磁場強度を制御し、磁場をロック
する。
[Embodiment] FIG. 1 is a block diagram showing an embodiment of the present invention, in which 1 is a magnet for generating a static magnetic field, 2 is a correction coil for varying the magnetic field strength, and 3 is a transmitter / receiver for observation. coil,
Reference numeral 4 is a transmitting / receiving coil for locking. Reference numeral 5 is an oscillator that generates two high frequency waves having the same frequency but different phases in a time division manner. Each high frequency wave was mixed with another high frequency wave in the mixers 6 and 7, and the frequency was raised to the resonance frequency of the deuterium nucleus. After that, one is sent to the transmission / reception coil 4 via the gate 8 and the other is supplied as a reference signal to the demodulator 10 described later via the gate 9. The resonance signal induced in the transmission / reception coil 4 is taken out through the gate 11 and sent to the demodulator 10 for demodulation. The magnetic field control circuit 12 controls the magnetic field strength based on the resonance signal obtained by demodulation and locks the magnetic field.

上述の如き構成において、前記発振器5は、例えば1周
期分の正弦波形に関するデータ値が格納されているメモ
リ(ROM)13、クロック発振器14、クロック信号に基づ
いてデジタル掃引信号を発生する掃引回路15、クロック
信号に基づいて時分割のタイミングを制御する時分割回
路16、可変デジタル値発生回路17、加算回路18、ゲート
19、ROM13から読出されたデジタル値が供給される2つ
のD−A変換器20,21、ローパスフィルタ22,23とから成
る。
In the above-described configuration, the oscillator 5 includes, for example, a memory (ROM) 13 in which data values regarding a sine waveform for one cycle are stored, a clock oscillator 14, and a sweep circuit 15 that generates a digital sweep signal based on the clock signal. , A time division circuit 16 for controlling the timing of time division based on a clock signal, a variable digital value generation circuit 17, an addition circuit 18, a gate
19. It comprises two DA converters 20 and 21 to which the digital value read from the ROM 13 is supplied, and low pass filters 22 and 23.

第2図(a)は上記ROM13の入出力特性を示し、横軸に
アドレス、縦軸に出力デジタル値がとられている。第2
図(a)から分るように、1周期分の正弦波形は例えば
2千点のデータに分割されており、例えば1μsec毎に
アドレスを0→1→2→3→・・・と指定することによ
り全データを順次読出せば、1周期2000μsec(500Hz)
の階段信号がD−A変換器の出力として得られる。同じ
1μsec毎にアドレスを0→100→200→300→・・・と指
定することによりデータを100個おきに飛ばして読出せ
ば、第2図(b)に示すような1周期20μsec(50KHz)
の階段信号が得られ、更には第2図(c)に示すように
データを500個おきに読出せば、1周期4μsec(250KH
z)の波形を得ることができる。このように、飛ばして
読出すデータの個数を変えることにより、任意の周波数
の信号を取出すことが可能である。
FIG. 2 (a) shows the input / output characteristics of the ROM 13, where the horizontal axis is the address and the vertical axis is the output digital value. Second
As can be seen from the figure (a), the sine waveform for one cycle is divided into, for example, 2,000 points of data, and for example, the address is designated as 0 → 1 → 2 → 3 → ... Every 1 μsec. If all data are sequentially read by, one cycle 2000 μsec (500 Hz)
The staircase signal of is obtained as the output of the DA converter. If data is skipped and read every 100 microseconds by designating the address as 0 → 100 → 200 → 300 → ... every 1 microsecond, one cycle is 20 microseconds (50KHz) as shown in Fig. 2 (b).
The staircase signal of is obtained, and if data is read every 500 pieces as shown in FIG. 2 (c), one cycle is 4 μsec (250 KH
The waveform of z) can be obtained. In this way, it is possible to extract a signal of an arbitrary frequency by changing the number of skipped and read data.

掃引回路15は、データをN個おきに読出すとした時、0
→2N→3N→・・・→0→N→2N→・・・なるデジタル掃
引信号を発生し、これをアドレス信号として加算回路18
を介してROM13へ送る。この時、本考案においては、こ
の加算回路18において、掃引回路からのアドレス信号に
可変デジタル値発生回路17が発生した任意のデジタル値
Mを加算することができる構成となっている。今、Mの
値が10であり、N=100で掃引回路15から発生するアド
レス信号が0→100→200→300→・・・と掃引されると
すれば、加算回路18の出力は10→110→210→310→・・
・となり、このアドレス信号によってROM13から読出さ
れる信号は、第2図(d)に示すように、第2図(b)
の信号と波形は若干異なるが同じ200μsecの周期(周波
数50KHz)で、且つデータにして10個分位相が遅れた信
号となる。この場合、位相の遅れ量φは(M/N)×360°
=36°となり、Mを1ずつ変えれば、3.6°ステップで
位相を変えることが可能である。
The sweep circuit 15 reads 0 when data is read every N pieces.
→ 2N → 3N → ・ ・ ・ → 0 → N → 2N → ・ ・ ・ Generates a digital sweep signal and uses this as an address signal to adder circuit 18
To ROM13 via. At this time, in the present invention, the addition circuit 18 is configured to add an arbitrary digital value M generated by the variable digital value generation circuit 17 to the address signal from the sweep circuit. Now, if the value of M is 10 and the address signal generated from the sweep circuit 15 is swept as 0 → 100 → 200 → 300 → ... When N = 100, the output of the adder circuit 18 is 10 → 110 → 210 → 310 → ・ ・
The signal read from the ROM 13 by this address signal is as shown in FIG. 2 (b) as shown in FIG. 2 (d).
Although the waveform is slightly different from that of the signal, the signal has the same cycle of 200 μsec (frequency of 50 KHz) and is delayed by 10 data in phase. In this case, the phase delay φ is (M / N) × 360 °
= 36 °, and if M is changed by 1, the phase can be changed in 3.6 ° steps.

同様にN=500であれば、Mを1ずつ変えることによ
り、360°/500=0.72°ステップで位相を変えることが
可能である。
Similarly, if N = 500, the phase can be changed in 360 ° / 500 = 0.72 ° steps by changing M by one.

第3図(a),(b)は、時分割回路16が発生する制御
信号a,bを夫々示す。2つの制御信号は適宜な時分割周
波数が与えられ、図から分るように位相が反転してい
る。ゲート19は制御信号bに基づいて第3図(c)に示
すようにON−OFFされるため、該ゲート19を介して加算
回路18へ送られるMの値は、ゲートがOFFの時“0"、ON
の時“M"となる。そして、D−A変換器20,21は制御信
号a,bによって夫々第3図(d),(e)のように動作
がON−OFFされるため、D−A変換器20がONの期間、該
D−A変換器20からは位相が零の信号f1(o)が取出さ
れ、D−A変換器21がONの期間、該D−A変換器21から
は位相がφの信号f1(φ)が取出されることになる。
3A and 3B show control signals a and b generated by the time division circuit 16, respectively. The two control signals are given appropriate time division frequencies, and their phases are inverted as can be seen from the figure. Since the gate 19 is turned on and off based on the control signal b as shown in FIG. 3 (c), the value of M sent to the adder circuit 18 through the gate 19 is "0" when the gate is off. ", ON
At that time, it becomes "M". The operations of the D-A converters 20 and 21 are turned on and off by the control signals a and b, respectively, as shown in FIGS. 3D and 3E, so that the D-A converter 20 is ON. , The signal f1 (o) having a phase of zero is taken out from the D / A converter 20, and the signal f1 having a phase of φ is output from the D / A converter 21 while the D / A converter 21 is ON. φ) will be taken out.

このようにして交互に取出されるf1(o),f1(φ)
は、混合器6,7において適宜な周波数の信号f2と混合さ
れ、夫々の出力として重水素核の共鳴周波数の信号f3
(o)とf3(φ)が取出される。その内、f3(o)はD
−A変換器20と同期してON−OFFされるゲート8を介し
て送受信コイル4へ送られ、試料内の重水素核に照射さ
れ、一方、f3(φ)はD−A変換器21と同期してON−OF
Fされるゲート9を介して復調器10へ送られる。そのた
め、f3(o)の重水素核への照射、及びその照射に起因
して送受信コイル4に誘起された共鳴信号のf3(φ)に
基づく復調とが交互に時分割的に行われることになる。
そして磁場制御装置12は、復調により得られた共鳴信号
(分散波形)に基づき、補正コイル2へ供給する電流を
制御することにより磁場強度を制御し、磁場をロックす
る。移相量φを調節するには、前述の如く、可変デジタ
ル値発生回路17の出力Mを調節すれば良いことは言うま
でもない。
In this way, f1 (o) and f1 (φ) are taken out alternately.
Are mixed with a signal f2 having an appropriate frequency in mixers 6 and 7, and output as a signal f3 having a resonance frequency of deuterium nuclei, respectively.
(O) and f3 (φ) are taken out. Among them, f3 (o) is D
It is sent to the transmission / reception coil 4 through the gate 8 which is turned on / off in synchronization with the -A converter 20, and is irradiated to the deuterium nuclei in the sample, while f3 (φ) is transferred to the DA converter 21. ON-OF synchronously
The signal is sent to the demodulator 10 via the gate 9 which is turned on. Therefore, irradiation of deuterium with f3 (o) and demodulation based on f3 (φ) of the resonance signal induced in the transmission / reception coil 4 due to the irradiation are alternately performed in a time division manner. Become.
Then, the magnetic field controller 12 controls the magnetic field strength by controlling the current supplied to the correction coil 2 based on the resonance signal (dispersion waveform) obtained by demodulation, and locks the magnetic field. It goes without saying that the output M of the variable digital value generation circuit 17 may be adjusted as described above in order to adjust the phase shift amount φ.

[考案の効果] 以上詳述の如く、本考案によれば、コンデンサや抵抗等
から成るアナログ移相回路が用いられる従来と異なり、
任意の位相の信号をデジタル的に且つ選択的に発生する
ことのできる発振器を備えたNMR装置が実現されるた
め、正確に位相合わせができ、しかも再現性が良く、高
速のコンピュータ制御が可能である等の効果が得られ
る。
[Effect of the Invention] As described in detail above, according to the present invention, unlike the conventional case in which an analog phase shift circuit including a capacitor and a resistor is used,
Since an NMR device equipped with an oscillator that can selectively and selectively generate a signal with an arbitrary phase is realized, it is possible to perform accurate phase matching, good reproducibility, and high-speed computer control. There are some effects.

また、1つのROM13で時分割的に2つの位相の信号が得
られるため、構成が複雑化しないという効果も得られ
る。
Further, since one ROM 13 can obtain signals of two phases in a time division manner, there is an effect that the configuration is not complicated.

【図面の簡単な説明】[Brief description of drawings]

第1図は本考案の一実施例を示すブロック図、第2図は
発振器5における周波数可変及び位相可変の動作を説明
するための波形図、第3図は第1図の装置の動作を説明
するためのタイミング図、第4図は従来の発振器と移相
器の組合わせを説明するための図である。 1:磁石、2:補正コイル、3:観測用送受信コイル、4:ロッ
ク用送受信コイル、5:発振器、6,7:混合器、8,9,11,19:
ゲート、12:磁場制御回路、13:ROM、14:クロック発振
器、15:掃引回路、16:時分割回路、17:可変デジタル値
発生回路、18:加算回路、20,21:D−A変換器、22,23:ロ
ーパスフィルタ。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram for explaining the frequency variable and phase variable operation of the oscillator 5, and FIG. 3 is an operation of the apparatus of FIG. FIG. 4 is a timing diagram for doing so, and FIG. 4 is a diagram for explaining a combination of a conventional oscillator and a phase shifter. 1: Magnet, 2: Correction coil, 3: Observation transmission / reception coil, 4: Lock transmission / reception coil, 5: Oscillator, 6,7: Mixer, 8,9,11,19:
Gate, 12: Magnetic field control circuit, 13: ROM, 14: Clock oscillator, 15: Sweep circuit, 16: Time division circuit, 17: Variable digital value generation circuit, 18: Addition circuit, 20, 21: DA converter , 22,23: Low-pass filter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】正弦波形を構成する多数のデジタル値を記
憶したメモリと、デジタル掃引信号を繰返し発生する手
段と、該デジタル掃引信号が一方の入力端子に供給され
ると共に、その出力が前記メモリから読出しを行うため
のアドレス信号として該メモリへ供給される加算手段
と、該加算手段へ位相を表わすデジタル値を時分割的に
供給する位相値発生手段と、該加算手段の出力信号をア
ドレス信号として前記メモリから読み出されたデジタル
値を前記位相値発生手段による時分割に同期して時分割
的にアナログ信号に変換することにより2種類の位相値
に対応した2種類のアナログ信号を時分割的に得る手段
と、該時分割的に得られた2種類のアナログ信号のうち
一方が供給されるロック用送受信コイルと、該ロック用
送受信コイルから得られた検出信号が供給されると共
に、前記時分割的に得られた2種類のアナログ信号の他
方が参照信号として供給される共鳴信号復調用復調器
と、該復調器から得られた共鳴信号に基づいて静磁場強
度を制御する磁場制御手段とを備えたことを特徴とする
核磁気共鳴装置。
1. A memory storing a large number of digital values forming a sine waveform, a means for repeatedly generating a digital sweep signal, the digital sweep signal being supplied to one input terminal, and the output thereof being the memory. From the adder means as an address signal for reading from the memory, phase value generating means for time-divisionally supplying a digital value representing a phase to the adder means, and an output signal of the adder means being an address signal. As the digital value read from the memory, the two kinds of analog signals corresponding to the two kinds of phase values are time-divided by time-divisionally converting into analog signals in synchronization with the time division by the phase value generating means. Means, a lock transmitter / receiver coil to which one of the two types of analog signals obtained in a time division manner is supplied, and a lock transmitter / receiver coil. To the resonance signal obtained from the demodulator for resonance signal demodulation to which the other of the two types of analog signals obtained in a time division manner is supplied as a reference signal while the detected signal is supplied. And a magnetic field control means for controlling the static magnetic field intensity based on the nuclear magnetic resonance apparatus.
JP1984104671U 1984-07-11 1984-07-11 Nuclear magnetic resonance apparatus Expired - Lifetime JPH079112Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984104671U JPH079112Y2 (en) 1984-07-11 1984-07-11 Nuclear magnetic resonance apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984104671U JPH079112Y2 (en) 1984-07-11 1984-07-11 Nuclear magnetic resonance apparatus

Publications (2)

Publication Number Publication Date
JPS6121119U JPS6121119U (en) 1986-02-07
JPH079112Y2 true JPH079112Y2 (en) 1995-03-06

Family

ID=30664009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984104671U Expired - Lifetime JPH079112Y2 (en) 1984-07-11 1984-07-11 Nuclear magnetic resonance apparatus

Country Status (1)

Country Link
JP (1) JPH079112Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102009061018B4 (en) * 2009-04-27 2012-03-08 Bruker Biospin Ag Method for operating a device for high-precision synchronization of the NMR transmission frequency to the resonance frequency of an NMR line, taking into account a non-constant RF phase and associated synchronization system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5213762A (en) * 1975-07-23 1977-02-02 Hitachi Ltd Multi-phase function generating circuit
JPS5829886B2 (en) * 1977-12-22 1983-06-25 ヤマハ株式会社 polyphase signal generator
JPS54106156A (en) * 1978-02-09 1979-08-20 Mitsubishi Electric Corp Signal generator
JPS55175851U (en) * 1979-06-06 1980-12-17

Also Published As

Publication number Publication date
JPS6121119U (en) 1986-02-07

Similar Documents

Publication Publication Date Title
US4659999A (en) Direct frequency synthesizer which is step-wise variable and has phase continuity and phase reproducibility when switching frequencies
ES8703634A1 (en) Method and apparatus for displaying eddy current detector data.
JP2001272446A (en) Frequency generator for nmr applied device using direct digital frequency synthesis(dds)
JP2504666B2 (en) Method and apparatus for compensating for magnetic field disturbance in a magnetic field
JPH079112Y2 (en) Nuclear magnetic resonance apparatus
US4604580A (en) Nuclear magnetic resonance diagnostic apparatus
US4336511A (en) Method and apparatus for increasing the sweep rate of a linearly swept frequency oscillator
US3609317A (en) Variable frequency audio frequency modulator for r.f. spectrometer
JP2838102B2 (en) RF generator for magnetic resonance imaging
EP0395423A3 (en) Signal generator method and apparatus
Ichikawa Microcomputer-controlled pulse generator for an electron spin-echo spectrometer
GB2110826A (en) Methods and apparatus for frequency response analysis
US5296808A (en) MRI imaging system without aliasing
JPH08368U (en) Frequency generation method for NMR apparatus
US4939461A (en) Method of determining the nuclear magnetization distribution, and device for performing the method
JPS6165179A (en) False signal generator
SU932426A1 (en) Device for measuring four-terminal network frequency characteristics
JPH09117423A (en) Nuclear magnetic resonance examination apparatus
JP3047423B2 (en) Frequency conversion circuit
CN85103819A (en) Determine certain a part of nuclear magnetic resonance distributes in the human body method and equipment thereof
SU1429287A1 (en) Synchronous detector
JPS63210784A (en) Transmission characteristic measuring instrument for phase-locked oscillator
JPH0548336A (en) Signal generator
JPH0145184Y2 (en)
RU2079875C1 (en) Method for generation of control electric signal for input to computer and device which implements said method