JPH0787323A - Image processor - Google Patents

Abstract

PURPOSE:To provide an image processor which can eliminate the notches if included in the image data and can perform the magnified interpolation processing. CONSTITUTION:The (5-dotX5-line) data are successively taken out of the 5-line data stored in an 8-line buffer 2 and sent to a (5X5)-register matrix 4. Then the notches are deleted out of a marked pixel through a notchless processing part 8. The data including no notch are stored in 3 lines of the buffer 2. The (3-dotX3-line) data are taken out of the data stored in 3 lines and sent to a (3X3)-register matrix 5 to undergo the smoothing processing through a smoothing processing part 9. The smoothed data 20a are sent to a printer which is not shown in the figure and printed thereby. The notch eliminating processing and the smoothing processing are carried out in parallel to each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing device,
In particular, image processing that performs smoothing processing that smoothes the jaggedness of the shaded areas of an image and that can remove convexes or concaves (hereinafter referred to as notches) in the main scanning direction or sub-scanning direction of the image. Regarding the device.

[0002]

2. Description of the Related Art In the field of conventional image processing, a technique of enlarging original image data and printing it out by a printer has been put into practical use. In this case, if you perform a simple enlargement process,
Jaggedness occurs in the shaded areas of characters and figures. Since this jaggedness causes deterioration of print quality, a process for removing it, that is, an interpolation process (smoothing process) is required.

Conventionally, several interpolation processes have been proposed. For example, it is proposed in JP-A-60-11885 and JP-A-1-208154.

Further, even in a facsimile machine, CC
Image data sent in accordance with ITT's recommendation, that is, in a G3 standard facsimile apparatus which is generally used at present, 8 pixels / mm × 3.85 lines / mm (standard) and 8 pixels / mm × 7. 7 lines / m
Two resolutions of m (high resolution) are used.

On the other hand, in recent facsimile machines, apparatuses having higher resolution and higher linear density have appeared.
For example, in a G3 facsimile machine, 16 pixels / mm ×
There are 15.4 lines / mm, and G4 facsimile machines have 200 dpi, 240 dpi, and 300 dpi.
And with multiple resolutions of 400 dpi.

Conventionally, a facsimile apparatus having such a plurality of resolutions is equipped with a recording apparatus having a higher resolution, and when recording image information having a resolution lower than that resolution, the image information is enlarged and recorded. I am trying. This is because if the high resolution image recording apparatus does not enlarge the low resolution image information and directly records it, the image is reduced and recorded.

For example, 8 pixels / mm × 3.85 lines /
When image information sent at a resolution of mm (standard) is recorded by a recording device of 400 dpi, the main scanning direction is reduced to about 1/2 and the sub scanning direction is reduced to about 1/4. Therefore, 8 pixels / mm x 3.85 lines / mm
When recording image information sent at a resolution of 400 dpi with a recording device of 400 dpi, the received image information should be enlarged about twice in the main scanning direction and about four times in the sub scanning direction. Will be required.

As prior art which discloses that image information of low resolution is enlarged and recorded by a high resolution recording apparatus,
For example, JP-A-62-25565 and JP-A-62-6.
No. 0358 is available.

[0009]

The above-mentioned interpolation processing is
Advanced interpolation processing with more reference pixels around the pixel of interest
Although it is necessary to perform the processing at an arbitrary magnification and at high speed, there has been a problem that the above-described conventional processing apparatus does not sufficiently meet this demand.

In addition, the image data before the interpolation processing,
When notches such as shown in FIG. 6 (a) or 6 (b) are mixed, a technique for removing the notches is disclosed in, for example, Japanese Patent Laid-Open No.
Although it is disclosed in Japanese Patent No. 238462, no consideration was given to performing the notch removal and the smoothing process in parallel at high speed.

An object of the present invention is to eliminate the above-mentioned problems of the prior art, and when a notch is included in the image data, the removal of the notch and the expansion interpolation processing can be performed in parallel and at high speed. An object is to provide an image processing device.

[0012]

In order to achieve the above object, the present invention provides an image processing apparatus for performing notch removal processing of image data and smoothing processing for the image data from which the notch is removed, {(2m + 1) + (2n + 1)}
A line buffer capable of storing input image data for a line (here, m and n are positive integers), and (2m + 1) × (2m + 1) pixels are taken out from the line buffer, and a notch is formed for the pixel of interest. A notchless processing unit for performing removal processing, a means for guiding the data subjected to the notch removal processing to the line buffer, and the notch removed data stored in the line buffer is (2n + 1) ×
It is characterized in that it is provided with means for taking out (2n + 1) pixels and performing a smoothing process on the pixel of interest.

[0013]

According to the present invention, first, (2m + 1) .times. (2m + 1) pixels are taken out from the line buffer, and the notch removal processing is performed on the target pixel. The data with the notch removed is stored again in the line buffer. The data from which the notch has been removed is extracted from the line buffer as (2n + 1) × (2n + 1) pixels, and the smoothing process is performed on the pixel of interest.

As described above, according to the present invention, smoothing processing is performed on notch-removed data in parallel with notch removal, so that high-quality image data can be reproduced at high speed. You can

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the drawings. FIG. 5 is a block diagram showing the hardware configuration of a facsimile apparatus incorporating the notch removal processing means of the present invention and the image information correction means including the enlargement / smoothing processing means.
The following embodiment is one in which the present invention is applied to a facsimile machine, but the present invention is not limited to this.

In FIG. 5, 11 is a panel for instructing the facsimile machine to operate, 12 is a CPU for controlling the overall operation of the facsimile machine, 13 is a ROM containing a program executed by the CPU 12, and 14 is used by the program. This is a work area RAM. Further, 15 is an image reading device that reads a transmission original and outputs binary image data, 16 is a compressor that converts the binary image data output from the image reading device 15 into code data, and 17 is a partner facsimile device. It is a communication control device that transmits and receives code data.

Further, 18 is a storage memory for storing the code data output from the compressor 16 and the code data received from the partner facsimile machine, and 19 is the storage memory 1
A decompressor for reading the coded data from 8 and decompressing it into binary image data, 20 is an image information correction circuit for removing notches from the binary image data output from the decompressor 19 and for enlarging / interpolating processing, 21 This is an image recording device for recording the binary image data which has been subjected to the enlargement interpolation processing by the image information interpolation device 20. A bus 23 connects the above-mentioned components. The decompressor 19 decompresses the code data in the storage memory 18 and outputs the decompressed image information 19a to the image information correction circuit 20. The image information correction circuit 20 outputs the data 20 a subjected to the notch removal processing and the smoothing processing to the image recording device 21.

Next, the image information correction circuit 20 will be described in detail with reference to FIG. FIG. 1 shows the image information correction circuit 20.
3 shows a block diagram of an embodiment of FIG. The same reference numerals as those in FIG. 5 indicate the same or equivalent components.

In FIG. 1, 1 is a first multiplexer (MUX), 2 is an 8-line buffer for storing image data to be corrected, and 3 is a second multiplexer (MU).
X), 4 is a register matrix for notchless processing of 5 (dots) × 5 (lines), 5 is a register matrix for smoothing processing of 3 (dots) × 3 (lines), 6 is 7 (dots) × 7 (lines) Is a register matrix for smoothing processing, and 7 is a third multiplexer (MUX). Further, 8 is a notchless processing unit for removing a notch of image data, 9 is a smoothing processing unit, and 10 is a control circuit for controlling the first to third multiplexers.

Next, the operation of the apparatus shown in FIG. 1 will be described. First, 8 line buffer 2, register matrix 4, 5,
It is assumed that 6 has been reset and that all 0 data has been entered. When an operator gives an instruction for notchless processing from the panel 11, the instruction is given to the control circuit 1.
Enter 0. The control circuit 10 controls the operations of the first to third multiplexers according to this instruction. The first multiplexer 1 first connects the input image data 19a to the align buffer 2. When a predetermined number of lines of input image data 19a are stored in the 8-line buffer 2, the first multiplexer 1 outputs the output data 2a of the 8-line buffer 2 and the output data 8a of the notchless processing unit 8 to the 8-line buffer. Operate to connect to 2. The second multiplexer 3 connects the first to fifth lines of the 8-line buffer 2 to the notchless processing register matrix 4 and connects the sixth to eighth lines to the smoothing processing register matrix 5. Further, the third multiplexer 7 selects the smoothing processing register matrix 5 and connects the data to the smoothing processing unit 9.

Now, in the 8-line buffer 2, for example, as shown in FIG.
As shown in (a), when the input image data 19a is stored for, for example, 3 lines and becomes 0 line data including 0 line data at the time of reset, the notchless processing and the smoothing processing of the present embodiment are performed. Be started. At this time, the first multiplexer 1 selects the data 2a from the 8-line buffer 2 and the data 8a of the notchless processing unit 8,
The data output from the line buffer 2 and the notchless processing unit 8 are stored in the same line of the 8-line buffer 2. That is, as shown in FIG.
The line is circulated for one line. At this time, the third line outputs the data from which the notch has been removed by the notchless processing unit 8 (the data represented by the triangles in the figure), so the data from which the notch has been removed is output to the third line of the 8-line buffer 2. It will be stored sequentially. The data of the sixth to eighth lines are sent to the register matrix 5 at the same time, and then sent to the smoothing processing section 9 by the third multiplexer 7. Then, the data on the seventh line is subjected to smoothing processing.

When the notch removal processing for the third line is completed, the process shown in FIG. 9C is obtained, and then the operation shown in FIG. Here, the new input image data n1 is the first
The data of the first line is read to the second line, the data of the second line to the third line, and the data of the third line to the fourth and sixth lines. Data on line 5 goes to line 5,
The data on the fifth line is erased, the data on the sixth line is erased on the seventh line, the data on the seventh line is erased on the eighth line, and the data on the eighth line is erased. 2 (e), (f), (a), (b), (c), ... Of FIG. As described above, the notch removal of the input image data and the smoothing process for the data of the three lines from which the notch has been removed are performed in parallel.

This smoothing process is the same as the operation when n = 1 in the invention described in Japanese Patent Application No. 5-46045 filed by the present applicant earlier.

Next, the operation of the notchless processing section 8 will be described. Now, as shown in Figure 4, 5 (dots)
If there is x5 (line) image data, the notchless processing unit 8 uses the data d1 at the center of the 5x5 matrix as the pixel of interest and the other pixels as reference pixels. Then, all the data are scanned in the order of the first column, the second column, ... From the upper left data of the 5 × 5 matrix, and it is determined whether or not the pixel of interest is a notch. For example, as shown in FIG. 7A, when only the pixel of interest d1 protrudes from the upper and lower reference pixels, it is determined as a notch.
On the contrary, if only the target pixel d1 is recessed from the upper and lower reference pixels as shown in FIG. 6B, it is determined that there is no notch image. The notchless processing unit 8 determines the target pixel d1
If it is determined to be a notch, pixel data (that is, white data) from which the notch has been removed is output as the target pixel d1. On the contrary, when it is determined that the target pixel d1 is a notch-free image, pixel data (that is, black data) from which the notch-free image is removed is output as the target pixel d1. In the above description, the reference pixel is viewed vertically with the target pixel d1 as the center. However, when the reference pixel is viewed horizontally with the target pixel d1 as the center, the target pixel is a notch or has no notch. Of course, it is also determined whether the image is an image.

Next, the operation when the operator does not instruct the notchless processing from the panel 11 will be described with reference to FIG. In this case, notchless processing is not performed and only smoothing processing is performed. The first multiplexer 1 connects the input image data 19a or the predetermined 7-line output data 2a from the 8-line buffer 2 to the 8-line buffer 2, and ignores the line from the notchless processing unit 8. The 8-line buffer 2 uses 7 lines of them, and the second multiplexer 3 selects the 7 × 7 register matrix 6. Further, the third multiplexer 7 selects the output of the 7 × 7 register matrix 6 and sends the data to the smoothing processing section 9. Next, the operation will be described. Predetermined 7 of the 8 line buffers 2
When the input image data is stored in the line, the first multiplexer 1 selects the 7-line data 2a output from the 8-line buffer 2. Also, the 7 × 7 matrix data in the 8-line buffer 2 is extracted, this data is sent to the 7 × 7 register matrix 6 via the second multiplexer 3, and then the smoothing processing unit 9 focuses on the center. Smoothing processing is performed on the pixels. The smoothing process for the target pixel is sequentially performed, and this process is
When the line is completed, the input image data 19a is selected by the first multiplexer 1 and the one line is stored in one line of the 8-line buffer 2, and the oldest 1
The line data is erased. Then, the first multiplexer 1 again selects the 7-line data 2a output from the 8-line buffer 2, and the smoothing process for the target pixel of the 7 × 7 matrix data is executed in the same manner as described above.

This smoothing process is performed by the above-mentioned Japanese Patent Application No. 5-460.
The same or equivalent operation as the invention described in No. 45 is performed. Therefore, detailed description is omitted here.

As described above, according to this embodiment, when the operator selects the notchless process from the panel, for example, the notch is removed from the image data, and in parallel with this, the image data with the notch removed. Smoothing processing is performed on the data. Therefore, it is possible to create high-quality image data with the notch removed, and to obtain a high-quality printing result.

[0028]

As is apparent from the above description, according to the present invention, since notch removal and image data smoothing processing can be performed in parallel, high quality image data can be reproduced at high speed. There is an effect that can be done. Further, since it is possible to perform a high-speed operation only for the smoothing processing as needed, there is an effect that an operation according to a user's request can be executed.

[Brief description of drawings]

FIG. 1 is a block diagram of an essential part of the present invention.

FIG. 2 is a diagram for explaining a parallel operation of notch removal processing and smoothing processing of the present invention.

FIG. 3 is an explanatory view similar to FIG.

FIG. 4 is an explanatory diagram of a notch removal process.

FIG. 5 is a block diagram for explaining a hardware configuration of a facsimile apparatus to which the present invention is applied.

FIG. 6 is a diagram showing a specific example of a notch.

[Explanation of symbols]

1 ... First multiplexer, 2 ... 8 line buffer, 3
... second multiplexer, 4, 5, 6 ... register matrix, 7 ... third multiplexer, 8 ... notchless processing unit, 9 ... smoothing processing unit, 10 ... control circuit, 20 ... image information correction circuit.

Continuation of the front page (51) Int.Cl. ⁶ Identification number Reference number within the agency FI Technical display location G06T 5/30 5/20 8420-5L G06F 15/66 355 P 8420-5L 405 9191-5L 15/68 410 ( 72) Inventor Tomokazu Kaneko 3-7-1, Fuchu, Iwatsuki-shi, Saitama, Fuji-Zerox Co., Ltd. (72) Inori Takenori Ohara 3-7-1, Fuchu, Iwatsuki-shi, Saitama (72) Inventor Masafumi Asada 3-7-1 Fuchu, Iwatsuki City, Saitama Prefecture Fuji Xerox Co., Ltd.

Claims (2)

[Claims] 1. An image processing device for performing notch removal processing of image data and smoothing processing for the image data from which the notch has been removed, wherein {(2m + 1) + (2n + 1)} lines (where:
A line buffer capable of storing input image data of (m and n are positive integers), (2m + 1) × (2m + 1) pixels are taken out from the line buffer, and notchless processing is performed for notch removal processing for the pixel of interest. Section, means for guiding the notch-removed data to the line buffer, and (2n + 1) × (2n + 1) pixels of the notch-removed data stored in the line buffer, for the pixel of interest. An image processing apparatus comprising: means for performing a smoothing process. 2. The image processing apparatus according to claim 1, wherein when the notch removal processing is not performed, the smoothing processing is performed using the odd line data stored in the line buffer. A characteristic image processing device.