JPH0786925A - Frequency controller - Google Patents
Frequency controllerInfo
- Publication number
- JPH0786925A JPH0786925A JP5187205A JP18720593A JPH0786925A JP H0786925 A JPH0786925 A JP H0786925A JP 5187205 A JP5187205 A JP 5187205A JP 18720593 A JP18720593 A JP 18720593A JP H0786925 A JPH0786925 A JP H0786925A
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- Prior art keywords
- signal
- frequency
- control voltage
- voltage
- control
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、無線通信装置などに利
用し、周波数誤差に基づく電圧で電圧制御発振器を制御
して周波数変換又は検波用の発振信号を得るための周波
数制御装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency control device for use in a wireless communication device or the like for controlling a voltage controlled oscillator with a voltage based on a frequency error to obtain an oscillation signal for frequency conversion or detection.
【０００２】[0002]
【従来の技術】従来、この種の周波数制御装置は電圧制
御発振器から出力される基準信号の周波数と所定の一定
周波数との周波数差を検出し、この周波数差の電圧で電
圧制御発振器を制御して、所定の一定周波数を得てい
る。2. Description of the Related Art Conventionally, a frequency control device of this type detects a frequency difference between a frequency of a reference signal output from a voltage controlled oscillator and a predetermined constant frequency, and controls the voltage controlled oscillator with a voltage of this frequency difference. To obtain a predetermined constant frequency.
【０００３】図２は従来の周波数制御装置の構成を示す
ブロック図である。図２において、この例は図示しない
アンテナなどからの受信信号Ｓ１を基準信号Ｓ３を用い
て復調した復調信号Ｓ２を出力する受信部２と、受信部
２からの中間周波数などの信号Ｓ４と内部で生成した基
準周波数信号とを比較して周波数差を検出し、この検出
した周波数差の制御電圧を出力する周波数差検出回路５
とを有している。さらに、制御電圧に減衰係数信号Ｓ５
の減衰係数を乗じて所定の制御電圧を生成する制御電圧
生成部７と、この制御電圧生成部７からの制御電圧で所
定の一定周波数で発振して基準信号Ｓ３を出力する電圧
制御発振器（ＶＣＯ）９とを有している。FIG. 2 is a block diagram showing the configuration of a conventional frequency control device. In FIG. 2, in this example, a reception unit 2 that outputs a demodulation signal S2 obtained by demodulating a reception signal S1 from an antenna (not shown) using a reference signal S3, and a signal S4 such as an intermediate frequency from the reception unit 2 are internally generated. A frequency difference detection circuit 5 for detecting a frequency difference by comparing with the generated reference frequency signal and outputting a control voltage of the detected frequency difference.
And have. Furthermore, the damping voltage signal S5
A control voltage generator 7 for generating a predetermined control voltage by multiplying the attenuation coefficient by a voltage control oscillator (VCO) that oscillates at a predetermined constant frequency with the control voltage from the control voltage generator 7 and outputs a reference signal S3. ) 9 and.
【０００４】次に、この従来の構成における動作につい
て説明する。受信信号Ｓ１が受信部２で復調されて復調
信号Ｓ２が出力される。この復調を行う場合、受信部２
では中間周波数への周波数変換及び復調処理に電圧制御
発振器９から出力される基準信号Ｓ３で用いて処理され
る。Next, the operation of this conventional structure will be described. The reception signal S1 is demodulated by the reception unit 2 and the demodulation signal S2 is output. When performing this demodulation, the receiving unit 2
Then, the reference signal S3 output from the voltage controlled oscillator 9 is used for frequency conversion into an intermediate frequency and demodulation processing.
【０００５】この基準信号Ｓ３は受信部２からの復調信
号Ｓ２又は中間周波数波などの信号Ｓ４と、内部で生成
した基準周波数信号とを周波数差検出回路５で比較して
周波数差を検出し、この検出した周波数差の制御電圧に
よって電圧制御発振器９を制御して所定の一定周波数の
基準信号Ｓ３を得ている。ここで周波数差検出回路５か
らの制御電圧は制御電圧生成部７で減衰係数信号Ｓ５の
減衰係数を乗じて電圧制御発振器９の図示しない電圧制
御端に適切な電圧に生成して印加される。The reference signal S3 is compared with a demodulated signal S2 from the receiving section 2 or a signal S4 such as an intermediate frequency wave and a reference frequency signal generated internally by a frequency difference detection circuit 5 to detect a frequency difference, The voltage controlled oscillator 9 is controlled by the detected control voltage of the frequency difference to obtain the reference signal S3 having a predetermined constant frequency. Here, the control voltage from the frequency difference detection circuit 5 is multiplied by the attenuation coefficient of the attenuation coefficient signal S5 in the control voltage generation unit 7 to generate an appropriate voltage at the voltage control terminal (not shown) of the voltage controlled oscillator 9 and applied.
【０００６】図３は図２中の受信部２の詳細な構成例を
示すブロック図である。図３において、この例は局部信
号発振器３１と、周波数変換部３２と、復調部３３とを
有している。この構成では、電圧制御発振器９から出力
される基準信号Ｓ３が局部信号発振器３１に入力され
る。局部信号発振器３１はＰＬＬ（フェイズ・ロックド
・ループ）回路で構成されており、周波数変換部３２及
び復調部３３にそれぞれ必要な周波数の局発信号Ｓ７，
Ｓ８を出力する。ここで局発信号Ｓ７，Ｓ８の周波数精
度は基準信号Ｓ３の周波数精度と等しい。FIG. 3 is a block diagram showing a detailed configuration example of the receiving section 2 in FIG. In FIG. 3, this example has a local signal oscillator 31, a frequency converter 32, and a demodulator 33. In this configuration, the reference signal S3 output from the voltage controlled oscillator 9 is input to the local signal oscillator 31. The local signal oscillator 31 is composed of a PLL (Phase Locked Loop) circuit, and a local oscillator signal S7 of a frequency necessary for the frequency conversion unit 32 and the demodulation unit 33,
Outputs S8. Here, the frequency accuracy of the local signals S7 and S8 is equal to the frequency accuracy of the reference signal S3.
【０００７】図４は図２中の周波数差検出回路５におけ
る処理の一例を示すフローチャートである。図４におい
て、１シンボル時間の信号ベクトルの位相変化が常に等
しくなるような信号系列で変調された周波数差検出のた
めの信号を受信し、局発信号で直交復調して得られる信
号ベクトル（Ｉ（ｔ），Ｑ（ｔ））（ステップ（Ｓ）１
１）の各成分をそれぞれＡ／Ｄ変換でシンボルレートと
等しいサンプリングレートでサンプルし、信号ベクトル
（Ｉ（ｋＴ），Ｑ（ｋＴ）（ｋ＝０〜Ｎ−１）を得る
（ステップ１２）。FIG. 4 is a flow chart showing an example of processing in the frequency difference detection circuit 5 in FIG. In FIG. 4, a signal vector (I) obtained by receiving a signal for frequency difference detection modulated by a signal sequence such that the phase change of the signal vector in one symbol time is always equal and performing quadrature demodulation with the local signal (T), Q (t)) (step (S) 1
Each component of 1) is sampled by A / D conversion at a sampling rate equal to the symbol rate to obtain a signal vector (I (kT), Q (kT) (k = 0 to N-1) (step 12).
【０００８】サンプルした信号ベクトル（Ｉ（ｋＴ），
Ｑ（ｋＴ））を理想的な局発信号で直交検波して得られ
る信号ベクトル（Ｉ0 （ｋＴ），Ｑ0 （ｋＴ））の位相
角φ0 （ｋＴ）だけ反対方向に回転させて、（ＩR （ｋ
Ｔ），ＱR （ｋＴ））とする。ベクトル（Ｉ（ｋＴ），
Ｑ（ｋＴ））、（Ｉ0 （ｋＴ），Ｑ0 （ｋＴ））、（Ｉ
R （ｋＴ），ＱR （ｋＴ））のそれぞれの位相角φ（ｋ
Ｔ）、φ0 （ｋＴ）、φR （ｋＴ）は次式（１）（２）
（３）（４）で定義される。The sampled signal vector (I (kT),
Q (kT)) is rotated in the opposite direction by the phase angle φ 0 (kT) of the signal vector (I 0 (kT), Q 0 (kT)) obtained by quadrature detection with an ideal local oscillation signal, and ( I R (k
T), and Q R (kT)). Vector (I (kT),
Q (kT)), (I 0 (kT), Q 0 (kT)), (I
R (kT), each of the phase angle of the Q R (kT)) φ ( k
T), φ 0 (kT), and φ R (kT) are expressed by the following equations (1) and (2).
(3) Defined in (4).
【０００９】｜ｒ（ｋＴ）｜、｜ｒ0 （ｋＴ）｜、｜ｒ
R （ｋＴ）｜はそれぞれのベクトルの長さであり、｜ｒ
（ｋＴ）｜＝｜ｒR （ｋＴ）｜である。ベクトル（ＩR
（ｋＴ），ＱR （ｋＴ））が次式（４）を用いて計算さ
れる（ステップ１３）。│r (kT) │, │r 0 (kT) │, │r
R (kT) | is the length of each vector, and | r
(KT) | = | r R (kT) |. Vector (I R
(KT), Q R (kT)) is calculated using the following formula (4) (step 13).
【００１０】[0010]
【数１】 [Equation 1]
【数２】 [Equation 2]
【数３】 [Equation 3]
【数４】 [Equation 4]
【００１１】局発信号の周波数と理想的な局発信号の周
波数との間に差があれば、回転後のサンプルしたベクト
ル（ＩR （ｋＴ），ＱR （ｋＴ））の位相が変化する。
ｔが（ｋＴ）ｔからｋＴに変化したときの位相の変化θ
k はθk ＝φ（ｋＴ）−φ（ｋ−１）Ｔ）であり、θk
の正弦ｓｉｎθk は次式（５）で表される。If there is a difference between the frequency of the local oscillator signal and the frequency of the ideal local oscillator signal, the phase of the sampled vector (I R (kT), Q R (kT)) after rotation changes. .
Phase change θ when t changes from (kT) t to kT
k is θ k = φ (kT) −φ (k−1) T), and θ k
The sine sin θ k of is expressed by the following equation (5).
【００１２】[0012]
【数５】 [Equation 5]
【００１３】これは、｜ｒR （ｋ−１）Ｔ）｜と｜ｒR
（ｋＴ）｜がほぼ等しいとみなせ、またθk が小さいと
きはθk とｓｉｎθk がほぼ等しいとみなせるので位相
の変化θk は次式（６）で表される。This is │r R (k-1) T) │ and │r R
Since (kT) | can be regarded as substantially equal, and when θ k is small, θ k and sin θ k can be regarded as substantially equal, so the phase change θ k is expressed by the following equation (6).
【００１４】[0014]
【数６】 [Equation 6]
【００１５】この式（６）によりθk を計算する（ステ
ップ１４）。位相の基準の１シンボルあたりの回転量の
平均θAVG は次式（７）で表される。Θ k is calculated by this equation (6) (step 14). The average θ AVG of the rotation amount per one symbol of the phase reference is expressed by the following equation (7).
【００１６】[0016]
【数７】 [Equation 7]
【００１７】このθAVG を求め（ステップ１５）、θ
AVG ／２π［ｒａｄ／２π］をＴ（１シンボル時間）
［ｓｅｃ］で除算することにより、局発信号の周波数と
理想的な局発信号の周波数差が求められる（ステップ１
６）。This θ AVG is calculated (step 15), and θ
AVG / 2π [rad / 2π] is T (1 symbol time)
By dividing by [sec], the frequency difference between the local oscillator signal and the ideal local oscillator signal is obtained (step 1
6).
【００１８】この処理手順において、周波数差検出用信
号は１シンボル時間の信号ベクトルの位相変化が常に等
しくなるような信号系列で変調された信号である。この
ような信号系列であればシンボルに対してサンプリング
・クロックの同期をとる必要がないためであり、例え
ば、ＭＳＫ変調波の場合、全て「１」又は全て「０」で
ある系列であり、このときの位相変化Δφ0 はそれぞれ
π／２あるいは−π／２となる。ＧＭＳＫ変調波につい
ても同様である。なお周波数差検出は電圧制御発振器の
出力が定常状態の場合に行う。In this processing procedure, the frequency difference detection signal is a signal modulated by a signal series such that the phase changes of the signal vector in one symbol time are always equal. This is because it is not necessary to synchronize the sampling clock with the symbol in such a signal sequence. For example, in the case of the MSK modulated wave, the sequence is all "1" or all "0". At this time, the phase change Δφ 0 becomes π / 2 or −π / 2, respectively. The same applies to the GMSK modulated wave. The frequency difference is detected when the output of the voltage controlled oscillator is in a steady state.
【００１９】図２に示す回路の制御値処理では周波数差
の値を用いて制御値が計算される。制御値は、制御値処
理に与えられる減衰係数Ｄを周波数差値に乗じ、前の制
御値に加えることにより得られる。すなわち、（新しい
制御値）＝（前制御値）＋（減衰係数）×（周波数差
値）で得られる。ここで減衰係数Ｄは基準信号の周波数
が発散又は変化しない値であり、また収束速度が速くな
る値である。また制御値の初期値は適当な値に設定す
る。このようにして得られた制御値はＤ／Ａ変換によっ
て電圧に変換される。このような周波数差検出及び制御
値処理を行う数値処理部分はディジタル・シグナル・プ
ロセッサ（ＤＳＰ）で実現できる。In the control value processing of the circuit shown in FIG. 2, the control value is calculated using the value of the frequency difference. The control value is obtained by multiplying the frequency difference value by the damping coefficient D given to the control value processing and adding it to the previous control value. That is, (new control value) = (previous control value) + (attenuation coefficient) × (frequency difference value). Here, the attenuation coefficient D is a value at which the frequency of the reference signal does not diverge or change, and the convergence speed is fast. Moreover, the initial value of the control value is set to an appropriate value. The control value thus obtained is converted into a voltage by D / A conversion. The numerical processing part for performing such frequency difference detection and control value processing can be realized by a digital signal processor (DSP).
【００２０】図５は図２中の電圧制御発振器９の制御電
圧対出力信号周波数の特性を示す図である。例えば、周
波数差検出回路５において所定周波数に対して基準信号
Ｓ３の周波数が高いときに負の周波数差値が与えられ、
Ｄ／Ａ変換において制御値が小さいときに電圧を低く
し、制御値が大きいときに電圧を高くする変換を行って
電圧制御発振器９において制御電圧が高いほど出力周波
数が高く、また制御電圧が低いほど出力周波数が低くな
るように構成する場合に、理想的な周波数に対して基準
信号の周波数が高い場合に周波数制御を行った後に基準
信号の周波数が低くなる。FIG. 5 is a diagram showing the characteristic of the control voltage versus the output signal frequency of the voltage controlled oscillator 9 in FIG. For example, in the frequency difference detection circuit 5, a negative frequency difference value is given when the frequency of the reference signal S3 is higher than the predetermined frequency,
In the D / A conversion, the voltage is lowered when the control value is small, and the voltage is raised when the control value is large. In the voltage controlled oscillator 9, the higher the control voltage is, the higher the output frequency is, and the lower the control voltage is. In the case where the output frequency is lower, the frequency of the reference signal becomes lower after performing frequency control when the frequency of the reference signal is higher than the ideal frequency.
【００２１】図６は周波数制御により電圧制御発振器の
出力周波数の変化状態を示す図であり、図中の矢印時点
で周波数制御を行うものである。FIG. 6 is a diagram showing a change state of the output frequency of the voltage controlled oscillator by frequency control, and the frequency control is performed at the time point of the arrow in the figure.
【００２２】この種の提案として特開昭５９ー０３０３
１０号公報に開示される「自走周波数安定化回路を有す
る自動位相同期装置」があり、この公報の例では、入力
信号のレベルが基準電圧よりも高い場合の信号を制御回
路に入力して、交流信号発生器の交流信号を相加回路に
入力するのを停止している。As a proposal of this kind, JP-A-59-0303
There is an "automatic phase synchronizer having a free-running frequency stabilizing circuit" disclosed in Japanese Patent No. 10, and in the example of this publication, a signal when the level of an input signal is higher than a reference voltage is input to a control circuit. The input of the AC signal of the AC signal generator to the adder circuit is stopped.
【００２３】[0023]
【発明が解決しようとする課題】しかしながら、上述し
た従来の周波数制御装置では、電圧制御発振器から出力
される基準信号の周波数と所定の一定周波数との周波数
差を検出し、この周波数差の制御電圧によって電圧制御
発振器を制御して、所定の一定周波数を得ており、入力
信号のレベルが低い場合の周波数差の誤差値が大きく、
この誤差値に基づく制御電圧の変化も大きくなる。した
がって、発振信号を所定の一定周波数における許容誤差
内に迅速に収束できない欠点がある。However, in the above-mentioned conventional frequency control device, the frequency difference between the frequency of the reference signal output from the voltage controlled oscillator and the predetermined constant frequency is detected, and the control voltage of this frequency difference is detected. The voltage controlled oscillator is controlled by to obtain a predetermined constant frequency, and the error value of the frequency difference is large when the level of the input signal is low,
The change in the control voltage based on this error value also becomes large. Therefore, there is a drawback that the oscillation signal cannot be swiftly converged within the tolerance within a predetermined constant frequency.
【００２４】また公報の例は発振器が入力信号の中心周
波数に近い発振周波数を出力できるが、制御回路などを
必要とし、信号処理規模及び装置規模が複雑であり、そ
の改善の余地がある。In the example of the publication, the oscillator can output an oscillation frequency close to the center frequency of the input signal, but it requires a control circuit and the like, the signal processing scale and the device scale are complicated, and there is room for improvement.
【００２５】本発明は、上述した事情にかんがみてなさ
れたものであり、入力信号レベルが低く周波数差の誤差
値が大きい場合に、この誤差値に基づく制御電圧の変化
が小さくなって、発振信号を所定の一定周波数の許容誤
差内に迅速に収束できる周波数制御装置の提供を目的と
する。The present invention has been made in consideration of the above-mentioned circumstances. When the input signal level is low and the error value of the frequency difference is large, the change of the control voltage based on this error value becomes small, and the oscillation signal is reduced. It is an object of the present invention to provide a frequency control device capable of quickly converging within a predetermined constant frequency tolerance.
【００２６】[0026]
【課題を解決するための手段】上記目的を達成するため
に、本発明の周波数制御装置は、入力信号のレベルに対
応した入力レベル信号を出力する受信手段と、入力レベ
ル信号と基準周波数信号との周波数差を示す制御電圧を
出力する周波数差検出手段と、制御電圧に減衰係数を乗
じる制御電圧減衰手段と、制御電圧減衰手段からの制御
電圧に基づいて所定周波数で発振した基準信号を出力す
る電圧制御発振手段と、しきい値と入力レベル信号とを
比較し、この比較で入力レベル信号がしきい値より高い
場合に複数の減衰係数中における大きい減衰係数を選択
し、かつ、入力レベル信号がレベルがしきい値より低い
場合に小さな減衰係数を選択した減衰係数信号を制御電
圧減衰手段に出力する比較選択手段とを備える構成とし
ている。In order to achieve the above object, the frequency control device of the present invention comprises a receiving means for outputting an input level signal corresponding to the level of the input signal, an input level signal and a reference frequency signal. Frequency difference detecting means for outputting a control voltage indicating the frequency difference, a control voltage attenuating means for multiplying the control voltage by an attenuation coefficient, and a reference signal oscillated at a predetermined frequency based on the control voltage from the control voltage attenuating means. The voltage-controlled oscillation means is compared with the threshold value and the input level signal, and when the input level signal is higher than the threshold value in this comparison, a large attenuation coefficient among a plurality of attenuation coefficients is selected, and the input level signal is selected. When the level is lower than the threshold value, the comparison selection means for outputting the attenuation coefficient signal with the selected small attenuation coefficient to the control voltage attenuation means is provided.
【００２７】また比較選択手段は、予め設定されるしき
い値と入力レベル信号レベルとを比較する比較手段と、
比較手段での比較で入力レベル信号のレベルがしきい値
より高い場合に大きい減衰係数を選択し、かつ、入力レ
ベル信号がレベルがしきい値より低い場合に小さな減衰
係数を選択した減衰係数信号を制御電圧減衰手段に出力
する選択手段とを備える構成としてある。The comparison / selection means includes a comparison means for comparing a preset threshold value with an input level signal level,
An attenuation coefficient signal in which a large attenuation coefficient is selected when the level of the input level signal is higher than the threshold value by the comparison means and a small attenuation coefficient is selected when the level of the input level signal is lower than the threshold value. Is output to the control voltage attenuating means.
【００２８】さらに、受信手段は高周波を受信し、周波
数変換して入力信号のレベルに対応した中間周波数信号
を出力する変換手段と、中間周波数信号を復調する復調
手段とを備える構成としてある。Further, the receiving means is configured to include a converting means for receiving a high frequency, converting the frequency and outputting an intermediate frequency signal corresponding to the level of the input signal, and a demodulating means for demodulating the intermediate frequency signal.
【００２９】[0029]
【作用】上記構成からなる本発明の周波数制御装置は、
入力信号のレベルが低く周波数差検出手段からの周波数
差の誤差値が大きい場合にも、この誤差値に基づいて制
御電圧生成手段からの制御電圧に小さな減衰係数が乗算
されて、その変化が小さな制御電圧が電圧制御発振手段
に印加される。したがって、発振信号が所定の一定周波
数の許容誤差内に迅速に収束する。The frequency control device of the present invention having the above structure is
Even when the level of the input signal is low and the error value of the frequency difference from the frequency difference detecting means is large, the control voltage from the control voltage generating means is multiplied by the small attenuation coefficient based on this error value, and the change is small. A control voltage is applied to the voltage controlled oscillator. Therefore, the oscillation signal quickly converges within a predetermined constant frequency tolerance.
【００３０】[0030]
【実施例】次に、本発明の周波数制御装置の実施例につ
いて図面を参照しながら説明する。図１は本発明の周波
数制御装置の実施例の構成を示すブロック図である。図
１において、この例は図示しないアンテナなどからの受
信信号Ｓ１１を基準信号Ｓ１３で用いて復調した復調信
号Ｓ１２を出力する受信部１２と、受信部１２からの中
間周波数などの信号Ｓ１４と内部で生成した基準周波数
信号とを比較して、その周波数差を検出した周波数差の
制御電圧を出力する周波数差検出回路１５とを有してい
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the frequency control device of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of the frequency control device of the present invention. In FIG. 1, in this example, a reception unit 12 which outputs a demodulation signal S12 obtained by demodulating a reception signal S11 from an antenna (not shown) using a reference signal S13, and a signal S14 such as an intermediate frequency from the reception unit 12 are internally generated. The frequency difference detection circuit 15 compares the generated reference frequency signal and outputs the control voltage of the frequency difference obtained by detecting the frequency difference.
【００３１】さらに、制御電圧に減衰係数信号Ｓ１５に
おける減衰係数を乗じて所定の制御電圧値に生成する制
御電圧生成部１７と、この制御電圧生成部１７からの制
御電圧Ｓ１７に基づいて一定周波数で発振して基準信号
Ｓ１３を出力する電圧制御発振器（ＶＣＯ）１９と、さ
らに、設定されるしきい値レベルＳ１９と入力レベル信
号Ｓ１８とのレベルを比較し、その比較信号を出力する
比較器２１とを有している。さらに、この比較器２１で
の比較で入力レベル信号Ｓ１８がしきい値レベルＳ１９
より高い場合に大きい減衰係数ＳＤ１を選択し、また入
力レベル信号Ｓ１８がしきい値レベルＳ１９より低い場
合に小さな減衰係数ＳＤ２を選択した減衰係数信号Ｓ１
５を出力するスイッチ２２を有している。Further, the control voltage generator 17 for multiplying the control voltage by the attenuation coefficient in the attenuation coefficient signal S15 to generate a predetermined control voltage value, and a constant frequency based on the control voltage S17 from the control voltage generator 17. A voltage controlled oscillator (VCO) 19 that oscillates and outputs a reference signal S13, and a comparator 21 that compares the set threshold level S19 and the input level signal S18 and outputs the comparison signal. have. Further, the comparison in the comparator 21 causes the input level signal S18 to change to the threshold level S19.
The attenuation coefficient signal S1 is selected when it is higher, and the attenuation coefficient signal S1 is selected when the input level signal S18 is lower than the threshold level S19.
It has a switch 22 for outputting 5.
【００３２】次に、この実施例の構成における動作につ
いて説明する。受信信号Ｓ１１が受信部１２で復調され
て復調信号Ｓ１２が出力される。この復調を行う場合、
受信部１２では、中間周波数への周波数変換及び復調処
理に電圧制御発振器１９から出力される基準信号Ｓ１３
で用いて処理される。Next, the operation of the configuration of this embodiment will be described. The reception signal S11 is demodulated by the reception unit 12 and the demodulation signal S12 is output. When performing this demodulation,
In the receiving unit 12, the reference signal S13 output from the voltage controlled oscillator 19 for frequency conversion into an intermediate frequency and demodulation processing.
Used in.
【００３３】この基準信号Ｓ１３は受信部１２からの復
調信号Ｓ１２又は中間周波などの信号Ｓ１４と内部で生
成した基準周波数信号とを周波数差検出回路１５で比較
し、その周波数差を検出した制御電圧によって電圧制御
発振器１９を制御し、所定の一定周波数の基準信号Ｓ１
３を得ている。ここで周波数差検出回路１５からの制御
電圧は制御電圧生成部１７に入力され、この制御電圧生
成部１７ではスイッチ２２からの減衰係数信号Ｓ１５に
おける減衰係数ＳＤ１又は減衰係数ＳＤ２を制御電圧に
乗じる。この減衰係数ＳＤ１又は減衰係数ＳＤ２を乗じ
た制御電圧Ｓ１７が電圧制御発振器１９の図示しない電
圧制御端に印加される。The reference signal S13 is obtained by comparing the demodulated signal S12 from the receiver 12 or the signal S14 such as an intermediate frequency with an internally generated reference frequency signal in the frequency difference detection circuit 15 and detecting the frequency difference. The voltage controlled oscillator 19 is controlled by the reference signal S1 having a predetermined constant frequency.
I got 3. Here, the control voltage from the frequency difference detection circuit 15 is input to the control voltage generation unit 17, and the control voltage generation unit 17 multiplies the control voltage by the attenuation coefficient SD1 or the attenuation coefficient SD2 in the attenuation coefficient signal S15 from the switch 22. A control voltage S17 multiplied by the damping coefficient SD1 or the damping coefficient SD2 is applied to a voltage control terminal (not shown) of the voltage controlled oscillator 19.
【００３４】また、受信部１２からは受信信号Ｓ１１の
入力レベルに対応した信号を出力する。例えば、受信部
１２が無線電波を受信して周波数変換した中間周波信号
を包絡線検波して得られる電界強度に対応した入力レベ
ル信号Ｓ１８を出力する。この入力レベル信号Ｓ１８が
比較器２１に入力される。比較器２１では、外部から設
定されるしきい値レベルＳ１９と入力レベル信号Ｓ１８
とが比較される。Further, the receiving section 12 outputs a signal corresponding to the input level of the received signal S11. For example, the receiving unit 12 outputs the input level signal S18 corresponding to the electric field strength obtained by envelope detection of the intermediate frequency signal obtained by receiving the radio wave and frequency-converting it. The input level signal S18 is input to the comparator 21. The comparator 21 has a threshold level S19 and an input level signal S18 which are set from the outside.
And are compared.
【００３５】この比較で入力レベル信号Ｓ１８がしきい
値レベルＳ１９より高い場合、すなわち、電界強度が大
きく安定したレベルの受信信号Ｓ１１が得られる場合
は、スイッチ２２で大きい減衰係数ＳＤ１を選択する。
また、入力レベル信号Ｓ１８がしきい値レベルＳ１９よ
り低い場合、すなわち、電界強度が低く不安定なレベル
の受信信号Ｓ１１が受信部１２から出力された場合、ス
イッチ２２で小さな減衰係数ＳＤ２を選択する。In this comparison, when the input level signal S18 is higher than the threshold level S19, that is, when the received signal S11 having a large electric field strength and a stable level is obtained, the switch 22 selects the large attenuation coefficient SD1.
When the input level signal S18 is lower than the threshold level S19, that is, when the reception signal S11 having a low electric field strength and an unstable level is output from the reception unit 12, the switch 22 selects the small attenuation coefficient SD2. .
【００３６】この減衰係数ＳＤ１又は減衰係数ＳＤ２で
ある減衰係数信号Ｓ１５が制御電圧生成部１７に供給さ
れ、この減衰係数信号Ｓ１５における減衰係数ＳＤ１，
ＳＤ２を乗じた制御電圧Ｓ１７が電圧制御発振器１９の
図示しない電圧制御端に印加される。したがって、受信
信号Ｓ１１のレベルが低く周波数差検出回路１５から周
波数差の誤差値が大きい場合にも、この誤差値に基づい
て制御電圧生成部１７からの制御電圧に小さな減衰係数
ＳＤ２が乗算されるため、その変化が小さな制御電圧Ｓ
１７が電圧制御発振器１９の図示しない電圧制御端に印
加されることになり、基準信号Ｓ１３が所定定周波数に
おける許容誤差内に迅速に収束される。The damping coefficient signal S15 having the damping coefficient SD1 or the damping coefficient SD2 is supplied to the control voltage generator 17, and the damping coefficient SD1 in the damping coefficient signal S15 is supplied.
The control voltage S17 multiplied by SD2 is applied to a voltage control terminal (not shown) of the voltage controlled oscillator 19. Therefore, even when the level of the received signal S11 is low and the error value of the frequency difference from the frequency difference detection circuit 15 is large, the control voltage from the control voltage generator 17 is multiplied by the small attenuation coefficient SD2 based on this error value. Therefore, the control voltage S whose change is small
17 is applied to the voltage control end (not shown) of the voltage controlled oscillator 19, so that the reference signal S13 is quickly converged within the allowable error at the predetermined constant frequency.
【００３７】[0037]
【発明の効果】以上説明したように、本発明の周波数制
御装置は入力信号のレベルが低く周波数差検出手段から
の周波数差の誤差値が大きい場合に、この誤差値に基づ
いて制御電圧生成手段からの制御電圧に小さな減衰係数
が乗算されて、その変化が小さな制御電圧が電圧制御発
振手段に印加されるため、発振信号を所定の一定周波数
の許容誤差内に迅速に収束できるという効果を有する。As described above, in the frequency control device of the present invention, when the level of the input signal is low and the error value of the frequency difference from the frequency difference detecting means is large, the control voltage generating means is based on this error value. Since the control voltage from V is multiplied by a small damping coefficient and the control voltage with a small change is applied to the voltage controlled oscillating means, there is an effect that the oscillation signal can be quickly converged within a predetermined constant frequency tolerance. .
【図１】本発明の周波数制御装置の実施例における構成
を示すブロック図である。FIG. 1 is a block diagram showing a configuration in an embodiment of a frequency control device of the present invention.
【図２】従来の周波数制御装置の構成を示すブロック図
である。FIG. 2 is a block diagram showing a configuration of a conventional frequency control device.
【図３】図２中の受信部の詳細な構成例を示すブロック
図である。FIG. 3 is a block diagram showing a detailed configuration example of a receiving unit in FIG.
【図４】図２中の周波数差検出回路における処理手順を
示すフローチャートである。4 is a flowchart showing a processing procedure in the frequency difference detection circuit in FIG.
【図５】図２中の電圧制御発振器の制御電圧対出力信号
周波数の特性を示す図である。5 is a diagram showing characteristics of control voltage vs. output signal frequency of the voltage controlled oscillator in FIG.
【図６】周波数制御により電圧制御発振器の出力周波数
の変化状態を示す図である。FIG. 6 is a diagram showing a change state of an output frequency of a voltage controlled oscillator by frequency control.
１２ 受信部 １５ 周波数差検出回路 １７ 制御電圧生成部 １９ 電圧制御発振器 ２１ 比較器 ２２ スイッチ 12 receiver 15 frequency difference detection circuit 17 control voltage generator 19 voltage controlled oscillator 21 comparator 22 switch
Claims (3)
信号を出力する受信手段と、前記入力レベル信号と基準
周波数信号との周波数差を示す制御電圧を出力する周波
数差検出手段と、前記制御電圧に減衰係数を乗じる制御
電圧減衰手段と、前記制御電圧減衰手段からの制御電圧
に基づいて所定周波数で発振した前記基準信号を出力す
る電圧制御発振手段と、しきい値と前記入力レベル信号
とを比較し、この比較で前記入力レベル信号がしきい値
より高い場合に複数の減衰係数中における大きい減衰係
数を選択し、かつ、入力レベル信号がレベルがしきい値
より低い場合に小さな減衰係数を選択した前記減衰係数
信号を制御電圧減衰手段に出力する比較選択手段とを備
える周波数制御装置。1. A receiving means for outputting an input level signal corresponding to the level of an input signal, a frequency difference detecting means for outputting a control voltage indicating a frequency difference between the input level signal and a reference frequency signal, and the control voltage. A control voltage attenuating means for multiplying an attenuation coefficient, a voltage control oscillating means for outputting the reference signal oscillated at a predetermined frequency based on the control voltage from the control voltage attenuating means, a threshold value and the input level signal. In this comparison, when the input level signal is higher than the threshold value, a large attenuation coefficient among a plurality of attenuation coefficients is selected, and when the input level signal is lower than the threshold value, a small attenuation coefficient is selected. A frequency control device comprising: a comparison / selection unit that outputs the selected attenuation coefficient signal to a control voltage attenuation unit.
値と入力レベル信号レベルとを比較する比較手段と、前
記比較手段での比較で前記入力レベル信号のレベルがし
きい値より高い場合に大きい減衰係数を選択し、かつ、
入力レベル信号のレベルがしきい値より低い場合に小さ
な減衰係数を選択した前記減衰係数信号を制御電圧減衰
手段に出力する選択手段とを備えることを特徴とする請
求項１記載の周波数制御装置。2. The comparison and selection means compares the preset threshold value with an input level signal level, and the comparison means compares the input level signal with a level higher than the threshold value. Choose a large damping factor for
2. The frequency control device according to claim 1, further comprising: a selection unit that outputs the attenuation coefficient signal that selects a small attenuation coefficient to the control voltage attenuation unit when the level of the input level signal is lower than the threshold value.
して入力信号のレベルに対応した中間周波数信号を出力
する変換手段と、前記中間周波数信号を復調する復調手
段とを備えることを特徴とする請求項１記載の周波数制
御装置。3. The receiving means comprises a converting means for receiving a high frequency, converting the frequency and outputting an intermediate frequency signal corresponding to the level of the input signal, and a demodulating means for demodulating the intermediate frequency signal. The frequency control device according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5187205A JPH0786925A (en) | 1993-06-30 | 1993-06-30 | Frequency controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5187205A JPH0786925A (en) | 1993-06-30 | 1993-06-30 | Frequency controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0786925A true JPH0786925A (en) | 1995-03-31 |
Family
ID=16201934
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5187205A Pending JPH0786925A (en) | 1993-06-30 | 1993-06-30 | Frequency controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0786925A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002039634A1 (en) * | 2000-11-07 | 2002-05-16 | Matsushita Electric Industrial Co., Ltd. | Receiver apparatus and method for controlling reference frequency in the receiver apparatus |
| WO2007114054A1 (en) * | 2006-03-31 | 2007-10-11 | Nihon Dempa Kogyo Co., Ltd. | Frequency synthesizer |
| JP2007295537A (en) * | 2006-03-31 | 2007-11-08 | Nippon Dempa Kogyo Co Ltd | Frequency synthesizer |
| WO2008126168A1 (en) * | 2007-03-06 | 2008-10-23 | Nihon Dempa Kogyo Co., Ltd. | Frequency synthesizer |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02222343A (en) * | 1989-02-23 | 1990-09-05 | Japan Radio Co Ltd | Afc system |
| JPH03104454A (en) * | 1989-09-19 | 1991-05-01 | Japan Radio Co Ltd | Demodulator |
-
1993
- 1993-06-30 JP JP5187205A patent/JPH0786925A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02222343A (en) * | 1989-02-23 | 1990-09-05 | Japan Radio Co Ltd | Afc system |
| JPH03104454A (en) * | 1989-09-19 | 1991-05-01 | Japan Radio Co Ltd | Demodulator |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002039634A1 (en) * | 2000-11-07 | 2002-05-16 | Matsushita Electric Industrial Co., Ltd. | Receiver apparatus and method for controlling reference frequency in the receiver apparatus |
| WO2007114054A1 (en) * | 2006-03-31 | 2007-10-11 | Nihon Dempa Kogyo Co., Ltd. | Frequency synthesizer |
| JP2007295537A (en) * | 2006-03-31 | 2007-11-08 | Nippon Dempa Kogyo Co Ltd | Frequency synthesizer |
| US7825701B2 (en) | 2006-03-31 | 2010-11-02 | Nihon Dempa Kogyo Co., Ltd. | Frequency synthesizer |
| US7888974B2 (en) | 2006-03-31 | 2011-02-15 | Nihon Dempa Kogyo Co. . Ltd. | Frequency synthesizer |
| WO2008126168A1 (en) * | 2007-03-06 | 2008-10-23 | Nihon Dempa Kogyo Co., Ltd. | Frequency synthesizer |
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