JPH0783029B2 - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH0783029B2
JPH0783029B2 JP26216786A JP26216786A JPH0783029B2 JP H0783029 B2 JPH0783029 B2 JP H0783029B2 JP 26216786 A JP26216786 A JP 26216786A JP 26216786 A JP26216786 A JP 26216786A JP H0783029 B2 JPH0783029 B2 JP H0783029B2
Authority
JP
Japan
Prior art keywords
semiconductor thin
compound semiconductor
superlattice structure
thin film
electron
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP26216786A
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Japanese (ja)
Other versions
JPS63115385A (en
Inventor
晃 石橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
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Priority to JP26216786A priority Critical patent/JPH0783029B2/en
Publication of JPS63115385A publication Critical patent/JPS63115385A/en
Publication of JPH0783029B2 publication Critical patent/JPH0783029B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は特に同位元素の重ね合わせによる超格子構造を
キャリア走行領域とする新規な半導体装置に関わる。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a novel semiconductor device having a carrier traveling region of a superlattice structure formed by superposition of isotopes.

〔発明の概要〕[Outline of Invention]

本発明は互いに同一構成元素によるも、その構成元素の
対応する少くとも1の元素として原子番号が同一で質量
数を異にする同位元素が用いられた複数種の化合物半導
体薄膜の周期的積層によるいわば化学的にはホモ接合な
がら質量数上はヘテロ接合の重ね合わせによる超格子構
造のキャリア走行領域を構成し、その超格子構造により
LOフォノン(縦光学フォノン)を閉じ込め、キャリア格
子相互作用を変調することができると同時に超格子構造
部の各化合物半導体薄膜の化学的特性の一様化によって
結晶純度をより高めるなど、異種の化合物半導体薄膜の
積層による超格子構造における諸問題の解消を図る。
The present invention is based on the periodic stacking of a plurality of kinds of compound semiconductor thin films using the same constituent element but the isotopes having the same atomic number and different mass numbers as at least one corresponding element of the constituent elements. In a sense, it is chemically homojunction, but in terms of mass number, it forms a carrier traveling region of superlattice structure by superposition of heterojunctions.
Heterogeneous compounds, such as LO phonons (longitudinal optical phonons) can be confined and carrier lattice interactions can be modulated, and at the same time the crystal purity can be further improved by homogenizing the chemical properties of each compound semiconductor thin film in the superlattice structure. To solve various problems in superlattice structure by stacking semiconductor thin films.

〔従来の技術〕[Conventional technology]

近時、とみに化合物半導体薄膜例えばGaAs化合物半導体
薄膜と異種のAlAs化合物半導体薄膜との繰り返し積層に
よる超格子構造を用いた各種半導体装置の開発が試みら
れている。
Recently, various semiconductor devices using a superlattice structure by repeatedly stacking a compound semiconductor thin film, for example, a GaAs compound semiconductor thin film and a different AlAs compound semiconductor thin film have been attempted.

この種の超格子構造による半導体層は、LOフォノンを閉
じ込めてキャリア(例えば電子)−格子相互作用の変調
によって例えばキャリアの移動度の向上を図るなど物性
的に種々の性質を引き出すことができることによって各
種半導体装置への適用が期待される。しかしながら、こ
の種異種物質による化合物半導体薄膜の超格子構造にお
いては、各化合物半導体薄膜の化学的活性の相違等によ
って一方の物質薄膜に不純物が多く取り込まれることに
よる結晶の純度の問題や各化合物半導体薄膜間のヘテロ
接合面の不整合など化学的及び物性的性質の変化という
副次的作用の発生によって実際上キャリア−格子相互作
用の変調のみを純粋に取り出し得ないという問題点があ
る。
A semiconductor layer having this type of superlattice structure can bring out various physical properties such as confining LO phonons and modulating carrier (for example, electron) -lattice interaction to improve carrier mobility. It is expected to be applied to various semiconductor devices. However, in the superlattice structure of the compound semiconductor thin film formed by this kind of different substances, the crystal purity problem due to a large amount of impurities being taken into one of the compound semiconductor thin films due to the difference in the chemical activity of each compound semiconductor thin film or the compound semiconductor thin film. There is a problem in that only the modulation of carrier-lattice interaction cannot be practically taken out due to the occurrence of a side effect such as a change in chemical and physical properties such as a mismatch of a heterojunction surface between thin films.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

本発明は、上述した超格子構造を有する半導体装置にお
いて、異種物質による化合物半導体薄膜の周期的積層に
よる超格子構造における諸問題を解決し、高速動作半導
体装置例えば各種電界効果トランジスタ(FET)、ホッ
トエレクトロントランジスタ(HET)、ヘテロ接合型バ
イポーラトランジスタ(HBT)等に適用して好適な半導
体装置を提供する。
The present invention solves various problems in a superlattice structure due to periodic stacking of compound semiconductor thin films made of different materials in the semiconductor device having the above-mentioned superlattice structure, and enables high-speed operation semiconductor devices such as various field effect transistors (FETs) and hot transistors. A semiconductor device suitable for application to an electron transistor (HET), a heterojunction bipolar transistor (HBT), etc. is provided.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、複数種の化合物半導体薄膜の周期的積層によ
る超格子構造のキャリア走行領域を設ける。この超格子
構造を構成する各化合物半導体薄膜は互いに同位元素で
ある化合物半導体よりなる。そして、化合物半導体を構
成する原子番号の若い元素について、この質量数の小な
る同位元素を含む化合物半導体薄膜の厚さをd1とし、他
方の質量数の大きい同位元素を含む化合物半導体薄膜の
厚さをd2とするとき、 (Vsは電子の飽和速度、mは電子の有効質量、 はh/2πでhはプランク定数)に選定され、他方の化合
物半導体薄膜はその厚さd2が数原子層以下に相当する厚
さに選定する。
The present invention provides a carrier traveling region having a superlattice structure by periodically laminating a plurality of types of compound semiconductor thin films. Each compound semiconductor thin film forming this superlattice structure is made of compound semiconductors that are isotopes. Then, for the element having a small atomic number that constitutes the compound semiconductor, the thickness of the compound semiconductor thin film containing this isotope having a smaller mass number is d 1, and the thickness of the compound semiconductor thin film containing the other isotope having a larger mass number is Let d be 2 (Vs is the saturation velocity of the electron, m is the effective mass of the electron, Is selected as h / 2π and h is Planck's constant), and the thickness of the other compound semiconductor thin film is selected so that its thickness d 2 is several atomic layers or less.

〔作用〕[Action]

上述の構成による超格子構造は、複数種の化合物半導体
薄膜の周期的積層構造とするもののその各化合物半導体
薄膜の構成元素が同位元素を用いたことによって化学的
には同一特性を示し、しかも物性的には超格子構造特有
の特性すなわちLOフォノンの閉じ込めを行わしめること
ができる。
The superlattice structure having the above-described structure has a periodic laminated structure of a plurality of kinds of compound semiconductor thin films, but chemically shows the same characteristics due to the use of an isotope as a constituent element of each compound semiconductor thin film, and has physical properties. Specifically, it is possible to confine LO phonons, which is a characteristic peculiar to the superlattice structure.

これについて説明すると元素には同一原子番号でも質量
数の異なる同位元素が存在し、重い元素ほどその質量数
の幅が大きい。この同位元素の例としては例えばGa69
Ga71,Zn64〜Zn70,Se74〜Se82等を挙げることができ
る。この場合、質量数差の小さいGaの場合でもGaAsの分
散関係は第3図に示すようにGa69As75とGa71As75とでLO
ブランチにわずかなずれが生じる。第3図において横軸
はqa/π(qは波数,aは格子定数の1/2の値)を示す。
今、同位元素による超格子構造半導体層がGaAsである場
合、つまり第1の化合物半導体薄膜がGa69As75で、第2
の化合物半導体薄膜がGa71As75であって、これらが交互
に繰返えし積層されている場合について考察すると、こ
の場合Ga69As75とGa71As75のLOフォノン振動数の差は、
第3図にみられるように小さいが、各LOブランチはq=
0で全く平坦となるという性質のためにGa69As75的LOフ
ォノンはGa71As75中では1/eに減衰する減衰長(ダンピ
ングレングス)=1/K=a/0.2π4Å(Kは虚数波数で
K=0.2π/a)となる。つまり、質量数の大きい同位元
素を含む第2の化合物の半導体薄膜Ga71As75の厚さd2
これが数原子層以下に選定されればGa69As75的フォノン
は、ここで急激に減衰されることが分る。因みにこの減
衰はGaAsとAlAsとの異種物質の超格子構造におけるGaAs
的LOフォノンのAlAs中での減衰とほぼ同程度の急激さで
ある。一方、Ga71As75的LOフォノンは、Ga71As75半導体
薄膜中でこそq0であるが、Ga69As75中に入ると波数
q=0.25π/a(波長λ=8aでこれは4原子層の半導体薄
膜への閉じ込みに匹敵する)という大きい波数をもって
しまう。
Explaining this, there are isotopes having the same atomic number but different mass numbers, and the heavier the element, the broader the mass number. Examples of this isotope include Ga 69 ,
Mention may be made of Ga 71, Zn 64 ~Zn 70, Se 74 ~Se 82 or the like. In this case, the dispersion relation of GaAs is Ga 69 As 75 and Ga 71 As 75 as shown in Fig. 3 even if Ga has a small mass difference.
There is a slight misalignment in the branch. In FIG. 3, the horizontal axis represents qa / π (q is wave number, a is a value of 1/2 of lattice constant).
Now, when the isotope superlattice structure semiconductor layer is GaAs, that is, the first compound semiconductor thin film is Ga 69 As 75 , and the second compound semiconductor thin film is
Considering the case where the compound semiconductor thin film of is Ga 71 As 75 and these are alternately repeated and laminated, in this case, the difference between the LO phonon frequencies of Ga 69 As 75 and Ga 71 As 75 is
As shown in Fig. 3, each LO branch has q =
Due to the property of becoming completely flat at 0, the Ga 69 As 75- like LO phonon decays to 1 / e in Ga 71 As 75. Damping length = 1 / K = a / 0.2π4Å (K is an imaginary number) The wave number is K = 0.2π / a). In other words, if the thickness d 2 of the semiconductor thin film Ga 71 As 75 of the second compound containing the isotope with a large mass number is selected to be a few atomic layers or less, the Ga 69 As 75- like phonon will be rapidly attenuated here. I understand that it will be done. By the way, this attenuation is due to GaAs in the superlattice structure of different materials of GaAs and AlAs.
The steepness is almost the same as the attenuation of the typical LO phonon in AlAs. On the other hand, the Ga 71 As 75- like LO phonon is q0 in the Ga 71 As 75 semiconductor thin film, but when it enters Ga 69 As 75 , the wave number q = 0.25π / a (wavelength λ = 8a, which is 4 atoms). (Compared to the confinement of a layer to a semiconductor thin film)).

したがって、今例えばGa69As75的LOフォノンとGa71As75
的LOフォノンについての波動関数をそれぞれ第4図A及
びBに示すと、Ga69As75的LOフォノンはGa69As中に閉じ
込められてGa71As中にはほとんど存在せず、またGa71As
75的LOフォノンはGa71As75中でこそq0であり得る
が、Ga69As75中ではq=0.25π/aという大波数をもって
いる。
So, for example, Ga 69 As 75- like LO phonons and Ga 71 As 75
Manner respectively to that shown in Figure 4 A and B the wave function of the LO phonons, Ga 69 As 75 basis LO phonon is hardly present in the Ga 71 during As trapped in Ga 69 As, also Ga 71 As
The 75 -type LO phonon can be q0 in Ga 71 As 75 , but has a large wave number of q = 0.25π / a in Ga 69 As 75 .

このように超格子構造によってLOフォノンを局在させた
ことによってその運動量の変調、したがって電子(キャ
リア)との散乱確率を変調し、高速度半導体装置等を実
現することができることになる。
By localizing the LO phonons by the superlattice structure in this way, it is possible to realize a high-speed semiconductor device or the like by modulating the momentum and hence the probability of scattering with electrons (carriers).

すなわち、LOフォノン−電子散乱確率Wは のようにLOフォノン−電子散乱マトリクスエレメント;
MLO-e,終状態密度ρ(f)を用いて書くことができ、
このMLO-eはフォノン運動量の逆数に比例するので今、
質量数の小さいGa69As75より成る第1の化合物半導体薄
膜の厚さをd1とすると、閉じ込めによる局所的な波数ベ
クトル(=π/d1)を飽和速度に対応する運動量(=mV
s)より大きくする条件、 すなわち、 にすれば、MLO-eはバルクの時に比べ十分小さくなる。
例えばGa69As75的LOフォノンについては、 が達成され、このLOフォノンの波動関数は第4図Aで示
されるようにとりうるフォノンの運動量qが著しく制限
されるためにq=0が禁制となりMLO-eは上述の超格子
中ではバルクの時に比べ極めて小さくなる。従って、Ga
69As75的LOフォノンによる電子の散乱確率が非常に小さ
くなる。また、Ga71As75的LOフォノン散乱もGa69As75
ではq≫0のため、散乱確率は小さい。したがって、唯
一の散乱はq〜0のGa71As75的LOフォノンによるGa71As
75中での電子散乱である。ところで、d1が数原子層〜数
十原子層の範囲の値をとれるのに対しGa71As75はほぼ2
原子層で、上記のGa69As75的LOフォノンの閉じ込めを完
遂し得るので1/3d2/d11/40という比になり、超格
子構造全体の散乱確率には空間積分を行うが、d2を数原
子層以下にすることによりこの空間を通常の1/10以下に
し得るわけで、LOフォノン散乱確率がGa69As75−Ga71As
75超格子構造中ではGaAsの約1桁小さい値になり得る。
従って、電子のLOフォノンによる散乱が抑えられ電子の
高移動度が期待される。
That is, the LO phonon-electron scattering probability W is LO phonon-electron scattering matrix elements such as;
It can be written using M LO-e and final density of states ρ (f),
This M LO-e is proportional to the reciprocal of phonon momentum, so now
Assuming that the thickness of the first compound semiconductor thin film made of Ga 69 As 75 with a small mass number is d 1 , the local wave vector (= π / d 1 ) due to confinement is the momentum (= mV
s) conditions to make it larger, That is, If so, M LO-e becomes sufficiently smaller than that in bulk.
For example, for Ga 69 As 75 LO phonons, Is achieved, and this LO phonon wavefunction is forbidden at q = 0 because the possible phonon momentum q is remarkably limited as shown in Fig. 4A. M LO-e is a bulk in the above superlattice. It becomes extremely small compared to the time. Therefore, Ga
The scattering probability of electrons due to 69 As 75- like LO phonons becomes very small. In addition, Ga 71 As 75- like LO phonon scattering is q >> 0 in Ga 69 As 75 , so the scattering probability is small. Therefore, the only scattering is Ga 71 As from 75 to 75 Ga 71 As due to LO phonons.
Electron scattering in 75 . By the way, while d 1 can take values in the range of several atomic layers to several tens of atomic layers, Ga 71 As 75 is almost 2
In the atomic layer, the above Ga 69 As 75- like LO phonon confinement can be accomplished, so the ratio becomes 1 / 3d 2 / d 1 1/40, and the spatial probability is calculated for the scattering probability of the entire superlattice structure. This space can be reduced to 1/10 or less of the usual value by setting d 2 to a few atomic layers or less, and the LO phonon scattering probability is Ga 69 As 75 −Ga 71 As.
In a 75 superlattice structure, it can be about an order of magnitude smaller than GaAs.
Therefore, scattering of electrons due to LO phonons is suppressed, and high electron mobility is expected.

尚、上述の説明ではGa69As75−Ga71As75超格子構造につ
いて説明したが、他の組合せ、例えばZn64Se74−Zn70Se
82あるいはZn64Se82−Zn70Se74超格子構造においても各
LOフォノンブランチが第5図及び第6図に示すように第
3図で説明したGa69As75−Ga71As75の例と類似した特性
を示すことによって同等の作用が生じ、これら超格子構
造を用いた場合においても電子(キャリア)散乱の抑
制、したがって高い電子移動度が得られる。
In the above description, the Ga 69 As 75 -Ga 71 As 75 superlattice structure has been described, but other combinations such as Zn 64 Se 74 -Zn 70 Se.
82 or Zn 64 Se 82 −Zn 70 Se 74
As shown in FIGS. 5 and 6, the LO phonon branch exhibits similar characteristics to the Ga 69 As 75 −Ga 71 As 75 example described in FIG. Even when is used, electron (carrier) scattering can be suppressed, and thus high electron mobility can be obtained.

また、上述の超格子構造による場合、その構成半導体薄
膜が同一組成、同一元素によるものであるため化学的に
安定かつ均質、ひいては不純物の片寄りや結晶性に不都
合が生じ難くまた、各半導体薄膜間には従前の異種の薄
膜による超格子構造におけるようなヘテロバリヤが生じ
ないのでキャリア例えば電子の移送方向は超格子構造の
積層方向、したがって接合面に沿う方向であるが、これ
と直交する方向であるかは問わず、あたかも単一半導体
バルクのように扱うことができる。
In the case of the above superlattice structure, the constituent semiconductor thin films are chemically stable and homogeneous because the constituent semiconductor thin films are of the same composition and the same element, and therefore, the deviation of impurities and the crystallinity are less likely to occur, and each semiconductor thin film Since no hetero-barrier occurs in the superlattice structure due to the different kinds of thin films, the carrier, for example, the electron transport direction is the stacking direction of the superlattice structure, that is, the direction along the junction surface, but in the direction orthogonal to this. Regardless of whether it is present or not, it can be treated as if it were a single semiconductor bulk.

〔実施例〕 第1図を参照して本発明によるFETの一例を説明する。
この場合、基板(11)例えば半絶縁性のGaAs基板上にキ
ャリア走行領域となる前述した同位元素による超格子構
造半導体層(3)を形成する。この超格子構造半導体層
(3)は、例えばGa69As75で厚さd1200Åの化合物半
導体薄膜(1)とGa71As75の厚さd2が2原子層の化合物
半導体薄膜(2)とが順次交互にエピタキシャル成長さ
れてなる。これら超格子構造半導体層(3)の形成すな
わち各化合物半導体薄膜(1)及び(2)の形成は例え
ば有機金属気相成長法すなわちMOCVD法(Metal Organic
Chemical Vapor Deposition)あるいは分子線エピタキ
シーすなわちMBE法(Molecular Beam Epitaxy)によっ
て順次連続的に形成し得る。そして、この超格子構造半
導体層(3)上にショットキゲート電極Gを形成し、そ
の両側にソース電極S及びドレイン電極Dをオーミック
に被着すればショットキゲート型のFETが形成される。
この場合、ゲート電極G下において超格子構造半導体層
(3)にチャンネルすなわちキャリア例えば電子の走行
領域が形成される。そして、この場合超格子構造半導体
層(3)においてはn型もくしはp型の不純物が通常の
単一層による化合物半導体層と同様に所要の濃度をもっ
てドーピングされてnチャンネル型もしくはpチャンネ
ル型すなわち電子をキャリアとするかあるいはホールを
キャリアとするFETが構成される。
[Embodiment] An example of the FET according to the present invention will be described with reference to FIG.
In this case, a superlattice structure semiconductor layer (3) made of the above-mentioned isotope, which becomes a carrier transit region, is formed on a substrate (11), for example, a semi-insulating GaAs substrate. The superlattice structure semiconductor layer (3) is, for example, a compound semiconductor thin film (1) with Ga 69 As 75 and a thickness d 1 200 Å and a compound semiconductor thin film (2) with a thickness d 2 of Ga 71 As 75 of 2 atomic layers. And are sequentially and alternately grown epitaxially. The formation of the superlattice structure semiconductor layer (3), that is, the formation of the compound semiconductor thin films (1) and (2) is performed by, for example, a metal organic chemical vapor deposition method, that is, a MOCVD method (Metal Organic).
Chemical Vapor Deposition) or molecular beam epitaxy, that is, MBE (Molecular Beam Epitaxy). Then, a Schottky gate electrode G is formed on the superlattice structure semiconductor layer (3), and a source electrode S and a drain electrode D are ohmicly deposited on both sides thereof to form a Schottky gate type FET.
In this case, a channel, that is, a carrier, for example, an electron transit region is formed in the superlattice structure semiconductor layer (3) under the gate electrode G. Then, in this case, in the superlattice structure semiconductor layer (3), an n-type or p-type impurity is doped at a required concentration similarly to a normal single-layer compound semiconductor layer, so that the An FET that uses electrons as carriers or holes as carriers is configured.

また、第2図は本発明をダブル接合型バイポーラトラン
ジスタHBTに適用した場合である。この例においては、n
pn型のHBTを構成した場合で、この場合例えば半絶縁性
のGaAs半導体基板(11)上にn型の低比抵抗のGaAsエミ
ッタ電極取り出し層(14)をエピタキシャル成長し、こ
れの上に後述するベース層(16)との間にヘテロ型のエ
ミッタpn接合Jεを形成するバンドキャップの大なるn
型の例えばAlGaAs半導体層によるエミッタ層(15)をエ
ピタキシャル成長する。そして、このエミッタ層(15)
上に前述した同位元素の超格子構造による半導体層
(3)よりなるベース層(16)をエピタキシャル成長さ
せ、さらにこれの上にバンドキャップの大きいn型のAl
GaAsよりなるエピタキシャル層すなわちコレクタ層(1
7)とこれの上に同様のn型の例えばGaAs半導体層(1
8)をエピタキシャル成長してコレクタ層(17)とベー
ス層(16)との間にヘテロ接合型のpn接合によるコレク
タ接合Jcを形成し、さらにこれの上にn型の低比抵抗の
例えばGaAs半導体よりなるコレクタ電極取り出し層(1
9)をエピタキシャル成長する。これら各層(14)(1
5)さらにベース層(16)を構成する超格子構造半導体
層(3)の各化合物半導体薄膜、さらに層(17)(18)
(19)は連続エピタキシャルによって形成し得る。そし
て、半導体層(18)及び(17)の一部をそれぞれエッチ
ングによって除去して、ベース層(16)の一部を外部に
露出してここにベース電極Bをオーミックに被着し、さ
らに半導体層(19)(18)(17)及び(16)の一部をエ
ッチング除去してエミッタ電極取り出し層(14)の一部
を外部に露出してここにエミッタ電極Eをオーミックに
被着し、コレクタ電極取り出し層(19)にコレクタ電極
Cをオーミックに被着する。
Further, FIG. 2 shows a case where the present invention is applied to a double junction bipolar transistor HBT. In this example, n
In the case of configuring a pn type HBT, in this case, for example, an n type low resistivity GaAs emitter electrode take-out layer (14) is epitaxially grown on a semi-insulating GaAs semiconductor substrate (11), and it will be described later. N with a large band cap that forms a hetero-type emitter pn junction Jε with the base layer (16)
Epitaxially grow an emitter layer (15) of a type, for example an AlGaAs semiconductor layer. And this emitter layer (15)
A base layer (16) consisting of the semiconductor layer (3) having the above-mentioned isotope superlattice structure is epitaxially grown on the n-type Al having a large band cap.
Epitaxial layer made of GaAs, that is, collector layer (1
7) and a similar n-type GaAs semiconductor layer (1
8) is epitaxially grown to form a collector junction Jc by a heterojunction pn junction between the collector layer (17) and the base layer (16), and an n-type low specific resistance GaAs semiconductor, for example, is formed on the collector junction Jc. Collector electrode extraction layer (1
9) Epitaxially grow. Each of these layers (14) (1
5) Further, each compound semiconductor thin film of the superlattice structure semiconductor layer (3) constituting the base layer (16), and further layers (17) (18)
(19) can be formed by continuous epitaxial growth. Then, a part of the semiconductor layers (18) and (17) is removed by etching, a part of the base layer (16) is exposed to the outside, and the base electrode B is ohmically adhered to the exposed part. Part of the layers (19) (18) (17) and (16) is removed by etching to expose a part of the emitter electrode extraction layer (14) to the outside, and the emitter electrode E is ohmicly deposited there. A collector electrode C is ohmicly deposited on the collector electrode take-out layer (19).

第2図に示した例においてはnpn型のHBTに本発明を適用
した場合であるが、pnp型とすることもできる。
In the example shown in FIG. 2, the present invention is applied to an npn type HBT, but it may be a pnp type.

さらに、本発明は上述したショットキ型のFETに限らず
種々のFET、例えば2次電子ガス型FET、あるいはその他
各種々の半導体装置に適用することができる。
Furthermore, the present invention is not limited to the Schottky type FET described above, but can be applied to various FETs, for example, a secondary electron gas type FET, or other various semiconductor devices.

〔発明の効果〕〔The invention's effect〕

上述したように本発明によれば、キャリアの走行領域を
質量数について超格子構造にしたことによってLOフォノ
ンの閉じ込めを行ってキャリア−LOフォノンの相互作用
による散乱確率を小さくできることによってキャリアの
移動度の変調、すなわち例えばキャリア移動度を高める
ことができ、高速動作をなし得る半導体装置を得ること
ができるとともにまた超格子構造にするにも拘らず、そ
の各構成半導体薄膜は互いに同位元素構成としたことに
よって化学的特性を均一化できることによって各半導体
薄膜間に不整合が生じたり、有効質量が重くなるなどの
不都合が効果的に回避され、安定した特性の半導体装置
を実現できる。
As described above, according to the present invention, the mobility of carriers can be reduced by confining LO phonons by making the carrier traveling region a superlattice structure with respect to the mass number and reducing the scattering probability due to the carrier-LO phonon interaction. Modulation, that is, for example, carrier mobility can be increased, and a semiconductor device capable of high-speed operation can be obtained, and, despite having a superlattice structure, each of the constituent semiconductor thin films has an isotope composition. As a result, since the chemical characteristics can be made uniform, inconveniences such as inconsistency between the semiconductor thin films and heavy effective mass can be effectively avoided, and a semiconductor device having stable characteristics can be realized.

【図面の簡単な説明】[Brief description of drawings]

第1図及び第2図はそれぞれ本発明による半導体装置の
各例の略線的拡大断面図、第3図、第5図及び第6図は
各化合物半導体のLOフォノン分散図、第4図は波動関数
曲線図である。 (11)は半導体基板、(3)は同位元素による超格子構
造半導体層である。
1 and 2 are enlarged schematic sectional views of respective examples of the semiconductor device according to the present invention, FIGS. 3, 5, and 6 are LO phonon dispersion diagrams of respective compound semiconductors, and FIG. 4 is It is a wave function curve figure. (11) is a semiconductor substrate, and (3) is a superlattice structure semiconductor layer made of an isotope.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 29/68 29/73 29/778 29/812 H01L 29/203 29/72 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI Technical indication location H01L 29/68 29/73 29/778 29/812 H01L 29/203 29/72

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】複数種の化合物半導体薄膜の周期的積層に
よる超格子構造のキャリア走行領域を有し、 上記各化合物半導体薄膜は、互いに同位元素である化合
物半導体よりなり、 上記化合物半導体を構成する原子番号の若い元素につい
てその質量数の小なる元素を含む上記1の化合物半導体
薄膜はその厚さd1(Vsは電子の飽和速度、mは電子の有効質量、 はh/2πでhはプランク定数)に選定され、他方の質量
数の大きい同位元素を含む化合物半導体薄膜はその厚さ
d2が数原子層以下に相当する厚さに選定されてなること
を特徴とする半導体装置。
1. A carrier transit region having a superlattice structure formed by periodically laminating a plurality of types of compound semiconductor thin films, each of the compound semiconductor thin films being made of compound semiconductors that are mutually isotopes, and constituting the compound semiconductor. Regarding the compound semiconductor thin film of the above 1 which contains an element whose atomic number is young and whose mass number is small, the thickness d 1 is (Vs is the saturation velocity of the electron, m is the effective mass of the electron, Is h / 2π and h is Planck's constant), and the thickness of the compound semiconductor thin film containing the isotope with a large mass number is
A semiconductor device characterized in that d 2 is selected to have a thickness corresponding to several atomic layers or less.
JP26216786A 1986-11-04 1986-11-04 Semiconductor device Expired - Fee Related JPH0783029B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26216786A JPH0783029B2 (en) 1986-11-04 1986-11-04 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26216786A JPH0783029B2 (en) 1986-11-04 1986-11-04 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS63115385A JPS63115385A (en) 1988-05-19
JPH0783029B2 true JPH0783029B2 (en) 1995-09-06

Family

ID=17371992

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26216786A Expired - Fee Related JPH0783029B2 (en) 1986-11-04 1986-11-04 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0783029B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442191A (en) * 1990-09-05 1995-08-15 Yale University Isotopically enriched semiconductor devices
US5917195A (en) * 1995-02-17 1999-06-29 B.A. Painter, Iii Phonon resonator and method for its production

Also Published As

Publication number Publication date
JPS63115385A (en) 1988-05-19

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