JPH077955A - Rectifier circuit - Google Patents

Abstract

PURPOSE:To constitute a power supply whose current capacity is large by a method wherein a bridge rectifying operation is performed by MOS power FETs. CONSTITUTION:MOS power FETs (TR1 to TR4) which constitute a bridge rectifier 4a and all constituted of N-channel ones, the FETs (TR1, TR4) and the FETs (TR2, TR3) form one set each, and a control signal which is turned on and off repeatedly is applied to gates of the respective sets. Then, an operating current flows in the order of A C a source for the TR1 a drain E a load 5 F a source for the TR4 a drain D B when the A end of a power-supply transformer 2a is at a positive half cycle, it flows in the order of B D a source for the TR3 a drain E the load 5 F a source for the TR2 a drain C A when the B end of the power-supply transformer 2a is at the positive half cycle, and rectified electric charges are stored respectively in the load 5. In this case, C, D, E and F represent both ends of the bridge rectifier 4a. Thereby, a large-capacity power supply 1 can be constituted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a rectifying power source such as an amplifier.

[0002]

2. Description of the Related Art Silicon rectifiers are used in conventional rectifier circuits for power sources such as amplifiers, but power amplifiers and the like have various drawbacks as rectifier elements for power sources that consume a large amount of current. For example, (1) there is a drawback that the recovery time is long and the forward voltage is large when the junction type silicon diode is used, and (2) the recovery time is medium when the fast recovery diode is used for rectification. However, there is a drawback that the forward voltage is much larger than that in the case of (1). Furthermore, (3) the recovery time is short when a Schottky diode is used for rectification,
Although it has a small forward voltage, it has a drawback that it has a low withstand voltage (40 Vmax).

[0003]

As described above, the silicon rectifier cannot obtain sufficient performance as a rectifier for a large power amplifier, and it is difficult to provide a power supply for a high performance power amplifier.

[0004]

The present invention is a MOS POW.
The ER FET is used as a rectifier, which is bridge-connected, the gate is in phase synchronization with the AC power supply, and controlled to obtain a power supply for a power amplifier with low loss and high performance.

[0005]

An embodiment of the present invention will be described with reference to the drawings. Figure 1
FIG. 3 is a circuit diagram showing an embodiment of the present invention. The AC power supply 1 is connected to the power supply transformer 2a via the power supply cord 3 to supply an AC current. Both ends A and B of the power transformer 2a are connected to both ends C and D on the power supply side of the bridge rectifier 4a in which the MOS POWER FETs are bridge-connected.

From the other ends E and F of the bridge rectifier 4a, charges are stored in a large-capacity capacitor which is a load 5 to obtain a DC power supply. In the bridge rectifier 4a, the MOS FET is composed of a combination of NPN and PNP, and the drain-
Reverse voltage between sources, reverse current characteristics (VSD-IDR), in Nch type, give a positive voltage to the source terminal and a negative voltage to the drain terminal,
In the Pch type, a negative voltage is applied to the source terminal and a positive voltage is applied to the drain terminal.

In this state, a forward bias is applied between the gate and source terminals so that a current flows through the source and drain. In this case, the source-drain forward voltage is MOS
Until the parasitic diode of the POWER FET turns on, it is determined by RON × ID of the MOS POWER FET. This state is shown in FIG.

The MOS POWER FE shown in FIG.
The recovery time of the parasitic diode of T is similar to that of the fast recovery diode and is high-speed, and Vf is equivalent to that of the junction type silicon diode. Withstand voltage is MOSP
The withstand voltage (VDSS) of the OWER FET is the rating.

In the present invention, as shown in FIG. 1, four MOS POWER FETs constituting a bridge rectifier 4a are used.
TR1, TR2, TR3 and TR4 are all composed of Nch, and MOS POWER FET TR1, TR4 and T
A control signal in which R2 and TR3 each repeat ON-OFF in one set is applied to the gate of each set, and the operating current is A → C → TR1 source → drain → E when the A terminal of the power transformer 2a is a positive half cycle. → load 5 → F → T
Current flows in the order of R4 source → drain → D → B, and when the B end of the power transformer 2a is a positive half cycle, B → D → TR3 source → drain → E → load 5 → F → T
A current flows in the order of R2 source → drain → C → A, and rectified charges are accumulated in the load 5, respectively.

MOS POWER FET TR1-T
Each gate circuit of R4 is a photovoltaic diode IC1
Source coupled to control gate voltage, coupled at ~ 4
The light receiving element is connected between the gates, and the light emitting element side controls the light receiving element in phase synchronization with the half cycle of the power transformer. One end A → Bias power supply circuit CC1 → Light emitting element IC1 → One end B, One end A → Bias power supply Circuit CC4 → Light emitting element IC
4 → One end B, One end B → Bias power supply circuit CC3 → Light emitting element IC3 → One end A, and One end B → Bias power supply circuit CC
2 → Light emitting element IC2 → A power source, which is phase-synchronized as shown in FIG.
The R FETs TR1 to TR4 are turned on and off, respectively.

In this case, I including a light emitting element and a light receiving element
Since the forward bias voltage between the gate and the source of the FET is controlled and driven by C1 to C4, the gate bias power supply is insulated from other potentials and the circuit routing connection can be easily made. On the other hand, bridge rectifier 4b with Nch and Pch elements
FIG. 3 shows an embodiment in which the above is constructed. In this case MOS
The source-gate bias of the POWER FETs TR1 to TR4 is set as TR1, TR2 and TR3 and TR4 and controlled by the two photovoltaic diodes IC1 and IC2, so that the circuit configuration can be made simpler than that of FIG. .

FIGS. 4 and 5 are views showing another embodiment of the present invention. FIG. 4 shows a circuit configuration in which the gate of the bridge rectifier 4a is controlled by the winding of the power transformer 2b. It can be made into a simple structure. Figure 5
Has a circuit configuration in which the gate of the bridge rectifier 4b is controlled by the winding of the power transformer 2c, the gate can be controlled with a simpler configuration than the circuit shown in FIG. 4, and the MOS POWER FET is used as an AC power source. It is suitable for large-current capacity power supply rectification because it can switch in synchronization and has a fast recovery time, a high withstand voltage of the power supply voltage, a DC power supply can be obtained, and the forward voltage is low.

[0013]

According to the present invention, the MOS POWER F
Since bridge rectification is performed with ET, a power supply with a large current capacity can be easily configured.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention.

FIG. 2 is a diagram for explaining the present invention.

FIG. 3 is a diagram showing another embodiment of the present invention.

FIG. 4 is a diagram showing another embodiment of the present invention.

FIG. 5 is a diagram showing another embodiment of the present invention.

[Explanation of symbols]

 1 AC power supply 2a, 2b, 2c Power supply transformer 3 Power supply cord 4a, 4b Bridge rectifier 5 Load IC 1, 2, 3, 4 Photoelectric power generation type diode IC TR1, 2, 3, 4 MOS POWER FET

Claims (1)

[Claims] 1. A rectifier circuit connected to an AC power supply for bridge rectification, wherein a bridge connection is made between the source and drain of a MOS POWER FET, two ends of which are connected to an AC power supply and the other two ends are loaded. A rectifier circuit comprising a control circuit for turning on and off the gate of the MOS POWER FET in synchronization with the phase of the AC power source, which is a load end connected to the rectifier circuit.