JPH0777431B2 - Imaging device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus in which a camera head and a signal processing unit are separately configured and both are connected by a cable.

[Conventional technology]

As such an imaging device, Japanese Patent Application No.
There is already an endoscopic device described in -225368. This device incorporates a solid-state imaging device such as a charge-coupled device (CCD) at the tip of an endoscope to image an object. The signal processing unit is usually provided inside the light source device as a separate body from the endoscope. The output of the solid-state imaging device is transmitted to a signal processing unit via a signal line in the endoscope, where signal processing such as clamping, sample & hold is performed, and an image signal of an object is generated.

Here, the output of the solid-state image sensor is delayed while being transmitted to the signal processing unit, and the output of the solid-state image sensor when input to the signal processing unit is delayed with respect to the timing of the drive pulse. In order to compensate for this, various timings of signal processing are delayed with respect to timings of drive pulses according to the type of endoscope (length of signal line).

[Problems to be solved by the invention]

In this conventional device, in order to commonly connect a plurality of endoscopes to the same signal processing unit (light source device), delay circuits corresponding to the number of connected endoscopes are provided in the signal processing unit. However, it is necessary to delay the timing pulse supplied to the signal processing unit for each endoscope, which causes a drawback that the signal processing unit becomes large.

This invention has been made to deal with the above-mentioned circumstances,
The purpose is to compensate for the adverse effect of the delay in signal transmission between the camera head and the signal processing unit, which are separate bodies, with a simple configuration regardless of the difference in the length of the signal line.

[Means for solving problems]

The image pickup apparatus according to the present invention includes a camera head 10 and a signal processing unit 12, which are connected via a cable 14, the camera head 10 includes a solid-state image pickup device 20, and the signal processing unit 12 outputs drive pulses for the solid-state image pickup device. A drive pulse generator 32 to be generated,
A signal processing circuit 36 that processes the output of the solid-state imaging device 20, a timing generator 42 that generates timing pulses for the signal processing circuit 36, and an input of the timing generator 42 and the cable 14 that is transmitted to the camera head 10 via the cable 14 again. The phase difference with the input of the drive pulse generator 32 returned from the camera head 10 via the, or the timing pulse and the timing pulse are transmitted to the camera head 10 via the cable 14 and returned from the camera head 10 via the cable 14 again. A phase control circuit 44 is provided for controlling the phase of the timing pulse so that the phase difference with the drive pulse becomes zero.

[Action]

According to the imaging device of the present invention, the transmission delay amount of the signal from the camera head 10 to the signal processing unit 12 is detected by the phase comparator 44, and the phase of the timing pulse is controlled by the output of the phase comparator 44. The processing timing of the signal processing circuit 36 is always controlled appropriately.

〔Example〕

An embodiment of an image pickup apparatus according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of the first embodiment.
The image pickup apparatus according to the first embodiment includes a camera head 10 and a signal processing unit.
12 is provided, and both are connected by a cable 14.

The camera head 10 includes a solid-state imaging device (here, a charge-coupled device: CCD) 20.

The signal processing unit 12 includes a drive pulse generator 32 that generates a drive pulse for the CCD 20, a first voltage controlled oscillator (VCO) 30 that generates a clock pulse that gives a reference timing for the drive pulse generator 32, and a first VCO 30. The potentiometer 34 generates a control voltage for determining the oscillation frequency of the. The drive pulse generator 32 is composed of a frequency divider that divides the output pulse of the first VCO 30. The output of the first VCO 30 is reciprocated to the camera head 10 via the signal line 16 in the cable 14.

Furthermore, the signal processing unit 12 clamps the output signal of the CCD 20,
Signal processing circuit 36 that performs signal processing such as sample and hold
A timing generator 42 that generates various timing pulses for the signal processing circuit 36; a second VCO 38 that generates a clock pulse that gives the reference timing of the timing generator 42; and a timing generator that delays the output of the second VCO 38. Delay circuit 40 to supply to 42, and delay circuit
40 outputs (input of timing generator 42) and signal lines
The first VC that was shuttled to and from the camera head 10 via 16
A phase comparator 44 for detecting a phase difference from the output of O30 and a level adjuster 46 for supplying a control voltage corresponding to the output of the phase comparator 44 to the second VCO 38 are provided. The output of the signal processing circuit 36 is supplied to a display unit (not shown). The timing generator 42 comprises a frequency divider that divides the output pulse of the second VCO 38. The level adjuster 46 outputs the output of the phase comparator 44 to the second
It is an operational amplifier that converts into a control voltage of VCO38.

According to this embodiment, first, the potentiometer 34 finely adjusts the control voltage applied to the first VCO 30,
The oscillation frequencies of the second VCOs 30 and 38 are set to be substantially the same. The drive pulse generated from the drive pulse generator 32 based on the output of the first VCO 30 is supplied to the CCD 20, and the CCD 20 is driven.

The signal output from the CCD 20 is subjected to signal processing such as clamping, sample & hold in the signal processing circuit 36, and an image signal of the object is generated. Timing pulses that determine the timing of these various types of signal processing are generated from the timing generator 42 based on the output of the second VCO 38. Here, the oscillation frequencies of the first and second VCOs 30 and 38 are substantially the same, but as described above, since the drive pulse is transmitted from the signal processing unit 12 to the camera head 10 via the cable 14, The drive pulse input to the CCD 20 is delayed with respect to the timing pulse. Further, the output signal of the CCD 20 is also supplied to the signal processing circuit 36 via the cable 14. Therefore, unless some kind of phase control means is used, various timings of the signal processing circuit 36 are deviated.

In this embodiment, the output of the first VCO 30 in the signal processing unit 12 is reciprocated to and from the camera head 10 via the signal line 16, and the output of the first VCO 30 and the output of the delay circuit 40 (input of the timing generator 42) are aligned with each other. The phase difference is detected by the phase comparator 44.
As a result, the phase comparator 44 detects the amount of phase delay received until the output of the CCD 20 is transmitted to the signal processing circuit 36. The second VCO 38 constitutes a phase control (PLL) circuit together with the delay circuit 40 and the phase comparator 44. Delay circuit 40 is V
This is a circuit for matching the phases as much as possible when a phase difference that cannot be matched by the CO38 occurs, and may be omitted if the VCO 38 has the function of matching the phases. By this PLL circuit, the two signals at the input terminals of the phase comparator 44 have the same phase and frequency.

Therefore, the timing pulse output from the timing generator 42 is in phase with the output signal of the CCD 20 after being transmitted from the camera head 10 to the signal processing circuit 36 via the cable 14, and the output signal of the CCD 20 is at the correct timing. Signal processed. Furthermore, even when the length of the cable 14 changes and the delay time during signal transmission changes, such as in the case of an endoscope as described above, the signal processing unit 12 side can deal with the same configuration and no adjustment is required. There is an effect that.

The connection position of the delay circuit 40 is not limited to the output of the VCO 38 and can be variously changed. This modified example is shown in FIG.
Shown in (b) and (c). In FIG. 2A, the output of the VCO 30 is reciprocated to and from the camera head 10 via the signal line 16 and further supplied to the phase comparator 44 via the delay circuit 40. In FIG. 2B, the output of the VCO 38 is directly input to the timing generator 42, but the delay circuit 40 is connected in the feedback path from the VCO 38 to the phase comparator 44. Second
In FIG. 6C, the output signal of the CCD 20 is supplied to the signal processing circuit 36 via the delay circuit 40. 2 (a) to (c)
The same effect as that of the first embodiment can be obtained in the modification shown in FIG.

Next, another embodiment of the image pickup apparatus according to the present invention will be described. In the following embodiments, the same parts as those in the eleventh embodiment are designated by the same reference numerals. The other embodiment has the same components as the first embodiment, but the connection is slightly different. Figure 3 is second
It is a block diagram of an Example. Here, the drive pulse generator 32 uses the output of the VCO 38 as the reference clock, the timing generator 42 uses the output of the VCO 30 as the reference clock, and the phase comparator 44 outputs the output of the VCO 30 and the camera head 10 via the signal line 16. The oscillation frequency of the VCO 38 is controlled by the output of the phase comparator 44 by detecting the phase difference from the output of the VCO 38 that is reciprocated between the VCO 38 and the VCO 38. That is, the phase of the drive pulse is controlled by the output of the phase comparator 44.

According to the second embodiment as well, the timing pulse output from the timing generator 42 is in phase with the output signal of the CCD 20 after being transmitted from the camera head 10 to the signal processing circuit 36 via the cable 14, and the CCD 20 The output signal is processed at the correct timing.

Modifications of the second embodiment regarding the connection position of the delay circuit 40 are shown in FIGS. 4 (a), (b), (c) and (d). In FIG. 4A, the output of the VCO 38 is reciprocated to and from the camera head 10 via the signal line 16 and further input to the phase comparator 44 via the delay circuit 40. In FIG. 4B, the output of the VCO 30 is input to the phase comparator 44 via the delay circuit 40.
In FIG. 4 (c), the output of the VCO 38 is input to the drive pulse generator 32 via the delay circuit 40, and the delay circuit 40
Output is reciprocated between the camera head 10 and the signal line 16. In FIG. 4 (d), the output of the CCD 20 is the delay circuit 40.
Is input to the signal processing circuit 36 via. Even in such a modification, the same effect as that of the second embodiment can be obtained.

FIG. 5 is a block diagram of the third embodiment. Here, unlike the first embodiment, the phase comparator 44 detects the phase difference between the drive pulse and the timing pulse. That is, the output of the drive pulse generator 32 is transmitted to the CCD 20 in the camera head 10 via the cable 14, but a part of this drive pulse is returned to the signal processing unit 12 again via the signal line 16. , And is supplied to the phase comparator 44, where the phase difference from a part of the output timing pulse of the timing generator 42 is detected.

Also in the third embodiment, the timing pulse output from the timing generator 42 has the same phase as the output signal of the CCD 20 after being transmitted from the camera head 10 to the signal processing circuit 36 via the cable 14, and the CCD 20 The output signal is processed at the correct timing. Further, in this embodiment, what is returned from the camera head 10 to the signal processing unit 12 is
Since it is not the output of the VCO 30 but the drive pulse obtained by dividing it, the phase of division is the same.

Modifications of the third embodiment regarding the connection position of the delay circuit 40 are shown in FIGS. 6 (a), 6 (b) and 6 (c). In FIG. 6A, the drive pulse returned from the camera head 10 via the signal line 16 is input to the phase comparator 44 via the delay circuit 40. In FIG. 6B, the delay circuit 40 is connected in the feedback path from the timing generator 42 to the phase comparator 44. In FIG. 6 (c), the output signal of the CCD 20 is the delay circuit 40.
Is supplied to the signal processing circuit 36 via. Also in these modified examples, the same effect as the third embodiment can be obtained.

FIG. 7 is a block diagram of the fourth embodiment. Here, unlike the second embodiment, the phase comparator 44 detects the phase difference between the drive pulse and the timing pulse. That is, the output of the drive pulse generator 32 is transmitted to the CCD 20 in the camera head 10 via the cable 14, but a part of this drive pulse is returned to the signal processing unit 12 again via the signal line 16,
It is supplied to the phase comparator 44 via the delay circuit 40, and the phase difference with a part of the output timing pulse of the timing generator 42 is detected there. The output of the phase comparator 44 is VCO38
The phase of the drive pulse is controlled via the oscillation frequency of. The other structure is the same as that of the second embodiment.

Also in the fourth embodiment, the timing pulse output from the timing generator 42 is in phase with the output signal of the CCD 20 after being transmitted from the camera head 10 to the signal processing circuit 36 through the cable 14, and the CCD 20 The output signal is processed at the correct timing. Further, in the fourth embodiment as well, as in the third embodiment, the frequency division phases match.

Modifications of the fourth embodiment regarding the connection position of the delay circuit 40 are shown in FIGS. 8 (a), (b) and (c). In FIG. 8A, the delay circuit 40 is connected in the feedback path from the timing generator 42 to the phase comparator 44. In FIG. 8B, the output of the VCO 38 is input to the drive pulse generator 32 via the delay circuit 40. In FIG. 8C, the output signal of the CCD 20 is input to the signal processing circuit 36 via the delay circuit 40.
Also in these modified examples, the same effect as the fourth embodiment can be obtained.

The present invention is not limited to the above-described embodiments, and can be variously modified without departing from the scope of the invention.

〔The invention's effect〕

As described above, according to the present invention, the transmission delay amount of the signal from the camera head to the signal processing unit is detected by the phase comparator in the signal processing unit, and the timing of the signal processing circuit for signal processing the output of the solid-state image sensor Is controlled by the output of the phase comparator, so that there is provided an image pickup apparatus having a simple configuration capable of compensating for a delay in signal transmission by a cable between the camera head and the signal processing unit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment of an image pickup apparatus according to the present invention, and FIGS. 2 (a), (b), and (c) are first diagrams.
FIG. 3 is a block diagram of a modified example of the embodiment, FIG. 3 is a block diagram showing the configuration of the second embodiment of the image pickup apparatus according to the present invention, and FIGS. 4 (a), (b), (c) and (d) are FIG. 5 is a block diagram of a modification of the second embodiment, and FIG.
A block diagram showing the configuration of the embodiment, FIG. 6 (a),
(B) and (c) are block diagrams of a modification of the third embodiment, FIG. 7 is a block diagram showing a configuration of a fourth embodiment of the image pickup apparatus according to the present invention, and FIGS. 8 (a) and 8 (b). , (C) are block diagrams of a modification of the fourth embodiment. 20 ... Solid-state image sensor (CCD), 32 ... Drive pulse generator, 30, 38 ... Voltage controlled oscillator (VCO), 36 ... Signal processing circuit, 42 ... Timing generator, 44 ... Phase comparator.

Claims (7)

[Claims] 1. An imaging device in which a camera head and a signal processing unit are connected via a cable, wherein the camera head includes a solid-state imaging device, and the signal processing unit includes at least a drive pulse of the solid-state imaging device. Drive pulse generating means for generating a pulse signal for driving the solid-state image sensor, signal processing means for processing an output of the solid-state image sensor, timing pulse generating means for generating a timing pulse of the signal processing means, Delay signal generating means for reciprocating the pulse signal from the drive pulse generating means to the camera head through the cable to generate a delay signal of the pulse signal depending on the length of the cable; the timing pulse; The phase difference with the output of the solid-state image sensor supplied from the camera head via the cable becomes zero. Imaging apparatus characterized by comprising a phase control means for controlling the urchin said timing pulses or the pulse signal of the phase in the delay signal. 2. The drive pulse generating means includes a first oscillator,
The timing pulse generating means includes a pulse generator that divides the output of the first oscillator to generate a drive pulse, and the timing pulse generating means generates a timing pulse by dividing the output of the second oscillator and the output of the second oscillator. A timing generator, the delay signal generating means includes signal transmission means for reciprocating the output of the first oscillator to the camera head via the cable, and the phase control means includes the input of the timing generator and the signal. A phase comparator for detecting a phase difference from the output of the first oscillator reciprocated to the camera head via the transmission means and controlling the phase of the second oscillator according to the detection result is provided. The image pickup apparatus according to claim 1. 3. The drive pulse generating means includes a first oscillator,
The timing pulse generating means includes a pulse generator that divides the output of the first oscillator to generate a drive pulse, and the timing pulse generating means generates a timing pulse by dividing the output of the second oscillator and the output of the second oscillator. A timing generator, the delay signal generating means includes signal transmitting means for returning the drive pulse transmitted to the solid-state imaging device via the cable to the signal processing section, and the phase controlling means for the timing pulse And a phase comparator for detecting the phase difference between the drive pulse returned from the camera head via the signal transmission means and controlling the phase of the second oscillator according to the detection result. The image pickup apparatus according to claim 1. 4. The drive pulse generating means includes a first oscillator,
The timing pulse generating means includes a pulse generator that divides the output of the first oscillator to generate a drive pulse, and the timing pulse generating means generates a timing pulse by dividing the output of the second oscillator and the output of the second oscillator. A timing generator, the delay signal generating means includes signal transmission means for reciprocating the output of the first oscillator to the camera head via the cable, and the phase control means includes the input of the timing generator and the signal. A phase comparator for detecting a phase difference from the output of the first oscillator reciprocated to the camera head via the transmission means and controlling the phase of the first oscillator according to the detection result is provided. The image pickup apparatus according to claim 1. 5. The drive pulse generating means includes a first oscillator,
The timing pulse generating means includes a pulse generator that divides the output of the first oscillator to generate a drive pulse, and the timing pulse generating means generates a timing pulse by dividing the output of the second oscillator and the output of the second oscillator. A timing generator, the delay signal generating means includes signal transmitting means for returning the drive pulse transmitted to the solid-state imaging device via the cable to the signal processing section, and the phase controlling means for the timing pulse And a phase comparator for detecting a phase difference between the drive pulse returned from the camera head via the signal transmission means and controlling the phase of the first oscillator according to the detection result. The image pickup apparatus according to claim 1. 6. A delay circuit is connected between the output of the first oscillator or the second oscillator and the phase comparator, according to any one of claims 2 to 5. The imaging device according to one item. 7. The delay circuit according to claim 2, further comprising a delay circuit connected between the output of the solid-state image pickup device and the signal processing means. Imaging device.