JPH0776899B2 - Small information processing device - Google Patents

Small information processing device

Info

Publication number
JPH0776899B2
JPH0776899B2 JP63229552A JP22955288A JPH0776899B2 JP H0776899 B2 JPH0776899 B2 JP H0776899B2 JP 63229552 A JP63229552 A JP 63229552A JP 22955288 A JP22955288 A JP 22955288A JP H0776899 B2 JPH0776899 B2 JP H0776899B2
Authority
JP
Japan
Prior art keywords
circuit
information processing
input
power supply
main body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63229552A
Other languages
Japanese (ja)
Other versions
JPH0277815A (en
Inventor
博 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP63229552A priority Critical patent/JPH0776899B2/en
Publication of JPH0277815A publication Critical patent/JPH0277815A/en
Publication of JPH0776899B2 publication Critical patent/JPH0776899B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は、電子辞書又は電子手帳等の小型情報処理装置
に係わり、特に外部メモリとしてのメモリカード(ROM
カード、ICカード等)を同装置本体の同カードの収納部
から取出す場合に蓋を開放すると電源をオフにする同装
置に関する。
The present invention relates to a small information processing device such as an electronic dictionary or an electronic notebook, and particularly to a memory card (ROM) as an external memory.
Card, IC card, etc.), the power is turned off when the lid is opened when the card is taken out from the storage section of the card.

(ロ) 従来の技術 一般に種々の情報処理装置において、オフィス用又は家
庭内で使用するパーソナルコンピュータは交流電源によ
って駆動するものが大半である。
(B) Conventional Technology In general, in various information processing apparatuses, most personal computers used in offices or homes are driven by an AC power source.

一方ポータブルタイプの小型情報処理装置は内蔵メモリ
を最小限にすると共に外部メモリによってメモリを追加
し、拡充を図る構成が多く用いられ、電源としても内蔵
電池によって駆動する方式が提案されている。
On the other hand, a portable type small-sized information processing apparatus often has a structure in which a built-in memory is minimized and a memory is added by an external memory for expansion, and a method of driving a built-in battery as a power source has been proposed.

その一例として特開昭61-150088号があげられ、データ
処理制御装置に使用されるメモリカードについて提案さ
れている。
As one example thereof, Japanese Patent Laid-Open No. 61-150088 is proposed, and a memory card used in a data processing control device is proposed.

(ハ) 発明が解決しようとする課題 従来のメモリカードは単に電池の消耗に関して考慮され
ているのみで、特に情報処理装置本体側の電源について
は、何ら施されておらず、例えばメモリカードを取外し
た際に本体側の電源スイッチをオフにする方が電源電池
の消耗を減少できる。又メモリカードの着脱時における
内部回路の保護も施されていない。
(C) Problems to be Solved by the Invention A conventional memory card merely considers battery consumption, and no particular power supply is applied to the main body of the information processing apparatus. For example, when the memory card is removed, It is better to turn off the power switch on the main unit when the battery is used to reduce the consumption of the power battery. Moreover, the internal circuit is not protected when the memory card is attached or detached.

この点に鑑み、本発明はメモリカードを本体から取外す
と同時に電源回路をオフにする構成を提案するものであ
る。
In view of this point, the present invention proposes a configuration in which the power supply circuit is turned off at the same time when the memory card is removed from the main body.

(ニ) 課題を解決するための手段 本発明は、小型情報処理装置本体と該本体に結合される
外部メモリとより成り、前記小型情報処理装置本体に前
記外部メモリを収納する収納部を設けると共に該収納部
に開閉自在に蓋体を設けた小型情報処理装置において、
前記本体内に設けられた負荷回路に電力を供給する電源
回路と、第1及び第2の入力を有する双安定記憶保持回
路と、前記第1の入力に接続された第1のスイッチ手段
と、前記第2の入力に接続され、第1及び第2の入力を
有するゲート手段と、該ゲート手段の第1の入力に接続
され、前記負荷回路の動作状態に応じた制御信号を出力
する制御回路と、前記ゲート手段の第2の入力に接続さ
れ、前記蓋体の開閉に連動する第2のスイッチ手段とを
設け、前記双安定記憶保持回路の出力を前記電源回路に
入力し、前記負荷回路への電力供給を制御する構成であ
る。
(D) Means for Solving the Problems The present invention comprises a small-sized information processing device main body and an external memory coupled to the main body, and the small-sized information processing device main body is provided with a storage portion for storing the external memory. In a small-sized information processing device in which a lid is provided to the storage part so as to be freely opened and closed
A power supply circuit for supplying electric power to a load circuit provided in the main body, a bistable memory holding circuit having first and second inputs, and a first switch means connected to the first input, Gate means connected to the second input and having first and second inputs, and a control circuit connected to the first input of the gate means and outputting a control signal according to the operating state of the load circuit. And a second switch means connected to the second input of the gate means and interlocking with the opening and closing of the lid body, the output of the bistable memory holding circuit is input to the power supply circuit, and the load circuit It is a configuration for controlling the power supply to the.

(ホ) 作用 本発明の小型情報処理装置では、同装置本体に外部メモ
リ収納部に挿入して同外部メモリを使用した後取出す際
に同収納部の蓋を開放すると同時に電源ラインをオフに
して、前記装置内の電源回路の負荷、例えば表示用のLC
D、表示回路、又は演算回路等の種々の部分への電源を
断つ構成である。
(E) Operation In the small-sized information processing device of the present invention, when the external memory storage part is inserted into the main body of the device and the external memory is used and then taken out, the cover of the storage part is opened and the power line is turned off at the same time. , The load of the power supply circuit in the device, for example LC for display
The power supply to various parts such as the D, the display circuit, and the arithmetic circuit is cut off.

(ヘ) 実施例 図面に従って本発明を説明すると、第1図は本発明の小
型情報処理装置のブロック図、第2図(イ)は外部メモ
リ収納部の蓋を閉じた状態、同図(ロ)は前記蓋を開け
た状態を示す。
(F) Embodiments The present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a small-sized information processing apparatus according to the present invention, and FIG. 2 (a) is a state in which a lid of an external memory storage section is closed. ) Indicates a state in which the lid is opened.

図面において、(1)は小型情報処理装置本体、(2)
は外部メモリとしてのメモリカード、(3)はカード収
納部、(4)はエジェクトボタン、(5)は蓋体、
(6)は蓋連動スイッチ、(7)はスイッチ押圧用の突
子、(8)は本体基板、(9)は突子挿入孔、(10)は
制御回路、(11a)(11b)は主電源スイッチ、(12)は
制御端子、(13)はフリップフロップでS,Rは各々セッ
ト及びリセット端子でローアクティブタイプを示し、
(14)はフリップフロップ出力端子、(15)は電源回
路、(16)(17)は電源端子、(18)は電源出力端子、
(19)は内蔵電池、(20)はORゲートを示す。
In the drawings, (1) is a small information processing device body, (2)
Is a memory card as an external memory, (3) is a card storage, (4) is an eject button, (5) is a lid,
(6) is a lid interlocking switch, (7) is a protrusion for pressing the switch, (8) is a main substrate, (9) is a protrusion insertion hole, (10) is a control circuit, (11a) and (11b) are main A power switch, (12) is a control terminal, (13) is a flip-flop, and S and R are set and reset terminals, which are low active type.
(14) is a flip-flop output terminal, (15) is a power supply circuit, (16) and (17) are power supply terminals, (18) is a power supply output terminal,
(19) shows an internal battery and (20) shows an OR gate.

次に本発明装置の動作について説明すると、第2図
(イ)に示す状態即ち小型情報処理装置本体(1)に設
けた蓋体(5)を閉じた状態で電源スイッチ(11a)を
1回押圧すると、第1図において蓋連動スイッチ(6)
及び主電源スイッチ(11b)が開放されているので、電
源端子(16)からの電源が供給されて、ハイ(H)レベ
ルに保持され、主電源スイッチ(11a)の1回押圧によ
りローレベル(L)パルスがフリップフロップ(13)に
加わり、電源回路(15)への制御信号として端子(14)
にはローレベル(L)出力が現われて、電源回路(15)
はオンとなって出力端子(18)から各種負荷への電源が
供給される。
Next, the operation of the device of the present invention will be described. The power switch (11a) is turned on once with the state shown in FIG. 2 (a), that is, with the lid (5) provided on the small information processing device main body (1) closed. When pressed, the lid interlock switch (6) in FIG.
Also, since the main power switch (11b) is opened, power is supplied from the power terminal (16) and is held at a high (H) level, and the main power switch (11a) is pressed once to a low level ( L) pulse is applied to the flip-flop (13), and the terminal (14) serves as a control signal to the power supply circuit (15).
A low level (L) output appears on the power supply circuit (15).
Is turned on and power is supplied to various loads from the output terminal (18).

次に主電源スイッチ(11b)を押圧してローレベル
(L)パルスを加えると、フリップフロップ(13)は反
転して端子(14)はハイレベル(H)となって電源回路
(15)はオフとなり、各種の負荷回路への電源が断たれ
る。
Next, when the main power switch (11b) is pressed to apply a low level (L) pulse, the flip-flop (13) is inverted and the terminal (14) becomes high level (H), so that the power circuit (15) It turns off and the power to various load circuits is cut off.

又前記電源回路(15)が通常動作中に使用者がメモリカ
ード(2)を前記情報処理装置本体(1)の収納部
(3)から取出すために、蓋体(5)を開けると同時に
蓋連動スイッチ(6)は閉じてORゲート(20)の一方の
入力端子がローレベルに設定される。このとき前記電源
回路(15)に接続された負荷が動作中であれば、制御回
路(10)からの出力はハイレベル(H)に保持させてお
き、前記フリップフロップ(13)の出力端子(14)はハ
イレベル(H)に保たれ、前記負荷の動作が終了するか
又は終了させても良い状態になると同時に制御回路(1
0)の出力はローレベル(L)に変化してフリップフロ
ップ(13)は前記主電源スイッチ(11b)の1回押圧と
同様の動作となって反転し、出力端子(14)はハイレベ
ル(H)に保持され、電源回路(15)はオフになる。
Further, in order for the user to take out the memory card (2) from the storage section (3) of the information processing apparatus main body (1) while the power supply circuit (15) is operating normally, the lid body (5) is opened at the same time. The interlocking switch (6) is closed and one input terminal of the OR gate (20) is set to low level. At this time, if the load connected to the power supply circuit (15) is operating, the output from the control circuit (10) is kept at a high level (H), and the output terminal of the flip-flop (13) ( 14) is kept at the high level (H), and the control circuit (1
The output of (0) changes to low level (L), the flip-flop (13) operates in the same manner as the main power switch (11b) is pressed once, and is inverted, and the output terminal (14) goes to high level (L). H), the power supply circuit (15) is turned off.

更にこの状態即ち第2図(ロ)から第2図(イ)の状態
に示すように蓋体(5)を閉じると、第1図に示す構成
となって第2図(イ)に示す突子(7)が蓋連動スイッ
チ(6)の押圧杆(21)を左方向に移動させて、同スイ
ッチ(6)は開放状態となりORゲート(20)の一方の端
子即ちスイッチ(6)(11b)を接続した側がハイレベ
ルに設定され、前記主電源スイッチ(11a)の押圧にて
オン、(11b)の押圧にてオフに前記電源回路(15)を
制御でき、出力端子(18)に接続された種々の負荷、例
えば表示素子としてのLCD、駆動回路等への電源が断続
可能となる。
Further, when the lid body (5) is closed in this state, that is, as shown in FIG. 2 (b) to FIG. 2 (a), the structure shown in FIG. 1 is obtained and the protrusion shown in FIG. 2 (a) is obtained. The child (7) moves the push rod (21) of the lid interlocking switch (6) to the left, so that the switch (6) is opened and one terminal of the OR gate (20), that is, the switch (6) (11b). ) Is set to the high level, the power supply circuit (15) can be controlled to be turned on by pressing the main power switch (11a) and turned off by pressing (11b), and connected to the output terminal (18). It becomes possible to connect and disconnect the various loads applied, for example, the LCD as the display element, the power supply to the drive circuit and the like.

なお上記説明において主電源スイッチ(11a)(11b)
は、例えば情報処理用の入力手段としてのキーボード上
に設け、キーボード側から電源回路(15)のオン、オフ
を制御するのに対し、前記外部メモリとしてのメモリカ
ード(2)の取外し時には、前記収納部の蓋体(5)の
開放によって即座に蓋連動スイッチ(6)を駆動する構
成により、各々操作者にとって使い易くなる。
In the above description, the main power switch (11a) (11b)
Is provided on a keyboard as an input means for information processing, and controls on / off of the power supply circuit (15) from the keyboard side, while the memory card (2) as the external memory is removed when the memory card (2) is removed. The configuration in which the lid interlocking switch (6) is immediately driven by opening the lid body (5) of the storage section makes each operator easy to use.

(ト) 発明の効果 本発明によれば、外部メモリを取り出そうと収納部に設
けた蓋体を開けた場合でも、負荷回路が動作中であれ
ば、その旨を示す制御信号が制御回路からゲート手段に
供給されているため、すぐに電源回路がオフになること
はなく、その後、負荷回路の動作が終了するか又は終了
させても良い状態になってから電源回路がオフになるの
で、回路素子の破壊を確実に防止することができる。
(G) Effect of the Invention According to the present invention, even when the lid provided in the storage section is opened to take out the external memory, if the load circuit is in operation, a control signal indicating that effect is sent from the control circuit to the gate. Since the power supply circuit is supplied to the means, the power supply circuit is not immediately turned off.After that, the power supply circuit is turned off after the operation of the load circuit is completed or is ready to be completed. It is possible to reliably prevent breakage of the element.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の小型情報処理装置のブロック図、第2
図は同装置の要部断面図を示す。 (1)……小型情報処理装置本体、(2)……メモリカ
ード、(3)……カード収納部、(5)……蓋体、
(6)……蓋連動スイッチ、(11a)(11b)……主電源
スイッチ、(15)……電源回路、(19)……内蔵電池。
FIG. 1 is a block diagram of a compact information processing device according to the present invention, and FIG.
The figure shows a cross-sectional view of the main part of the device. (1) …… Small information processing device body, (2) …… Memory card, (3) …… Card storage section, (5) …… Lid body,
(6) …… Lid interlock switch, (11a) (11b) …… Main power switch, (15) …… Power circuit, (19) …… Built-in battery.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】小型情報処理装置本体と該本体に結合され
る外部メモリとより成り、前記小型情報処理装置本体に
前記外部メモリを収納する収納部を設けると共に該収納
部に開閉自在に蓋体を設けた小型情報処理装置におい
て、前記本体内に設けられた負荷回路に電力を供給する
電源回路と、第1及び第2の入力を有する双安定記憶保
持回路と、前記第1の入力に接続された第1のスイッチ
手段と、前記第2の入力に接続され、第1及び第2の入
力を有するゲート手段と、該ゲート手段の第1の入力に
接続され、前記負荷回路の動作状態に応じた制御信号を
出力する制御回路と、前記ゲート手段の第2の入力に接
続され、前記蓋体の開閉に連動する第2のスイッチ手段
とを設け、前記双安定記憶保持回路の出力を前記電源回
路に入力し、前記負荷回路への電力供給を制御すること
を特徴とする小型情報処理装置。
1. A compact information processing apparatus main body and an external memory coupled to the main body, wherein the small information processing apparatus main body is provided with a storage portion for storing the external memory, and the storage portion is openable and closable. A small information processing device provided with a power supply circuit for supplying power to a load circuit provided in the main body, a bistable storage holding circuit having first and second inputs, and a connection to the first input. A first switch means connected to the second input, a gate means having first and second inputs, and a first input to the gate means, to activate the load circuit. A control circuit for outputting a corresponding control signal and a second switch means connected to the second input of the gate means and interlocking with the opening and closing of the lid are provided, and the output of the bistable memory holding circuit is provided. Input to the power circuit, the negative Small information processing apparatus and controls the power supply to the circuit.
JP63229552A 1988-09-13 1988-09-13 Small information processing device Expired - Lifetime JPH0776899B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63229552A JPH0776899B2 (en) 1988-09-13 1988-09-13 Small information processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63229552A JPH0776899B2 (en) 1988-09-13 1988-09-13 Small information processing device

Publications (2)

Publication Number Publication Date
JPH0277815A JPH0277815A (en) 1990-03-16
JPH0776899B2 true JPH0776899B2 (en) 1995-08-16

Family

ID=16893955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63229552A Expired - Lifetime JPH0776899B2 (en) 1988-09-13 1988-09-13 Small information processing device

Country Status (1)

Country Link
JP (1) JPH0776899B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4048334B2 (en) * 1998-05-25 2008-02-20 富士フイルム株式会社 Electronic camera

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5370130U (en) * 1976-11-12 1978-06-13
JPS5975327A (en) * 1982-10-21 1984-04-28 Toshiba Corp Microcomputer device
JPS60150698U (en) * 1984-03-19 1985-10-07 カシオ計算機株式会社 Electronic equipment with data card
JPS6157395U (en) * 1984-09-19 1986-04-17

Also Published As

Publication number Publication date
JPH0277815A (en) 1990-03-16

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