JP2003502748A - User input device with memory - Google Patents

Abstract

SUMMARY OF THE INVENTION The present invention comprises a main part (1; 60) comprising a processor (21), a display device (4; 61) controllable by the processor for displaying images, and a processor for the processor. A sub-portion (2, 40; 62, 72) comprising a memory means (27) for storing a program and user input means (8, 9, 10, 41; 64, 65, 66, 74); A program controller for transmitting the code of the program to the main part and transmitting data generated by operation of the user input means to the main part. Wherein said data can provide input for a program when said program is being executed by a processor. That.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD OF THE INVENTION

SUMMARY OF THE INVENTION The present invention is directed to a combined memory for program-controlled devices (
combined memory) and user input device.

[0002]

[Prior art]

Nintendo® Gameboy® is a well-known portable video game device. The Nintendo® Gameboy® includes a housing with a processor, a display screen, and a push-button user input device. The program for the video game is supplied in the form of a ROM cartridge inserted in the main body, which allows the processor to execute the program stored in the ROM cartridge. A problem that occurs with Nintendo® Gameboy® is that the placement of the push buttons needs to be useful for various types of games, and that user input devices suitable for platform games are commonly used in motor racing games or That is not the best for flight simulator games.

[0003]

[Problems to be Solved by the Invention]

The present invention addresses this problem for portable video game devices.
However, the present invention more generally relates to providing appropriate user input means for a particular program (eg, a personal digital organizer (pers).
It is applicable to program control devices such as onal digital organizers) and smartphones.

[0004]

[Means for Solving the Problems]

According to the invention, a secondary part comprising a processor, a main part comprising a display device controllable by the processor for displaying images, a memory means for storing a program for the processor and a user input means. A program control device comprising a part, the sub-part being data (including a command) generated for transmitting the code of the program to the main part and by operating the user input means. To a main part, the data may provide an input for the program when the program is being executed by a processor. A device is provided.

According to the present invention, a main part including a processor, a display device controllable by the processor for displaying an image, a memory means for storing each program for the processor, and a user input means are provided. First and second provided for each
A program control device comprising a sub-portion, wherein the sub-portion is generated for transmitting a code of the program to a main portion and by operating a user input means (including a command). Data) may be temporarily placed interchangeably with respect to the main part for transmitting the data to the main part, the data being provided for the program when the program is being executed by a processor. The user input means of the first sub-portion that provides the input is different from the user input means of the second sub-portion, and the data that can be transmitted from the first sub-portion is the first sub-portion. There is further provided a device characterized in that it has the same format as the data that can be conveyed from the two sub-parts.

As a result, the format of the data depends on the format of the user input means (eg, operating analog or digital).

The program code can be transmitted in bulk to the main portion for storage in the main portion while the program is being executed. Alternatively, the code can be read from the subsection while the program is running.

The main portion and the sub-portions or each of the sub-portions have complementary electrical connector means, the complementary electrical connector means having cords and connectors when mated. It is preferable to provide a basis for said transmission of data. However, for data and codes, through electromagnetic waves, through free space,
It can be transmitted from the secondary part to the main part.

The sub-portions or each sub-portion comprises circuitry responsive to operation of user input means of the sub-portions for generating the data for transmission to the main portion. It is preferable. In the simple case, the user input means comprises a switch between the two contacts of the connector, so that the circuit of the main part can detect whether the switch is open or closed.

Preferably, the data comprises a code comprising a plurality of bits, all of which have the same length. Alternatively, the data may comprise one of a plurality of command codes, each with an arbitrary parameter (eg command type + significance).

The shape of the main part is substantially determined by the shape of the display device, and the secondary part is connectable to the edge of the main part. Preferably, the display device has a side edge, and the sub-portion is connectable to the side edge of the display device. An auxiliary part having a user input means is provided, and the main part and the auxiliary part are complementary connector means for transmitting to the main part data generated by operation of the user input means of the auxiliary part. And the data preferably provides input for the program when the program is being executed by a processor. More preferably, the sub-portion and the sub-portion are configured to supply a handle for the device.

The user input means can take many forms depending on the software in the memory means. For example, a keyboard is suitable for programs that require text entry, while the traditional "GameBoy"
The key layout is suitable for platform games. The user input means does not have to be a manually operable device and can also include a microphone.

[0013]   The memory means can store one or more programs.

As a result, the memory means or each of the memory means comprises a solid state ROM. However, the memory means may also comprise a disc drive and a disc.

According to the invention, a subordinate portion is further provided for the device according to the invention.

[0016]

DETAILED DESCRIPTION OF THE INVENTION

Embodiments of the present invention will be described below, by way of example, with reference to the accompanying drawings.

With reference to FIGS. 1 and 2, the device according to the invention comprises a body 1 and a plug-in module 2. The main body 1 is rectangular in plan view, and the main body 1
There is a raised portion 3 extending from one end to the middle along. The liquid crystal display 4 is attached to the upper surface of the raised portion 3. The multi-way connector 5 faces the raised portion 3 to face the main body 1
It is attached to the middle point of. The set of hook members 6 and 7 is arranged at one end of the main body 1 at a position opposite to the raised portion 3.

The plug-in module 2 is provided with a multi-way connector (not shown) for connecting to the multi-way connector 5 of the main body 1 and a recess for engaging the hook members 6, 7. Therefore, the plug-in module 2 can be detachably connected to the main body 1. With the plug-in module 2 in place, the device is also rectangular in side view.

A cross-shaped membrane switching element 8 and two circular switching elements 9 and 10 are provided on the upper surface of the plug-in module 2.

Referring to FIG. 3, the main body 1 includes a battery 20 for supplying electric power to a circuit of the main body 1 and a circuit of the plug-in module 2 via a switch, a microprocessor 21, and a display for the display 4. Driver 22, ROM 23,
It contains a RAM 24 and an I / O interface circuit 25. Microprocessor 21, display driver 22, ROM 23, RAM 24, and I /
The O interface circuits 25 are interconnected by a multiplexed address and data bus 26. The bus 26 is connected to the plug-in module 2 through the connector 5.
It extends inward (FIG. 2) and is connected to the ROM 27 in the plug-in module 2. As a result, the microprocessor 21 can read the program instruction code from the ROM 27 in the plug-in module 2. ROM27
Stores programs for platform games.

The membrane switching elements 8, 9 and 10 are connected to the command processing circuit 28 in the plug-in module 2. The command processing circuit 28 outputs an 8-bit command code to the I / O interface circuit 25 and outputs an interrupt signal to the microprocessor 21 in response to the operation of the membrane switching elements 8, 9, and 10. The 8-bit command code and the interrupt signal pass through the connector 5.

Since the operation of the microcomputer is well known to those skilled in the art,
It will not be repeated here. However, the generation and processing of a user input device will be described.

Referring to FIG. 4, the command processing circuit 28 has a first input having a connection connected to a switch operated by each arm of the cross-shaped membrane switching element 8.
3 input OR gate 30, a switch operated by the remaining arms of the cross-shaped membrane switching element 8, and a second 3-input OR gate having inputs connected to the switches of the circular membrane switching elements 9 and 10, respectively. Gate 31 and 2-input OR having inputs connected to outputs of 3-input OR gates 30 and 31
A gate 32, a clock 33, a 2-input AND gate 34 having an input connected to the output of the 2-input OR gate 32 and the clock 33, and an 8-bit latch 35.
And. The latch 35 is arranged to be clocked by the 2-input AND gate 34.

Six of the inputs of the latch 35 are cross-shaped membrane switching elements 8
Is connected to a switch operated by the arm and the circular membrane switching elements 9 and 10. The other two inputs of the latch 35 are connected to 0V.
The output of the latch 35 is connected to each contact of a connector 36 that fits with the connector 5 (FIG. 2) on the main body 1. The output of the 2-input AND gate 34 is connected to another contactor of the connector 36.

In the quiescent state, the inputs to the 3-input OR gates 30 and 31 and the latch 35 are all logic 0. User selects 1st circular membrane switching element 9
Pressing closes the corresponding switch, bringing the first input of the latch 35 and one of the inputs of the second three-input OR gate 31 to a logic one. As a result, the second 3-input O
The output of the R gate 31 has a logical value of 1, and as a result, the output of the 2-input OR gate 32 also has a logical value of 1. If a clock pulse occurs while the output of the 2-input OR gate 32 is a logical one, the output of the AND gate 34 will be a logical one for the duration of the clock pulse. The pulse output from the AND gate 34 is the latch 3
5 is clocked so that a logical 1 at the first input of the latch and a logical 0 at the other inputs are transmitted to the output of the latch. AND gate 34
The pulse output by the microprocessor 21 (
It is also supplied to the interrupt port of FIG. 3). Microprocessor 21 responds to the interrupt by reading the output of latch 35 via I / O interface circuit 25 (FIG. 3). Microprocessor 2 for read latch output
The response of 1 depends on the program executed by the microprocessor 21 (for example, the program stored in the ROM 27 in the plug-in module 2).

It can be seen that a similar sequence of events follows after pushing the other membrane switching elements, and that the operation of each element produces a unique code at the output of latch 35.

Referring to FIG. 5, another plug-in module 40 has a membrane alphanumeric matrix keyboard 41 mounted on its top surface. R of the module
The OM is programmed with text processing software.

Referring to FIG. 6, the switches of the keyboard 41 are arranged in columns and rows. The pulse is sequentially applied to the rows by the ring counter 42. The output of the ring counter 42 is also supplied to the input of the encoder 43. The encoder outputs a 3-bit binary number which gives the identification of the row to which the pulse is being applied (ie 0, 1, 2, 3, 4, 5). Furthermore, the columns of the matrix are connected to the inputs of a similar encoder 44. The outputs of the encoders 43 and 44 are n × 8 bit ROM
It is connected to 45 address inputs. The eight outputs of the ROM 45 are connected to the respective inputs of the 8-bit latch 46. The output of the latch 46 is connected to each contact of a connector 47 for mating with the connector 5 (FIG. 2) on the main body 1.

Three of the columns of the matrix are connected to the inputs of the first 3-input OR gate 48. The other three columns are connected to the inputs of the second three-input OR gate 49. The outputs of the 3-input OR gates 48 and 49 are connected to the inputs of the 2-input OR gate 50. The output of the 2-input OR gate 50 is connected to the readable input of the ROM 45 and the input of the delay circuit 51. The output of the delay circuit 51 is the latch 46.
Is connected to the clock input and the contact of the connector 47.

When the user presses one of the keys on keyboard 41 (eg, key A),
One of the columns (2) is temporarily connected to one of the rows (2). In this case, since the ring counter 42 is rapidly circulating, the line (2
) Is connected to column (2), a pulse is applied to row (2). As a result, the pulse is applied to one input of the first three-input OR gate 48 and one input of the second encoder 44. At this point, both encoders 43 and 44 output 010, which causes the address input to the ROM 45 to be 010010.

The output of the first 3-input OR gate 48 has a logical value of 1, and thus the output of the 2-input OR gate 50 also has a logical value of 1. The output of the 2-input OR gate 50, which is a logical one, enables the ROM 45 to be read. As a result, the 8-bit code at location 010010 in ROM 45 appears at the output of the ROM. This code is then input into latch 46 and transmitted to the output of latch 46 when the pulse output by 2-input OR gate 50 propagates through delay circuit 51. The delay circuit provides time for the input to latch 46 to stabilize before the clock is sent to latch 46.

The output of the delay circuit 51 is also supplied to the interrupt input of the microprocessor 21 (FIG. 3), which causes the microprocessor 21 to pass through the I / O interface circuit 25 (FIG. 3). The output of the latch 46 is read.

Referring to FIG. 7, the second embodiment of the present invention comprises a rectangular panel 60. The liquid crystal display 61 occupies substantially one surface of the panel 60. First and second clip-on handles 62, 63 are provided on the right and left sides of the panel 60. The first clip-on handle 62 is electrically equivalent to the plug-in module of the above-described embodiment, and the first clip-on handle 62 and the panel 6 are provided.
An electrical connection is made with zero microcomputer circuits. The second clip-on handle 63 does not have a ROM and has only a user input command processing circuit. An electrical connection is made between the second clip-on handle 63 and the microcomputer circuit of the panel 60 so that the microcomputer circuit can receive a user input command from the second clip-on handle 63.

The first clip-on handle 62 includes three membrane switching elements 6
4, 65, 66, and the second clip-on handle 63 has a trackball 67.

Referring to FIG. 8, another set of first clip-on handles 72 has a touch-sensitive bar 74 as a user input device, and second clip-on handles 73 have any input device. I haven't.

[Brief description of drawings]

FIG. 1 is a perspective view of a first embodiment of the present invention.

2 is an exploded view of the embodiment of FIG. 1. FIG.

FIG. 3 is a block diagram of the embodiment of FIG.

FIG. 4 is a circuit diagram of the plug-in module shown in FIG.

5 is an exploded view of the embodiment of FIG. 1 with a keyboard.

FIG. 6 is a circuit diagram of a keyboard module.

FIG. 7 is a front view of the second embodiment of the present invention.

FIG. 8 is a front view of another plug-in module for the embodiment of FIG.

[Explanation of symbols]

1 body 2 Plug-in module 3 Higher part 4,61 display 5.36 connector 6,7 Hook member 8, 9, 10, 64, 65, 66 Membrane switching element 20 batteries 21 microprocessors 22 Display driver 23, 27, 45 ROM 24 RAM 25 I / O interface circuit 26 data buses 28 Command processing circuit 30, 31, 32, 48, 49, 50 OR gate 33 clocks 34 AND gate 35,46 Latch 40 plug-in modules 41 keyboard 42 ring counter 43,44 encoder 51 Delay circuit 60 panels 62, 63, 72, 73 Clip-on handle 67 Trackball 74 Touch Sensitive Bar

[Procedure for Amendment] Submission for translation of Article 34 Amendment of Patent Cooperation Treaty

[Submission date] March 29, 2001 (2001.3.29)

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Contents of correction]

[Claims]

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Claims (14)

[Claims] 1. A main part comprising a processor, a display device controllable by the processor for displaying images, a memory part storing a program for the processor, and a sub-part comprising a user input means. A program control device comprising: for transmitting the code of the program to the main part, and for transmitting data generated by the operation of the user input means to the main part. And wherein the data provides input for the program when the program is being executed by a processor. 2. A main part comprising a processor, a display device controllable by the processor for displaying images, a memory means for storing each program for the processor, and a user input means, each comprising: A program controller comprising a first and a second sub-portion, the first and second sub-portions being for transmitting a code of the program to a main portion, and user input means. Of the program, the data generated by the operation of the program can be temporarily arranged in an interchangeable manner with respect to the main part, the data being stored in the program when the program is being executed by a processor. Wherein the user input means of the first sub-portion is different from the user input means of the second sub-portion. And the data transferable from the first sub-part has the same format as the data transferable from the second sub-part. 3. The main portion and the sub-portions or each of the sub-portions have complementary electrical connector means, the complementary electrical connector means comprising:
Device according to claim 1 or claim 2, characterized in that it provides a basis for said transmission of code and data when fitted together. 4. A circuit responsive to operation of a user input means of said sub-portion, or said each sub-portion, for generating said data for transmission to a main portion. The device according to any one of claims 1 to 3, further comprising: 5. The apparatus according to claim 1, wherein the data comprises a code having a plurality of bits that are all the same length. 6. Each of the data is one of a plurality of command codes.
The device according to any one of claims 1 to 4, comprising one. 7. The apparatus of claim 6, wherein the data element further comprises a parameter. 8. The shape of the main part is substantially determined by the shape of the display device, and the secondary part is connectable to the edge of the main part. The device according to claim 7. 9. The device according to claim 8, wherein the display device has a side edge, and the secondary part is connectable to the side edge of the display device. 10. An auxiliary portion having a user input means, said main portion and said auxiliary portion being complementary to transmitting data generated by operation of said user input means of said auxiliary portion to said main portion. Device according to claim 8 or 9, characterized in that it comprises connector means, the data providing an input for the program when the program is being executed by a processor. 11. The device of claim 10, wherein the sub-portion and the auxiliary portion are configured to provide a handle for the device. 12. The apparatus according to claim 1, wherein the user input means includes a keyboard. 13. An apparatus according to claim 1, wherein the memory means or each of the memory means comprises a solid state ROM. 14. A sub-portion for a device according to any of claims 1 to 13.