JPH0774102A - Method of manufacturing compound semiconductor - Google Patents

Method of manufacturing compound semiconductor

Info

Publication number
JPH0774102A
JPH0774102A JP17477094A JP17477094A JPH0774102A JP H0774102 A JPH0774102 A JP H0774102A JP 17477094 A JP17477094 A JP 17477094A JP 17477094 A JP17477094 A JP 17477094A JP H0774102 A JPH0774102 A JP H0774102A
Authority
JP
Japan
Prior art keywords
substrate
molecular beam
group
substrate surface
pressure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17477094A
Other languages
Japanese (ja)
Inventor
Kazuaki Nishikata
一昭 西片
Masanori Irikawa
理徳 入川
Yuji Hiratani
雄二 平谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP17477094A priority Critical patent/JPH0774102A/en
Publication of JPH0774102A publication Critical patent/JPH0774102A/en
Pending legal-status Critical Current

Links

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Abstract

PURPOSE:To clean and flatten a substrate surface by adjusting the substrate temperature, processing time and group V molecular beam pressure on the substrate surface to specific conditions. CONSTITUTION:In the substrate cleaning process. When the group V molecular beam pressure is P1 and the molecular beam pressure at the growth of a crystal is P2, the group V molecular beam of which the pressure P1 is kept as P1<=(P2X1/2) is applied to the substrate surface. For example, the pressure of an As molecular beam that is emitted from a molecular beam source cell is set to be 10<-6>Torr and the beam is applied to the substrate surface to raise the temperature of the substrate at a rate of 30 deg.C/min. When the temperature of an InP substrate surface reaches 440 deg.C, the rise of the temperature is stopped and the temperature is held for 2 minutes. In the crystal growth process, the As molecular beam pressure is increased to 2X10<-5>Torr and when the pressure reaches a predetermined As molecular beam pressure, the shutters of other two molecular beam source are opened to irradiate the substrate surface with the As molecular beam, an In molecular beam and an Al molecular beam, and InAlAs crystal is deposited on the substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は分子線エピタキシー法
(MBE法)を介して化合物半導体を製造するための方
法に関する。
TECHNICAL FIELD The present invention relates to a method for producing a compound semiconductor through a molecular beam epitaxy method (MBE method).

【0002】[0002]

【従来の技術】化合物半導体を製造するための一手段と
して、分子線エピタキシー(MBE:Molecular Beam E
pitaxy)法が広く用いられている。周知のとおり、MB
E法は、成長させる半導体結晶の構成原子を分子線とし
て基板上に到達させる方法である。MBE法によるとき
は、きわめて薄い単結晶薄膜を組成制御してこれをイン
シチュウ(in situ) に成長させることができる。とく
に、複数の分子線を基板上に同時供給してこれらの強度
を独立に制御する場合は、原子層単位での結晶成長が行
なえ、均一で精密な組成をもつ半導体結晶が得られるな
ど、量子化デバイスを形成する上で有利である。ちなみ
に、MBE法を介してInAlAs、InGaAs、I
nGaAlAsなどの半導体結晶が三−五族基板上に形
成された量子化デバイスは、半導体レーザ素子、光検知
器、高速トランジスタなどへの利用が有望視されてい
る。
2. Description of the Related Art Molecular beam epitaxy (MBE) is one of the methods for producing compound semiconductors.
The pitaxy method is widely used. As is well known, MB
The E method is a method in which the constituent atoms of the semiconductor crystal to be grown reach the substrate as molecular beams. When using the MBE method, it is possible to control the composition of an extremely thin single crystal thin film and grow it in situ. In particular, when multiple molecular beams are simultaneously supplied onto the substrate and their intensities are independently controlled, crystal growth can be performed in atomic layer units, and semiconductor crystals with uniform and precise composition can be obtained. It is advantageous in forming a conversion device. By the way, InAlAs, InGaAs, I
Quantization devices in which semiconductor crystals such as nGaAlAs are formed on a Group 3-5 substrate are expected to be used for semiconductor laser devices, photodetectors, high-speed transistors, and the like.

【0003】MBE法において、三−五族基板上に高品
質の半導体結晶を安定して成長させるときは、分子線強
度のトランジェントの低減化、背圧制御によるAs圧安
定化のほかに、高真空雰囲気内における基板表面の清浄
化も重要になる。したがって、MBE法においては、基
板表面に付着している不純物をあらかじめ除去するため
の基板清浄化工程がとられる。
In the MBE method, when a high-quality semiconductor crystal is stably grown on a Group III-V substrate, transients of molecular beam intensity are reduced and As pressure is stabilized by controlling back pressure. Cleaning the substrate surface in a vacuum atmosphere is also important. Therefore, in the MBE method, a substrate cleaning process for removing impurities adhering to the substrate surface in advance is taken.

【0004】上述した基板清浄化工程としては、基板表
面の不純物を除去するために基板を加熱するのが一般で
あるが、かかる加熱処理において、蒸気圧の高い五族成
分が基板中から離脱するために、結晶成長に適した良好
な基板表面が得られないことがある。
In the above-mentioned substrate cleaning step, the substrate is generally heated in order to remove impurities on the surface of the substrate. In such heat treatment, the Group V component having a high vapor pressure is released from the substrate. Therefore, a good substrate surface suitable for crystal growth may not be obtained.

【0005】この五族成分の離脱防止対策として、MB
E法の結晶成長工程で用いられる分子線のうち、単独で
は実質的な堆積が生じない五族分子線を基板表面に照射
しつつ基板の表面温度を上昇させることが行なわれてい
る。たとえば、InP基板を用いるMBE法の場合は、
Pの離脱を防止するためにAs分子線を照射しつつ基板
の表面温度を上昇させている。
As a measure for preventing the separation of the Group V component, MB
Among the molecular beams used in the crystal growth step of the E method, the surface temperature of the substrate is raised while irradiating the surface of the substrate with a group 5 molecular beam that does not cause substantial deposition by itself. For example, in the case of MBE method using InP substrate,
In order to prevent the release of P, the surface temperature of the substrate is raised while irradiating the As molecular beam.

【0006】[0006]

【発明が解決しようとする課題】MBE法における基板
清浄化時のパラメータは、基板温度、処理時間、基板表
面が受ける五族分子線圧力である。これらのパラメータ
が適切に設定されないときは、平坦かつ十分に清浄化さ
れた基板表面を形成することができず、これが高品質の
結晶をつくる上での再現性を阻害する。しかるに、前述
した五族成分の離脱防止対策では、基板表面に照射する
五族分子線の圧力について技術的な検討がなされておら
ず、基板清浄化工程において照射する五族分子線圧力
を、結晶成長工程での五族分子線圧力と同等に設定して
いるにすぎないから、結晶成長に適した基板表面が得ら
れない。
The parameters for cleaning the substrate in the MBE method are the substrate temperature, the processing time, and the pressure of the Group 5 molecular beam on the substrate surface. If these parameters are not set properly, it will not be possible to form a flat and well-cleaned substrate surface, which impairs reproducibility in producing high quality crystals. However, in the measures for preventing the group V component separation described above, no technical study has been made on the pressure of the group 5 molecular beam irradiating the substrate surface. Since the pressure is set to be equal to the pressure of the group 5 molecular beam in the growth step, a substrate surface suitable for crystal growth cannot be obtained.

【0007】基板清浄化工程の五族分子線圧力について
検討した技術文献としては、特開平4−274315号
公報がみられる。この文献に記載された発明は、InP
基板の清浄化工程においてPの離脱防止に用いられるA
s分子線を、結晶成長に適した圧力(2×10-5Tor
r)よりも高い圧力(4×10-5Torr)に保持して
Pの離脱防止効果を高め、基板を高温(540〜595
℃)に保持して基板表面を清浄化している。さらに、そ
の後の結晶成長工程においては、As分子線圧力を結晶
成長に適した圧力(2×10-5Torr)にまで下げて
結晶の成長を開始している。しかし、この公知技術によ
るときは、下記の文献で指摘されているように、基板が
高温に曝されるためにこれの損傷が大きくなり、これ以
外にも、基板と結晶との界面に結晶成分比の異なる緩衝
層が生じるために急峻なポテンシャル障壁が形成され
ず、結晶の電気特性が低下する。 文献:C. Giannini et. al, Appl. Phys. Lett. 62, pp
149, 1993
Japanese Patent Laid-Open Publication No. 4-274315 can be seen as a technical document for examining the pressure of the group 5 molecular beam in the substrate cleaning step. The invention described in this document is InP
A used to prevent the separation of P in the substrate cleaning process
s molecular beam is applied at a pressure (2 × 10 −5 Tor) suitable for crystal growth.
r) to maintain a higher pressure (4 × 10 −5 Torr) to enhance the P separation prevention effect, and to raise the temperature of the substrate (540 to 595
C) to clean the substrate surface. Further, in the subsequent crystal growth step, the As molecular beam pressure is lowered to a pressure suitable for crystal growth (2 × 10 −5 Torr) to start crystal growth. However, according to this known technique, as pointed out in the following documents, the substrate is exposed to a high temperature, so that the damage of the substrate becomes large, and in addition to this, crystal components are present at the interface between the substrate and the crystal. Since a buffer layer having a different ratio is generated, a steep potential barrier is not formed, and the electrical characteristics of the crystal deteriorate. Reference: C. Giannini et. Al, Appl. Phys. Lett. 62, pp
149, 1993

【0008】その他、特開昭60−58613号公報、
特開平4−122731号公報には酸化膜を形成してい
る酸化物を低温で離脱しやすい酸化物組成に変化させる
ための方法として、三族原子を酸化膜に微量照射するこ
とが開示されている。これらの方法は、酸化膜の低温離
脱方法として有効なものであるが、多結晶の状態で堆積
している酸化物に三族原子を照射した場合は、たとえ
ば、In原子が不規則に堆積することとなり、また、三
族原子照射時の基板表面が三族面であると、基板表面の
平坦性が損なわれる。
In addition, Japanese Patent Laid-Open No. 60-58613,
Japanese Unexamined Patent Publication No. 4-122731 discloses irradiating a small amount of a Group III atom on the oxide film as a method for changing the oxide composition forming the oxide film to an oxide composition that is easily released at low temperature. There is. These methods are effective as low-temperature desorption methods for oxide films. However, when an oxide deposited in a polycrystalline state is irradiated with Group 3 atoms, for example, In atoms are irregularly deposited. In addition, if the surface of the substrate upon irradiation with the Group III atoms is the Group III surface, the flatness of the surface of the substrate is impaired.

【0009】[発明の目的]本発明は既存の分子線エピ
タキシー法(MBE法)にみられるこれらの技術的課題
に鑑み、基板表面をより高度に清浄化、平坦化すること
ができ、基板表面と結晶成長層との界面に不純物が介在
することのない化合物半導体の製造方法、すなわち、高
品質の化合物半導体を再現性よく製造することのできる
方法を提供しようとするものである。
[Object of the Invention] In view of these technical problems existing in the existing molecular beam epitaxy method (MBE method), the present invention can clean and flatten the substrate surface to a higher degree, An object of the present invention is to provide a method for producing a compound semiconductor in which impurities are not present at the interface between a crystal growth layer and a crystal growth layer, that is, a method capable of producing a high quality compound semiconductor with good reproducibility.

【0010】[0010]

【課題を解決するための手段】本発明の請求項1に係る
化合物半導体の製造方法は、所期の目的を達成するため
に、高真空雰囲気下において三−五族の化合物からなる
基板の表面を加熱処理しつつ分子線照射処理して基板表
面を清浄化するための基板清浄化工程と、高真空雰囲気
下において半導体結晶の構成原子からなる複数の分子線
を清浄化後の基板表面に照射して基板表面上に半導体結
晶を堆積成長させるための結晶成長工程とを含んでいる
こと、および、基板清浄化工程において基板表面を加熱
処理するときに、基板表面に三族安定化面が出現するま
で基板の表面温度を上昇させること、および、基板清浄
化工程において基板表面を分子線照射処理するときに、
結晶成長工程で用いられる分子線のうちから単独では基
板表面への実質的な堆積が生じない五族分子線を用い、
かつ、その五族分子線の圧力をP1 、結晶成長時の分子
線圧力をP2 とした場合に、P1 ≦(P2 ×1/2)の
圧力に保持された当該五族分子線を基板表面に照射する
ことを特徴とする。上記における基板表面への五族分子
線の照射は、基板が常温のときから開始してもよいが、
五族成分が基板から離脱する時点で開始すれば十分であ
る。ちなみに、InP基板の場合は、高真空下で基板温
度約200℃まではPが離脱しないので、基板温度が約
200℃となった時点で五族分子線の照射を行なえばよ
い。この五族分子線の照射は、下記に説明する請求項2
〜4に係る基板清浄化工程においても同様である。
In order to achieve the intended purpose, the method of manufacturing a compound semiconductor according to claim 1 of the present invention provides a surface of a substrate made of a compound of Group 3-5 in a high vacuum atmosphere. Substrate cleaning process for cleaning the substrate surface by molecular beam irradiation while heat-treating, and irradiating the cleaned substrate surface with multiple molecular beams consisting of the constituent atoms of semiconductor crystals in a high vacuum atmosphere And a crystal growth step for depositing and growing a semiconductor crystal on the substrate surface, and when the substrate surface is heat-treated in the substrate cleaning step, a Group III stabilizing surface appears on the substrate surface. Until the surface temperature of the substrate is increased, and when the substrate surface is subjected to molecular beam irradiation treatment in the substrate cleaning step,
Of the molecular beams used in the crystal growth process, a group 5 molecular beam that does not cause substantial deposition on the substrate surface by itself is used.
Further, when the pressure of the group 5 molecular beam is P 1 and the molecular beam pressure during crystal growth is P 2 , the group 5 molecular beam held at a pressure of P 1 ≦ (P 2 × 1/2) Is irradiated onto the substrate surface. Irradiation of the Group 5 molecular beam onto the substrate surface in the above may be started when the substrate is at room temperature,
It suffices to start when the Group V component leaves the substrate. By the way, in the case of the InP substrate, since P does not dissociate up to a substrate temperature of about 200 ° C. under high vacuum, irradiation of the Group 5 molecular beam may be performed when the substrate temperature reaches about 200 ° C. Irradiation with this Group 5 molecular beam is described below.
The same applies to the substrate cleaning steps according to 4 above.

【0011】本発明の請求項2に係る化合物半導体の製
造方法は、前記基板清浄化工程おいて、基板の表面温度
をT1 、五族安定化面−三族安定化面の遷移温度T2
した場合に、基板表面に三族安定化面が出現した後に、
前記五族分子線を基板表面に照射しつつ基板表面温度を
2 ≦T1 ≦(T2 +50℃)に保持する。
In the method for producing a compound semiconductor according to a second aspect of the present invention, in the substrate cleaning step, the surface temperature of the substrate is T 1 , and the transition temperature T 2 between the Group 5 stabilization surface and the Group III stabilization surface is T 2. In the case of, after the Group III stabilizing surface appears on the substrate surface,
The substrate surface temperature is maintained at T 2 ≦ T 1 ≦ (T 2 + 50 ° C.) while irradiating the substrate surface with the Group 5 molecular beam.

【0012】本発明の請求項3に係る化合物半導体の製
造方法は、InP基板を用いる前記基板清浄化工程おい
て、1×10-5〜1×10-7Torrの圧力に保持され
たAs原子を含む分子線を基板表面に照射しつつ、基板
表面に三族安定化面が出現するまで基板の表面温度を上
昇させる。この場合においてAs原子を含む分子線は、
1×10-6〜1×10-7Torrの圧力に保持されてい
ることがより望ましい。
According to a third aspect of the present invention, there is provided a method of manufacturing a compound semiconductor, wherein in the substrate cleaning step using an InP substrate, As atoms kept at a pressure of 1 × 10 −5 to 1 × 10 −7 Torr. While irradiating the substrate surface with a molecular beam containing, the surface temperature of the substrate is raised until a Group III stabilizing surface appears on the substrate surface. In this case, the molecular beam containing the As atom is
More preferably, the pressure is maintained at 1 × 10 −6 to 1 × 10 −7 Torr.

【0013】本発明の請求項4に係る化合物半導体の製
造方法は、前記基板清浄化工程において、基板表面に三
族安定化面が出現した後、1×10-5〜1×10-7To
rrの圧力に保持されたAs原子を含む分子線を基板表
面に照射しつつ、基板の表面温度をT2 ≦T1 ≦(T2
+50℃)に保持する。
In the method for producing a compound semiconductor according to a fourth aspect of the present invention, after the Group III stabilizing surface appears on the substrate surface in the substrate cleaning step, 1 × 10 −5 to 1 × 10 −7 To is obtained.
While irradiating the substrate surface with a molecular beam containing As atoms held at a pressure of rr, the surface temperature of the substrate is T 2 ≦ T 1 ≦ (T 2
Hold at + 50 ° C).

【0014】本発明の請求項5に係る化合物半導体の製
造方法は、所期の目的を達成するために、高真空雰囲気
下において三−五族の化合物からなる基板の表面を加熱
処理しつつ分子線照射処理して基板表面を清浄化するた
めの基板清浄化工程と、高真空雰囲気下において半導体
結晶の構成原子からなる複数の分子線を清浄化後の基板
表面に照射して基板表面上に半導体結晶を堆積成長させ
るための結晶成長工程とを含んでいること、および、前
記基板清浄化工程において、基板表面に五族安定化面が
出現してから三族安定化面が出現するよりも前に、基板
を構成している三族原子の分子線を基板表面に照射す
る。この場合における三族分子線の照射時間は、たとえ
ば、1〜数秒程度である。
In order to achieve the intended purpose, the method for producing a compound semiconductor according to claim 5 of the present invention comprises heating the surface of a substrate made of a compound of Group 3-5 in a high-vacuum atmosphere while heating the molecule. Substrate cleaning process to clean the substrate surface by beam irradiation, and to irradiate the cleaned substrate surface with a plurality of molecular beams composed of the constituent atoms of the semiconductor crystal in a high vacuum atmosphere so that the substrate surface A crystal growth step for depositing and growing a semiconductor crystal; and, in the substrate cleaning step, a Group V stabilization surface appears on the substrate surface and then a Group III stabilization surface appears. Before, the surface of the substrate is irradiated with the molecular beam of the group III atoms constituting the substrate. The irradiation time of the Group III molecular beam in this case is, for example, about 1 to several seconds.

【0015】本発明の請求項6に係る化合物半導体の製
造方法は、InP基板を用いる基板清浄化工程におい
て、基板表面に五族安定化面が出現するまで基板の表面
温度を上昇させながら、1×10-5〜1×10-7Tor
rの圧力に保持されたAs原子を含む分子線を基板表面
に照射すること、および、基板表面に五族安定化面が出
現した後あって三族安定化面が出現するよりも前に、I
n原子を含む分子線を基板表面に照射することを行な
う。
In a method of manufacturing a compound semiconductor according to a sixth aspect of the present invention, in a substrate cleaning process using an InP substrate, while increasing the surface temperature of the substrate until a Group 5 stabilizing surface appears on the substrate surface, 1 × 10 -5 to 1 × 10 -7 Tor
Irradiating the substrate surface with a molecular beam containing As atoms held at the pressure of r, and after the appearance of the Group 5 stabilizing surface on the substrate surface and before the appearance of the Group 3 stabilizing surface, I
The surface of the substrate is irradiated with a molecular beam containing n atoms.

【0016】[0016]

【作用】本発明者らは、分子線エピタキシー法(MBE
法)による化合物半導体の製造方法について鋭意研究を
行ない実験を重ねて本発明に到達した。すなわち、本発
明においては、MBE法に関する研究、実験から得られ
た下記技術事項のうち、有害な事項、望ましくない事項
を排除して有効な事項のみを抽出し、これら有効事項を
技術的にまとめたものである。 (1) 基板清浄化工程において、基板中の五族成分の離脱
を防止するためには、基板中の五族原子と同一または異
なる種類の五族分子線を基板表面に照射することが有効
であるが、この際に五族分子線圧力P1 を高くすると、
基板と結晶との界面に遷移層が形成されやすくなる。 (2) 基板清浄化工程において、基板表面に三族安定化面
が出現している状態のときは、基板表面から速やかに不
純物が除去されるが、基板表面に五族安定化面が出現し
ている状態のときは、基板表面の不純物除去速度が著し
く低下する。 (3) 基板清浄化処理中に五族分子線圧力P1 を高くする
場合は、基板表面に三族安定化面を出現させるための基
板温度T1 がより高くなり、熱による基板損傷が甚だし
くなる。 (4) 基板温度T1 が五−三遷移温度(五族安定化面から
三族安定化面への遷移温度)T2 +50℃を超過する場
合は、基板中の五族成分の離脱に起因した基板損傷が顕
著になり、基板表面に荒れを生じるが、基板温度T1
(T2 +50℃)以下の場合は、このような五族成分の
離脱が著しく小さくなる。 (5) 基板上に酸化物が多結晶体で堆積しており、かつ、
反射型高速電子回折装置(RHEED)を介した多結晶
体の像がハローパターンまたは1×1パターンを示して
いるときに、その多結晶体へ向けて三族原子を照射する
と、In原子が不規則に堆積する。 (6) 基板表面が五族安定化面を呈しているときに三族原
子を基板表面に照射すると、基板表面上で化学反応が起
こり、酸化膜を形成している酸化物が低温で離脱しやす
い酸化物組成に変化する。その結果、酸化膜が基板表面
から急激に離脱して原子レベルで平坦な三族表面が基板
表面に現れる。 (7) 基板が三族表面を呈しているときに三族原子を基板
表面に照射すると、基板表面には余分な三族原子が堆積
してしまい、基板表面の平坦性が悪くなる。 (8) 前記(6) 項の処理を終えた後の結晶成長工程におい
て、三−五族化合物半導体を基板表面に堆積成長させた
場合は、基板と結晶との界面に不純物が介在したり遷移
層を生じることがなく、良質の半導体結晶が基板上に成
長する。 (9) 前記(6) 項の処理を行なうことにより、三族安定化
面がさらに低い温度で基板表面に現れる。 (10)前記(6) 項の処理により基板表面に現れた三族安定
化面は、酸素、炭素などの不純物がきわめて少ない。
The present inventors have conducted a molecular beam epitaxy method (MBE
Method) to produce a compound semiconductor, the present invention has been achieved through repeated studies and repeated experiments. That is, in the present invention, out of the following technical matters obtained from research and experiments relating to the MBE method, harmful matters and undesirable matters are excluded, only effective matters are extracted, and these effective matters are technically summarized. It is a thing. (1) In the substrate cleaning process, it is effective to irradiate the surface of the substrate with a group 5 molecular beam of the same type as or different from the group 5 atoms in the substrate in order to prevent the group 5 components from separating from the substrate. However, if the group 5 molecular beam pressure P 1 is increased at this time,
A transition layer is easily formed at the interface between the substrate and the crystal. (2) In the substrate cleaning process, when the Group III stabilizing surface appears on the substrate surface, impurities are quickly removed from the substrate surface, but the Group V stabilizing surface appears on the substrate surface. In this state, the removal rate of impurities on the substrate surface is significantly reduced. (3) When the group 5 molecular beam pressure P 1 is increased during the substrate cleaning process, the substrate temperature T 1 for causing the group III stabilizing surface to appear on the substrate surface becomes higher, and the substrate is significantly damaged by heat. Become. (4) When the substrate temperature T 1 exceeds the 5-3 transition temperature (transition temperature from the Group 5 stabilization surface to the Group 3 stabilization surface) T 2 + 50 ° C., it is due to the release of the Group 5 component from the substrate. The substrate damage becomes remarkable and the substrate surface is roughened. However, when the substrate temperature T 1 is (T 2 + 50 ° C.) or less, such group V component separation is significantly reduced. (5) The oxide is deposited on the substrate in polycrystalline form, and
When an image of a polycrystal obtained through a reflection type high-energy electron diffraction device (RHEED) shows a halo pattern or a 1 × 1 pattern, when the polycrystal is irradiated with a Group 3 atom, In atoms are Deposit in order. (6) When the substrate surface is exposed to Group III atoms while it is a Group V stabilized surface, a chemical reaction occurs on the substrate surface, and the oxide forming the oxide film is released at low temperature. The oxide composition changes easily. As a result, the oxide film is rapidly separated from the substrate surface, and a Group III surface that is flat at the atomic level appears on the substrate surface. (7) When the substrate surface is irradiated with Group III atoms while the substrate is a Group III surface, extra Group III atoms are deposited on the substrate surface, resulting in poor flatness of the substrate surface. (8) When a Group III-V compound semiconductor is deposited and grown on the surface of the substrate in the crystal growth step after the treatment of the above item (6), impurities or transitions occur at the interface between the substrate and the crystal. Good quality semiconductor crystals grow on the substrate without the formation of layers. (9) By performing the treatment of the above item (6), the Group III stabilizing surface appears on the substrate surface at a lower temperature. (10) The Group III-stabilized surface, which appears on the substrate surface by the treatment of the above item (6), has extremely few impurities such as oxygen and carbon.

【0017】[0017]

【実施例】本発明方法で用いられる分子線エピタキシー
装置について、図1を参照して説明する。図1におい
て、気密な耐圧容器からなる成長室1は、相互に組み合
わされた容器本体1aと蓋体1bとを備え、これら容器
本体1a、蓋体1bの各壁面に液体窒素シュラウド2が
設けられている。図1において、基板ホルダ3は、回転
用の伝動系4を含んで成長室1内の中心部に回転自在に
配置されており、その回転伝動系4と、容器本体1a側
の壁面を貫通しているマニュピレータ5とが相互に連結
されている。さらに、基板ホルダ3は、これを加熱する
ための電気ヒータ(図示せず)を備えており、そのヒー
タがマニュピレータ5側から制御できるようになってい
る。成長室1の蓋体1b側には、その蓋体壁を外部から
内部に向けて貫通して基板ホルダ3側に向けられた複数
本の分子線源セル6a〜6dが装着されている。成長室
1内において、各分子線源セル6a〜6dの先端側に
は、これらセルからの各ビームを個別に遮断するための
各シャッタ7a〜7dが備えつけられているとともに、
各シャッタ7a〜7dと基板ホルダ3との間には、これ
らセルからの各ビームを一括して遮断するためのメイン
シャッタ8が配置されている。成長室1の容器本体1a
に設けられたゲートバルブ9は、成長室1と図示しない
基板準備室とを連結しており、さらに、その基板準備室
側には図示しない基板導入室が連結されている。図1に
おいて、容器本体1aの互いに対面する壁面部に装着さ
れた反射型高速電子回折装置(RHEED)10とRH
EED用の蛍光スクリーン11は、これらの先端が成長
室1内に介入していて基板ホルダ3側との対応がとれて
いる。四重極型質量分析装置(QMS)12も、容器本
体1aの壁面部に装着されてこれの先端が成長室1内に
介入している。分子線モニタ用のイオンゲージ13は、
成長室1内の容器本体1a側に配置されている。図1に
おいて、14は成長室1に設けられた覗窓を示し、15
は基板ホルダ3上に保持される基板を示す。
EXAMPLE A molecular beam epitaxy apparatus used in the method of the present invention will be described with reference to FIG. In FIG. 1, a growth chamber 1 composed of an airtight pressure-resistant container includes a container body 1a and a lid body 1b which are combined with each other, and a liquid nitrogen shroud 2 is provided on each wall surface of the container body 1a and the lid body 1b. ing. In FIG. 1, the substrate holder 3 is rotatably disposed in the center of the growth chamber 1 including a transmission system 4 for rotation, and penetrates the rotation transmission system 4 and the wall surface on the container body 1a side. The manipulator 5 is connected to each other. Further, the substrate holder 3 is equipped with an electric heater (not shown) for heating the substrate holder 3, and the heater can be controlled from the manipulator 5 side. On the lid 1b side of the growth chamber 1, a plurality of molecular beam source cells 6a to 6d are attached, which pass through the lid wall from the outside toward the inside and face the substrate holder 3 side. Inside the growth chamber 1, shutters 7a to 7d for individually blocking the beams from these molecular beam source cells 6a to 6d are provided on the tip side, and
Between each of the shutters 7a to 7d and the substrate holder 3, a main shutter 8 for collectively blocking the beams from these cells is arranged. Container body 1a of growth chamber 1
The gate valve 9 provided in the above connects the growth chamber 1 and a substrate preparation chamber (not shown), and further, a substrate introduction chamber (not shown) is connected to the substrate preparation chamber side. In FIG. 1, a reflection type high speed electron diffraction device (RHEED) 10 and an RH mounted on wall surfaces of a container body 1a facing each other.
The fluorescent screen 11 for EED has its tips intervening in the growth chamber 1 so as to correspond to the substrate holder 3 side. The quadrupole mass spectrometer (QMS) 12 is also mounted on the wall surface portion of the container body 1 a, and the tip of this is interposed in the growth chamber 1. Ion gauge 13 for molecular beam monitor
It is arranged in the growth chamber 1 on the container body 1a side. In FIG. 1, reference numeral 14 denotes a viewing window provided in the growth chamber 1, and 15
Indicates a substrate held on the substrate holder 3.

【0018】本発明方法において図1に例示された分子
線エピタキシー装置を用い、かつ、InP基板15の
(100)面上にInAlAs結晶を成長させる例を以
下に説明する。In分子線、Al分子線、As分子線を
つくるための各線源材料は、各分子線源セル6a〜6d
のうち、所定数のセル内に収納されて分子線が昇華また
は蒸発する温度に熱せられている。たとえば、In線源
材料は分子線源セル6a内に収納されており、Al線源
材料は分子線源セル6b内に収納されており、As線源
材料は分子線源セル6C内に収納されている。InP基
板15は、基板導入室から基板準備室内へ搬入され、基
板準備室内での加熱処理により水分その他を除去された
後、基板準備室から成長室1内へ搬入されて基板ホルダ
3にセットされる。このようにしてInP基板15が搬
入される成長室1内は、不純物を含まない超高真空雰囲
気に保持されている。InP基板15の清浄化工程にお
いては、基板清浄化用の分子線として、InP基板15
からのP原子の離脱を防止するためにAs分子線が用い
られる。分子線源セル6cから出射されるAs分子線の
圧力は、そのセル6cの加熱温度とそのセル6cの先端
にあるシャッタ7cの機械的開閉とで制御される。この
清浄化時において、基板表面が三族安定化面であるか五
族安定化面であるかの判定は、反射型高速電子回折装置
10と蛍光スクリーン11とを介した電子線回折により
行なわれ、清浄化された基板15の表面状態は、電子線
回折と走査型電子顕微鏡を介して観察される。
An example of using the molecular beam epitaxy apparatus illustrated in FIG. 1 in the method of the present invention and growing an InAlAs crystal on the (100) plane of the InP substrate 15 will be described below. The respective source materials for producing the In molecular beam, Al molecular beam, and As molecular beam are the respective molecular beam source cells 6a to 6d.
Among them, they are housed in a predetermined number of cells and heated to a temperature at which the molecular beam sublimes or evaporates. For example, the In radiation source material is stored in the molecular radiation source cell 6a, the Al radiation source material is stored in the molecular radiation source cell 6b, and the As radiation source material is stored in the molecular radiation source cell 6C. ing. The InP substrate 15 is carried into the substrate preparation chamber from the substrate introduction chamber, and after moisture and other substances are removed by heat treatment in the substrate preparation chamber, it is carried into the growth chamber 1 from the substrate preparation chamber and set on the substrate holder 3. It In this way, the inside of the growth chamber 1 into which the InP substrate 15 is loaded is maintained in an ultrahigh vacuum atmosphere containing no impurities. In the cleaning process of the InP substrate 15, the InP substrate 15 is used as a molecular beam for cleaning the substrate.
The As molecular beam is used to prevent the detachment of the P atom from the. The pressure of the As molecular beam emitted from the molecular beam source cell 6c is controlled by the heating temperature of the cell 6c and the mechanical opening / closing of the shutter 7c at the tip of the cell 6c. At the time of this cleaning, whether the surface of the substrate is a Group III stabilizing surface or a Group V stabilizing surface is determined by electron diffraction through the reflection type high speed electron diffraction device 10 and the fluorescent screen 11. The surface condition of the cleaned substrate 15 is observed through electron beam diffraction and a scanning electron microscope.

【0019】図2(縦軸:As分子線圧力、横軸:基板
の五−三遷移温度)は、上述した基板清浄化工程の分子
線照射処理において、InP基板15の表面へ照射する
As分子線の圧力を決定するために行なわれた実験結果
を示している。図2において、図中の各プロット(×
点)は、種々のAs分子線圧力における五−三遷移温度
の測定値であり、これらの測定値点が実線で結ばれてい
る。図2を参照して明らかなように、InP基板15の
表面は、図中の実線よりも低温側において五族安定化面
となり、図中の実線よりも高温側において三族安定化面
となる。As分子線圧力が10-5〜10-7Torrの範
囲内にあるときは、As分子線圧力の低下にともなって
五−三遷移温度がほぼ直線的に低下する。このような場
合は、清浄化後に得られる基板の表面に荒れが生ぜず、
成長結晶の電気特性も低下しない。とくに、As分子線
圧力が高い場合に、InP基板表面のInAs化が促進
され、InAsの格子定数がInPと大きく異なる事態
を生じるが、As分子線圧力が10-6〜10-7Torr
の範囲内にあるときは、このような事態が抑制されるの
でより望ましい。As分子線圧力が10-7Torr未満
のときは、五−三遷移温度がその直線から外れて高温側
へシフトする。これは、As分子線圧力10-7Torr
未満においてPがInP基板15から著しく離脱し、そ
の基板表層部の遷移条件が変化するからである。このよ
うな場合には、清浄化後に得られる基板の表面に荒れが
生じる。As分子線圧力が10-5Torrを超えるとき
は、基板内部でのP原子とAs原子との置換が促進され
るために、基板と成長結晶との界面に緩衝層が生じて結
晶の電気特性が低下する。したがって、基板清浄化工程
におけるAs分子線圧力P1 は、10-5〜10-7Tor
rの範囲内に設定されることを要し、この値が10-6
10-7Torrの範囲内に設定されることがより望まし
い。
FIG. 2 (vertical axis: As molecular beam pressure, horizontal axis: substrate 5-3 transition temperature) shows As molecules irradiated to the surface of the InP substrate 15 in the molecular beam irradiation process of the substrate cleaning step described above. 7 shows the results of experiments performed to determine the line pressure. In Fig. 2, each plot (x
The points) are the measured values of the 5-3 transition temperature at various As molecular beam pressures, and these measured value points are connected by a solid line. As is clear with reference to FIG. 2, the surface of the InP substrate 15 serves as a Group 5 stabilizing surface on the lower temperature side than the solid line in the figure and as a Group 3 stabilizing surface on the higher temperature side than the solid line in the figure. . When the As molecular beam pressure is in the range of 10 −5 to 10 −7 Torr, the 5-3 transition temperature decreases almost linearly with the decrease of the As molecular beam pressure. In such a case, the surface of the substrate obtained after cleaning is not roughened,
The electrical characteristics of the grown crystal do not deteriorate. In particular, when the As molecular beam pressure is high, the formation of InAs on the surface of the InP substrate is promoted, which causes a situation where the lattice constant of InAs is greatly different from that of InP, but the As molecular beam pressure is 10 −6 to 10 −7 Torr.
When it is within the range, it is more desirable because such a situation is suppressed. When the As molecular beam pressure is less than 10 −7 Torr, the 5-3 transition temperature deviates from the straight line and shifts to the high temperature side. This is As molecular beam pressure 10 -7 Torr
This is because P is significantly separated from the InP substrate 15 at a temperature lower than the above and the transition condition of the surface layer of the substrate changes. In such a case, the surface of the substrate obtained after cleaning is roughened. When the As molecular beam pressure exceeds 10 −5 Torr, the substitution of P atoms and As atoms inside the substrate is promoted, so that a buffer layer is formed at the interface between the substrate and the grown crystal, and the electrical characteristics of the crystal are increased. Is reduced. Therefore, the As molecular beam pressure P 1 in the substrate cleaning step is 10 −5 to 10 −7 Tor.
It is necessary to be set within the range of r, and this value is 10 -6 ~
It is more desirable to set it within the range of 10 −7 Torr.

【0020】基板表面の不純物を完全に除去するために
は、基板表面に三族安定化面が形成されていることを要
する。そのための条件として、As分子線圧力P1 が1
-5TorrのときはInP基板15の表面温度T1
500℃以上とし、As分子線圧力P1 が10-7Tor
rのときはInP基板15の表面温度T1 を350℃以
上とする。ただし、表面温度T1 が臨界温度(五−三遷
移温度T2 +50℃)を超える場合は、既述のとおりP
の離脱に起因して良好な基板表面が得られなくなるの
で、T1 を臨界温度以下に保持するための制御が必要に
なる。したがって、表面温度T1 については、T2 ≦T
1 ≦(T2 +50℃)を満足させるようにこれを制御す
ることとなり、こうした場合に、表面荒れをきたすこと
なく基板表面の不純物を除去することができる。
In order to completely remove the impurities on the substrate surface, it is necessary to form a Group III stabilizing surface on the substrate surface. As a condition therefor, the As molecular beam pressure P 1 is 1
When it is 0 −5 Torr, the surface temperature T 1 of the InP substrate 15 is set to 500 ° C. or higher, and the As molecular beam pressure P 1 is 10 −7 Torr.
When r, the surface temperature T 1 of the InP substrate 15 is set to 350 ° C. or higher. However, when the surface temperature T 1 exceeds the critical temperature (five-three transition temperature T 2 + 50 ° C.), P as described above.
Since good substrate surface due to the release of can not be obtained, it is necessary to control to hold the T 1 below the critical temperature. Therefore, for the surface temperature T 1 , T 2 ≦ T
This is controlled so as to satisfy 1 ≦ (T 2 + 50 ° C.), and in such a case, impurities on the substrate surface can be removed without causing surface roughness.

【0021】つぎに、上記に基づく本発明方法の各具体
例を説明する。 [具体例1]具体例1の場合は、InP基板上にInA
lAs結晶を成長させる。超高真空雰囲気下で基板の表
面を加熱処理しつつ分子線照射処理して基板表面を清浄
化する基板清浄化工程のときに、分子線源セルから出射
されるAs分子線の圧力P1 を1×10-6Torrに設
定し、当該圧力のAs分子線を基板表面に照射しつつ基
板を30℃/分で温度上昇させた。このようにしたとこ
ろ、InP基板の表面温度T1 が420℃に達した時点
で基板表面に三族安定化面の出現することが確認され
た。その後、基板加熱処理のみを上記の条件で続行し、
InP基板の表面温度T1が440℃に達した時点で温
度上昇を停止し、この状態を2分間保持した。温度上昇
停止後、2分間の経過をまち、電子回折装置と電子顕微
鏡とを介して基板表面を観察したところ、InP基板は
凹凸のない平滑な表面を呈しており、基板表面にPの離
脱に起因した表面荒れのないことが確認された。上述し
た基板清浄化工程に引き続く結晶成長工程においては、
前記分子線源セルから出射されるAs分子線の圧力をシ
ャッタ操作で2×10-5Torrに高めるとともに、所
定のAs分子線圧力が得られた時点で、他の二つの分子
線源セルをシャッタにより開放して、As分子線、In
分子線、Al分子線を基板表面に向けてそれぞれ照射
し、InAlAs結晶をInP基板上に堆積成長させ
た。具体例1で得られたInAlAs結晶を評価するた
めに、これをSIMS(二次イオン質量分析装置)およ
びX線回折装置にかけた。SIMSによる分析結果を参
照して、具体例1のInAlAs結晶中には不純物が殆
ど存在していない。すなわち、具体例1のInAlAs
結晶は、従来のMBE法で作製されたInAlAs結晶
と比べ、不純物含有量が200分の1以下に低減されて
いる。さらに、X線回折装置による測定結果を参照し
て、具体例1の化合物半導体は、InP基板と結晶との
界面に緩衝層が形成されておらず、ポテンシャル障壁が
良好であった。
Next, specific examples of the method of the present invention based on the above will be described. [Specific Example 1] In the specific example 1, InA is formed on the InP substrate.
Grow lAs crystals. The pressure P 1 of As molecular beam emitted from the molecular beam source cell during the substrate cleaning step of cleaning the substrate surface by performing molecular beam irradiation treatment while heating the substrate surface in an ultrahigh vacuum atmosphere. The temperature of the substrate was raised at 30 ° C./min while setting the pressure to 1 × 10 −6 Torr and irradiating the surface of the substrate with As molecular beam having the pressure. By doing so, it was confirmed that a Group III stabilizing surface appeared on the substrate surface when the surface temperature T 1 of the InP substrate reached 420 ° C. After that, only the substrate heat treatment is continued under the above conditions,
When the surface temperature T 1 of the InP substrate reached 440 ° C., the temperature rise was stopped and this state was maintained for 2 minutes. After the temperature rise was stopped, two minutes later, the surface of the substrate was observed through an electron diffractometer and an electron microscope. As a result, the InP substrate had a smooth surface with no unevenness, and P did not separate from the substrate surface. It was confirmed that there was no surface roughness due to it. In the crystal growth process subsequent to the above substrate cleaning process,
The pressure of the As molecular beam emitted from the molecular beam source cell is increased to 2 × 10 −5 Torr by shutter operation, and when the predetermined As molecular beam pressure is obtained, the other two molecular beam source cells are Opened by shutter, As molecular beam, In
The InAlAs crystal was deposited and grown on the InP substrate by irradiating the substrate surface with the molecular beam and the Al molecular beam, respectively. In order to evaluate the InAlAs crystal obtained in Example 1, this was subjected to SIMS (secondary ion mass spectrometer) and X-ray diffractometer. Referring to the analysis result by SIMS, almost no impurities are present in the InAlAs crystal of Example 1. That is, InAlAs of Specific Example 1
Compared with the InAlAs crystal produced by the conventional MBE method, the crystal content of the crystal is reduced to 1/200 or less. Further, referring to the measurement results by the X-ray diffractometer, the compound semiconductor of Example 1 had a good potential barrier because no buffer layer was formed at the interface between the InP substrate and the crystal.

【0022】[具体例2]具体例2の場合も、InP基
板上にInAlAs結晶を成長させる。超高真空雰囲気
下で基板の表面を加熱処理しつつ分子線照射処理して基
板表面を清浄化する基板清浄化工程のときに、分子線源
セルから出射されるAs分子線の圧力P1 を1×10-7
Torrに設定し、当該圧力のAs分子線を基板表面に
照射しつつ基板を35℃/分で温度上昇させた。このよ
うにしたところ、InP基板の表面温度T1 が350℃
に達した時点で基板表面に三族安定化面の出現すること
が確認された。その後、基板加熱処理のみを上記の条件
で続行し、InP基板の表面温度T1が400℃に達し
た時点で温度上昇を停止し、この状態を5分間保持し
た。温度上昇停止後、5分間の経過をまち、電子回折装
置と電子顕微鏡とを介して基板表面を観察したところ、
InP基板は凹凸のない平滑な表面を呈しており、基板
表面にPの離脱に起因した表面荒れのないことが確認さ
れた。上述した基板清浄化工程に引き続く結晶成長工程
は、これを具体例1と同様に実施して、InAlAs結
晶をInP基板上に堆積成長させた。具体例2で得られ
たInAlAs結晶は、具体例1と同様の評価テストに
おいて、不純物が完全に除去されており、その化合物半
導体のポテンシャル障壁も具体例1と同様に良好であっ
た。
[Specific Example 2] Also in the specific example 2, InAlAs crystals are grown on the InP substrate. The pressure P 1 of As molecular beam emitted from the molecular beam source cell during the substrate cleaning step of cleaning the substrate surface by performing molecular beam irradiation treatment while heating the substrate surface in an ultrahigh vacuum atmosphere. 1 x 10 -7
Torr was set, and the temperature of the substrate was raised at 35 ° C./min while irradiating the surface of the substrate with the As molecular beam having the pressure. As a result, the surface temperature T 1 of the InP substrate was 350 ° C.
It was confirmed that a Group III stabilizing surface appeared on the substrate surface when the temperature reached the temperature. Then, only the substrate heat treatment was continued under the above conditions, and when the surface temperature T 1 of the InP substrate reached 400 ° C., the temperature rise was stopped and this state was maintained for 5 minutes. After the temperature rise was stopped, after 5 minutes, the substrate surface was observed through an electron diffraction device and an electron microscope.
The InP substrate had a smooth surface without irregularities, and it was confirmed that the surface of the InP substrate was not roughened due to the release of P. The crystal growth step subsequent to the above-mentioned substrate cleaning step was carried out in the same manner as in Example 1 to deposit and grow InAlAs crystals on the InP substrate. In the InAlAs crystal obtained in Example 2, the impurities were completely removed in the evaluation test similar to Example 1, and the potential barrier of the compound semiconductor was also good as in Example 1.

【0023】[具体例3]具体例3の場合も、InP基
板上にInAlAs結晶を成長させる。超高真空雰囲気
下で基板の表面を加熱処理しつつ分子線照射処理して基
板表面を清浄化する基板清浄化工程のときに、分子線源
セルから出射されるAs分子線の圧力P1 をシャッタ操
作により5×10-7Torrに設定し、当該圧力のAs
分子線を基板表面に照射しつつ基板を30℃/分で温度
上昇させた。このようにしたところ、InP基板の表面
温度T1 が300℃に達した時点で基板表面に五族安定
化面の出現することが確認された。その後、上記の処理
を続行しつつ、InP基板の表面温度T1 が360℃に
達した時点で、三族のIn分子線を2×10-7Torr
で2秒間、基板表面に照射したところ、基板表面の酸化
膜が急激に離脱し、その基板表面に三族安定化面の出現
することが確認された。この確認は四重極型質量分析装
置(QMS)と反射型高速電子回折装置(RHEED)
とによる。上記の比較例として基板表面へのIn分子線
の照射を省略した場合は、InP基板の表面温度T1
395℃に達した時点で、基板表面に三族安定化面が出
現した。基板表面に三族安定化面が出現した時点で基板
の温度上昇を停止し、電子回折装置と電子顕微鏡とを介
して基板表面を観察したところ、InP基板は凹凸のな
い平滑な表面を呈していた。上述した基板清浄化工程に
引き続く結晶成長工程においては、この工程を具体例1
と同様に実施して、InAlAs結晶をInP基板上に
堆積成長させた。具体例3で得られたInAlAs結晶
も、具体例1と同様の評価テストにおいて、不純物が完
全に除去されており、その化合物半導体のポテンシャル
障壁も具体例1と同様に良好であった。
[Specific Example 3] Also in the specific example 3, InAlAs crystals are grown on the InP substrate. The pressure P 1 of As molecular beam emitted from the molecular beam source cell during the substrate cleaning step of cleaning the substrate surface by performing molecular beam irradiation treatment while heating the substrate surface in an ultrahigh vacuum atmosphere. The shutter operation sets the pressure to 5 × 10 -7 Torr,
The temperature of the substrate was raised at 30 ° C./minute while irradiating the substrate surface with the molecular beam. By doing so, it was confirmed that a Group V stabilizing surface appeared on the substrate surface when the surface temperature T 1 of the InP substrate reached 300 ° C. Then, while continuing the above treatment, when the surface temperature T 1 of the InP substrate reached 360 ° C., the group 3 In molecular beam was irradiated with 2 × 10 −7 Torr.
It was confirmed that when the substrate surface was irradiated for 2 seconds, the oxide film on the substrate surface was rapidly released, and a Group III stabilizing surface appeared on the substrate surface. This confirmation is performed by a quadrupole mass spectrometer (QMS) and a reflection high-speed electron diffraction instrument (RHEED)
According to In the case where the irradiation of the In molecular beam on the substrate surface was omitted as the above comparative example, a Group III stabilizing surface appeared on the substrate surface when the surface temperature T 1 of the InP substrate reached 395 ° C. When the Group III stabilized surface appeared on the substrate surface, the temperature rise of the substrate was stopped, and the substrate surface was observed through an electron diffractometer and an electron microscope. As a result, the InP substrate had a smooth surface with no unevenness. It was In the crystal growth step subsequent to the above-mentioned substrate cleaning step, this step is used as a specific example 1.
InAlAs crystals were deposited and grown on the InP substrate in the same manner as in. In the InAlAs crystal obtained in Specific Example 3, impurities were completely removed in the same evaluation test as in Specific Example 1, and the potential barrier of the compound semiconductor was also good as in Specific Example 1.

【0024】本発明方法は、上記実施例、具体例に示さ
れた以外の三−五族基板上に、上記実施例、具体例に示
された以外の化合物半導体を堆積成長させる場合、たと
えばInAs、InSb、GaP、GaAs、GaS
b、AlAs、AlSb、InGaAsなどの基板上
に、InGaAlAs、InGaAlSbなどを堆積成
長させる場合にも、上記の内容と同様にして、あるい
は、上記の内容に準じて適用することができる。
According to the method of the present invention, when a compound semiconductor other than those shown in the above-mentioned examples and specific examples is deposited and grown on a Group 3-5 substrate other than those shown in the above-mentioned examples and specific examples, for example, InAs is used. , InSb, GaP, GaAs, GaS
When InGaAlAs, InGaAlSb, etc. are deposited and grown on a substrate of b, AlAs, AlSb, InGaAs, etc., the same or similar to the above contents can be applied.

【0025】[0025]

【発明の効果】本発明は分子線エピタキシー法(MBE
法)を介して化合物半導体を製造する場合に、清浄かつ
平坦な基板表面が得られ、基板と結晶との界面に有害な
不純物も存在せず、その上、結晶成長初期における緩衝
層の形成をも防止することができるから、高品質の化合
物半導体を再現性よく製造することができる。
The present invention is based on the molecular beam epitaxy method (MBE).
Method, a clean and flat substrate surface is obtained, no harmful impurities are present at the interface between the substrate and the crystal, and a buffer layer is formed at the initial stage of crystal growth. It is also possible to prevent this, so that a high quality compound semiconductor can be manufactured with good reproducibility.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る化合物半導体の製造方法に用いら
れる分子線エピタキシー装置を略示した断面図である。
FIG. 1 is a schematic cross-sectional view of a molecular beam epitaxy apparatus used in a method for producing a compound semiconductor according to the present invention.

【図2】本発明に係る化合物半導体の製造方法における
InP基板のAs分子線圧力と五−三遷移温度との関係
を示した説明図である。
FIG. 2 is an explanatory diagram showing a relationship between As molecular beam pressure of an InP substrate and a 5-3 transition temperature in a method for producing a compound semiconductor according to the present invention.

【符号の説明】[Explanation of symbols]

1 成長室 1a 容器本体 1b 蓋体 2 液体窒素シュラウド 3 基板ホルダ 5 マニュピレータ 6a 分子線源セル 6b 分子線源セル 6c 分子線源セル 6d 分子線源セル 7a シャッタ 7b シャッタ 7c シャッタ 7d シャッタ 8 メインシャッタ 9 ゲートバルブ 10 反射型高速電子回折装置(RHEED) 11 蛍光スクリーン 12 四重極型質量分析装置(QMS) 15 基板 1 Growth Chamber 1a Container Body 1b Lid 2 Liquid Nitrogen Shroud 3 Substrate Holder 5 Manipulator 6a Molecular Beam Source Cell 6b Molecular Beam Source Cell 6c Molecular Beam Source Cell 6d Molecular Beam Source Cell 7a Shutter 7b Shutter 7c Shutter 7d Shutter 8 Main Shutter 9 Gate valve 10 Reflective high-speed electron diffraction device (RHEED) 11 Fluorescent screen 12 Quadrupole mass spectrometer (QMS) 15 Substrate

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 高真空雰囲気下において三−五族の化合
物からなる基板の表面を加熱処理しつつ分子線照射処理
して基板表面を清浄化するための基板清浄化工程と、高
真空雰囲気下において半導体結晶の構成原子からなる複
数の分子線を清浄化後の基板表面に照射して基板表面上
に半導体結晶を堆積成長させるための結晶成長工程とを
含んでいること、および、前記基板清浄化工程において
基板表面を加熱処理するときに、基板表面に三族安定化
面が出現するまで基板の表面温度を上昇させること、お
よび、前記基板清浄化工程において基板表面を分子線照
射処理するときに、結晶成長工程で用いられる分子線の
うちから単独では基板表面への実質的な堆積が生じない
五族分子線を用い、かつ、その五族分子線の圧力をP
1 、結晶成長時の分子線圧力をP2 とした場合に、P1
≦(P2 ×1/2)の圧力に保持された当該五族分子線
を基板表面に照射することを特徴とする化合物半導体の
製造方法。
1. A substrate cleaning step for cleaning a substrate surface by performing molecular beam irradiation treatment while heating the surface of a substrate composed of a Group III-V compound in a high vacuum atmosphere, and in a high vacuum atmosphere. In a crystal growth step for irradiating a cleaned substrate surface with a plurality of molecular beams composed of constituent atoms of the semiconductor crystal to deposit and grow semiconductor crystals on the substrate surface, and the substrate cleaning When the substrate surface is heat-treated in the oxidization step, the surface temperature of the substrate is increased until a Group III stabilizing surface appears on the substrate surface, and when the substrate surface is subjected to molecular beam irradiation treatment in the substrate cleaning step. In addition, among the molecular beams used in the crystal growth step, a group 5 molecular beam that does not cause substantial deposition on the substrate surface by itself is used, and the pressure of the group 5 molecular beam is P
1 , P 1 when the molecular beam pressure during crystal growth is P 2.
A method for producing a compound semiconductor, which comprises irradiating the surface of a substrate with the Group 5 molecular beam held under a pressure of ≦ (P 2 × 1/2).
【請求項2】 基板清浄化工程において、基板の表面温
度をT1 、五族安定化面−三族安定化面の遷移温度T2
とした場合に、基板表面に三族安定化面が出現した後、
前記五族分子線を基板表面に照射しつつ基板表面温度を
2 ≦T1 ≦(T2 +50℃)に保持する請求項1記載
の化合物半導体の製造方法。
2. In the substrate cleaning step, the surface temperature of the substrate is T 1 , and the transition temperature T 2 between the Group 5 stabilization surface and the Group III stabilization surface is T 2.
In the case of, after the Group III stabilizing surface appears on the substrate surface,
The method for producing a compound semiconductor according to claim 1, wherein the substrate surface temperature is maintained at T 2 ≦ T 1 ≦ (T 2 + 50 ° C.) while irradiating the substrate surface with the Group 5 molecular beam.
【請求項3】 InP基板を用いる基板清浄化工程にお
いて、1×10-5〜1×10-7Torrの圧力に保持さ
れたAs原子を含む分子線を基板表面に照射しつつ基板
表面に三族安定化面が出現するまで基板の表面温度を上
昇させる請求項1記載の化合物半導体の製造方法。
3. In a substrate cleaning process using an InP substrate, while irradiating the substrate surface with a molecular beam containing As atoms held at a pressure of 1 × 10 −5 to 1 × 10 −7 Torr, the substrate surface is subjected to three The method for producing a compound semiconductor according to claim 1, wherein the surface temperature of the substrate is raised until the group stabilizing surface appears.
【請求項4】 基板清浄化工程において、基板表面に三
族安定化面が出現した後、1×10-5〜1×10-7To
rrの圧力に保持されたAs原子を含む分子線を基板表
面に照射しつつ基板の表面温度をT2 ≦T1 ≦(T2
50℃)に保持する請求項3記載の化合物半導体の製造
方法。
4. In the substrate cleaning step, after the Group III stabilizing surface appears on the substrate surface, 1 × 10 −5 to 1 × 10 −7 To is obtained.
While irradiating the substrate surface with a molecular beam containing As atoms held at a pressure of rr, the surface temperature of the substrate is T 2 ≦ T 1 ≦ (T 2 +
The method for producing a compound semiconductor according to claim 3, wherein the method is maintained at 50 ° C.
【請求項5】 高真空雰囲気下において三−五族の化合
物からなる基板の表面を加熱処理しつつ分子線照射処理
して基板表面を清浄化するための基板清浄化工程と、高
真空雰囲気下において半導体結晶の構成原子からなる複
数の分子線を清浄化後の基板表面に照射して基板表面上
に半導体結晶を堆積成長させるための結晶成長工程とを
含んでいること、および、前記基板清浄化工程におい
て、基板表面に五族安定化面が出現してから三族安定化
面が出現するよりも前に、基板を構成している三族原子
の分子線を基板表面に照射することを特徴とする化合物
半導体の製造方法。
5. A substrate cleaning step for cleaning the substrate surface by molecular beam irradiation while heating the surface of the substrate made of a Group III-V compound in a high vacuum atmosphere, and in a high vacuum atmosphere. In a crystal growth step for irradiating a cleaned substrate surface with a plurality of molecular beams composed of constituent atoms of the semiconductor crystal to deposit and grow semiconductor crystals on the substrate surface, and the substrate cleaning In the oxidization step, irradiation of the molecular beam of Group 3 atoms constituting the substrate to the substrate surface before the Group 5 stabilizing surface appears on the substrate surface and before the Group 3 stabilizing surface appears. A method of manufacturing a compound semiconductor having the characteristics.
【請求項6】 InP基板を用いる基板清浄化工程にお
いて、基板表面に五族安定化面が出現するまで基板の表
面温度を上昇させながら、1×10-5〜1×10-7To
rrの圧力に保持されたAs原子を含む分子線を基板表
面に照射すること、および、基板表面に五族安定化面が
出現した後あって三族安定化面が出現するよりも前に、
In原子を含む分子線を基板表面に照射することを行な
う請求項5記載の化合物半導体の製造方法。
6. In a substrate cleaning process using an InP substrate, 1 × 10 −5 to 1 × 10 −7 To while increasing the surface temperature of the substrate until a Group V stabilizing surface appears on the substrate surface.
Irradiating the substrate surface with a molecular beam containing As atoms held at a pressure of rr, and after the appearance of the Group 5 stabilizing surface on the substrate surface and before the appearance of the Group 3 stabilizing surface,
The method for producing a compound semiconductor according to claim 5, wherein the surface of the substrate is irradiated with a molecular beam containing In atoms.
JP17477094A 1993-07-06 1994-07-04 Method of manufacturing compound semiconductor Pending JPH0774102A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17477094A JPH0774102A (en) 1993-07-06 1994-07-04 Method of manufacturing compound semiconductor

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP5-166932 1993-07-06
JP16693293 1993-07-06
JP17477094A JPH0774102A (en) 1993-07-06 1994-07-04 Method of manufacturing compound semiconductor

Publications (1)

Publication Number Publication Date
JPH0774102A true JPH0774102A (en) 1995-03-17

Family

ID=26491126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17477094A Pending JPH0774102A (en) 1993-07-06 1994-07-04 Method of manufacturing compound semiconductor

Country Status (1)

Country Link
JP (1) JPH0774102A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106298577A (en) * 2016-10-18 2017-01-04 中国工程物理研究院激光聚变研究中心 A kind of method of monocrystal thin films sedimentation rate on-line determination and application

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106298577A (en) * 2016-10-18 2017-01-04 中国工程物理研究院激光聚变研究中心 A kind of method of monocrystal thin films sedimentation rate on-line determination and application

Similar Documents

Publication Publication Date Title
JP3027968B2 (en) Film forming equipment
JP5097332B2 (en) Method for producing single crystal silicon wafer, silicon wafer of this kind and use thereof
Khan Low‐temperature epitaxy of Ge films by sputter deposition
JPH0774102A (en) Method of manufacturing compound semiconductor
US5432124A (en) Method of manufacturing compound semiconductor
EP0215436B1 (en) Method of growth of thin film layer for use in a composite semiconductor
EP3029716A1 (en) Process for producing compound semiconductor substrate and semiconductor device
Chow Molecular beam epitaxy
JPH05213695A (en) Method for depositing thin diamond film
JPH02139918A (en) Manufacture of hetero structure
EP3327169A1 (en) Method for formation of a transition metal dichalcogenide, tmdc, material layer
JPH07142404A (en) Method for forming and removing selective growth mask
JP2861683B2 (en) Method of forming amorphous silicon film
JPH0645257A (en) Method for forming semiconductor thin film
JPH10242053A (en) Gallium nitride semiconductor device and method of manufacturing gallium nitride semiconductor device
JP2870061B2 (en) Super lattice structure element
JP2001110725A (en) Method of manufacturing hetero-structure semiconductor moltilayer thin film
JPH07153685A (en) Method of forming thin film of strain hetero superlattice structure
Amano Reduction of crystalline defects in sos by room temperature Si ion implantation
JPH0256952A (en) Method of growing caf2 film
Majni et al. Substrate effects in Si-Al solid phase epitaxial growth
JPH03131593A (en) Preliminary treatment of substrate for epitaxial grow
JP3205666B2 (en) Method for synthesizing CeO2 epitaxial single crystal thin film on Si single crystal substrate
JP2928071B2 (en) Method of forming amorphous silicon film
JPH05182910A (en) Molecular beam epitaxtially growing method