JPH0774099A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the partial temperature rise of a heating element by enlarging the width dimensions of a wiring to connect with a semiconductor element more than the width dimension of an element formation area, and forming a conductive layer using a material having conductivity higher than an insulating film, within the wiring layer at the upper layer of the element formation area. CONSTITUTION:A transistor composed of an emitter region 13, a base region 14, and a collector region 15 is formed on the surface of a silicon substrate 7. On the other hand, an insulating layer 4, a conductive layer 16, and wirings 8 and 10 are formed on the surface of the silicon substrate 7, and a transistor element is formed within the semiconductor element formation area 5 surrounded by a lower insulating layer 6 and the insulating film 9 on the sidewall. Here, the width dimension of the wiring 8 of a conductive member high in heat conductivity whose one end is connected to a semiconductor element electrode 11 and the other end is connected to an external electrode terminal 3 and a bump electrode 1 is made larger than the width dimension of the semiconductor element formation area 5. Hereby, the partial temperature rise of the semiconductor element can be prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an SOI structure such as a high speed computing LSI for a computer, and more particularly to a structure suitable for preventing a local temperature rise of a heating element.

[0002]

2. Description of the Related Art A conventional semiconductor device has an island-shaped region in which a semiconductor device forming region is separated from a substrate by an insulating film, as described in Japanese Patent Laid-Open No. 60-91624, in order to speed up LSI operation. I was doing. This structure is SOI (Silico
n on Insulator) structure is called. However, since the insulating film has a low thermal conductivity, if the semiconductor element in the island generates heat, the temperature of the heating element rises and the element is damaged. Therefore, in the above publication, a material having a higher thermal conductivity than that of a silicon substrate is selectively embedded in an insulating film between a semiconductor element formation region and the substrate to facilitate heat transfer to the substrate and to generate heat. Was preventing the temperature rise. In addition, the width of the wiring connected to the semiconductor element is smaller than the width of the element forming region and the width of the heating element.

[0003]

However, the prior art is
The effect of preventing the temperature rise is still insufficient, and the manufacturing process of the semiconductor device is complicated, resulting in an increase in manufacturing cost. In particular, in the case of a flip-chip mounting type semiconductor device, the heat generated from the semiconductor element mainly escapes from the semiconductor element surface to the outside, so the effect of preventing temperature rise by the conventional technique is small. Further, since the width of the wiring connected to the semiconductor element is smaller than the width of the element forming region and the width of the heating element, the amount of heat transferred through the wiring in a one-dimensional manner is small.

An object of the present invention is to prevent a local temperature rise of a heating element having a high heating value.

[0005]

The semiconductor device of the present invention comprises:
In order to achieve the above object, the width dimension of the wiring connected to the semiconductor element is made larger than the width dimension of the element formation region.

Further, a heat transfer layer made of a material having higher thermal conductivity than the insulating film is formed in the wiring layer above the semiconductor element region.

Further, the shape of the thin insulating film on the side wall of the semiconductor element formation region is changed to an uneven structure, a structure having a curved surface, a structure in which a part of the side wall is protruded, or a structure having a rhombic horizontal cross section. Increase the total area of.

Further, a material having higher thermal conductivity than that of the insulating film is embedded in a portion adjacent to the side wall of the insulating film and in contact with the substrate.

[0009]

According to the above means, by making the width of the wiring larger than the width of the element forming region, the heat from the heat generating element is planarized (in the wiring layer above the element forming region from the semiconductor element region). It becomes possible to increase the amount of heat transfer by having a heat diffusion plate function that expands (dimensionally), and by increasing the wiring cross-sectional area, the thermal resistance when passing through the wiring to the substrate and external electrode terminals decreases, The spread of heat from the wiring to the area around the wiring such as the substrate is promoted, and the local temperature rise in the semiconductor element area can be prevented.

Further, the heat transfer amount is provided by providing the function of a heat diffusion plate for planarly (two-dimensionally) spreading the heat from the heat generating element in the heat transfer layer above the element forming area by forming the heat transfer layer. Can be increased, the thermal resistance from the semiconductor element region to the substrate and external electrode terminals is reduced, and the spread of heat from the surface of the heat transfer layer to the region around the heat transfer layer such as the substrate is promoted. It is possible to prevent a local temperature rise in the element region.

Further, by increasing the extension area of the side wall of the insulating film, the thermal resistance when the heat from the heating element passes through the insulating film is lowered, and the temperature rise of the semiconductor element region can be prevented.

Further, the amount of heat transferred from the side wall to the substrate is increased through the embedded high thermal conductive material, and the temperature rise in the semiconductor element region can be prevented.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIGS.
Will be described. FIG. 1 is a vertical sectional view of a flip-chip mounting type semiconductor device to which the present invention is applied. FIG. 2 shows an enlarged view of the main part 2 of the semiconductor element. FIG. 3 is a plan view of FIG.

As shown in FIG. 2, an emitter region (eg, n-type) is formed on the surface of the silicon substrate 7 (eg, containing p-type impurities).
A transistor element including a type impurity 13), a base region (eg, p type impurity) 14, and a collector region (eg, n type impurity) 15 is formed. On the surface of the silicon substrate 7, an insulating layer (eg, SiO ₂ ) 4, a conductive layer (eg, polysilicon) 1
6, wiring (for example, aluminum) 8 and 10 are formed. The transistor element has a lower insulating layer (eg, SiO 2).
₂ ) 6 and a side wall insulating film (eg, SiO ₂ ) 9 are formed in the semiconductor element forming region 5. As shown in FIG. 3, one end is connected to the semiconductor element electrode portion 11 and the other end is connected to the external electrode terminal 3 and the bump electrode 1. Is larger than the width dimension 5a of the semiconductor element forming region 5.

The operation when the semiconductor device configured as described above is energized will be described. Transistor element emitter,
A current is supplied to the base and the collector through the wirings 8 and 10 and the conductive layer 16 to function as a transistor. Since the transistor element is surrounded by the insulating film, it can be operated at high speed. When the transistor element operates, heat is generated in the base region 14 and the temperature rises. The generated heat spreads over the entire semiconductor forming element region 5, and part of the heat is generated by the wirings 8, 10,
Silicon substrate 7, external electrode terminal 3 via conductive layer 16
To the silicon substrate 7 across the insulating films 6 and 9. The heat transferred to the silicon substrate 7 is transferred to the external electrode terminal 3 across the insulating films 6 and 4 immediately below the external electrode terminal 3, and is radiated to the surroundings through the bump electrode. In this embodiment, since the width dimension 8a of the wiring layer 8 is larger than the width dimension 5a of the semiconductor element formation region 5, the heat spread over the entire semiconductor formation element region 5 is transferred to the upper layer of the semiconductor formation element region 5 through the semiconductor element electrode portion 11. Spreads in a plane (two-dimensionally) within the wiring 8 located at, and the cross-sectional area of the wiring 8 increases, the thermal resistance decreases accordingly, and the surface area of the wiring 8 increases to extend to the silicon substrate 7. By increasing the amount of heat transfer, it is possible to reduce the local temperature rise of the transistor element.

FIG. 4 is a plan view of the semiconductor device according to the second embodiment of the present invention. Regarding the wiring 8 of the conductive member whose one end is connected to the semiconductor element electrode portion 11, the semiconductor element electrode portion 1
The width dimension 19a of a portion 19 of the semiconductor element formation region 5 and the side wall which crosses the insulating film 9 from the end connected to 1 is larger than the width dimension 5a of the semiconductor element formation region 5. For example, a portion where the width of the semiconductor element forming region 5 is 3 μm and the width of the wiring 19 is 4 μm is formed to have a length of 10 μm from the end connected to the semiconductor element electrode portion 11, and the width of the wiring of the other portions is set to 1 μm. To do.

A plan view of a semiconductor device according to a third embodiment of the present invention is shown in FIG. Parts other than those necessary for explanation are omitted. FIG. 6 shows a vertical sectional view of a main part of a semiconductor element of the present semiconductor device. In this embodiment, the heat transfer layer 12 of a member having a high thermal conductivity is provided on the semiconductor element forming region 5 and the wiring 8 above.
An electrically insulated heat transfer layer 12 is formed on the wiring 8.
The width dimension of the heat transfer layer 12 is larger than the width dimension of the semiconductor element formation region 5. If the heat transfer layer 12 is a conductive member having a high thermal conductivity (for example, aluminum), the heat transfer layer 1
An insulating film 4a is arranged between the layer 2 and the wiring 8. Heat transfer layer 1
If 2 is a non-conductive member having a high thermal conductivity (for example, Si ₃ N ₄ ), the heat transfer layer 12 can be formed directly on the wiring 8. The heat that has spread to the entire semiconductor forming element region 5 spreads in the heat transfer layer 12 located above the semiconductor forming element region 5, and the heat transfer layer 12 reduces the thermal resistance from the semiconductor element region to the silicon substrate 7 and the external electrode terminal 3. The amount of heat transfer flowing from the semiconductor element formation region 5 to the wiring 8 and the heat transfer layer 12 is increased, and a local temperature rise in the semiconductor element region can be prevented.

Another embodiment of the present invention will be described with reference to FIGS. FIG. 7 is a vertical sectional view of a fourth embodiment of a semiconductor device to which the present invention is applied. FIG. 8 shows AA shown in FIG.
It is a horizontal sectional view of a section. Further, FIG. 7 shows B shown in FIG.
-B cross section. The transistor element is formed in a semiconductor element region 5 surrounded by a lower insulating film (eg, SiO ₂ ) 6 and a sidewall insulating film (eg, SiO ₂ ) 9. A material having a high thermal conductivity (for example, Si ₃ N ₄ , aluminum) 17 so as to be adjacent to the insulating film on the side wall and contact the silicon substrate 7.
Is embedded. As can be seen in FIG. 8, the insulating film 9 on the side wall has a structure with many irregularities.

The operation when the semiconductor device configured as described above is energized will be described. The heat generated in the transistor element spreads over the entire semiconductor element region 5, traverses the insulating films 6 and 9, is transmitted to the silicon substrate 7, and is radiated to the surroundings. In this embodiment, since the horizontal cross-sectional shape of the insulating film 9 on the side wall has a structure with a large number of irregularities, the actual area increases, the thermal resistance decreases correspondingly, and the temperature rise can be reduced. Further, the temperature rise can be reduced by heat transfer from the outer surface of the insulating film 9 on the side wall to the silicon substrate 7 via the material 17 having a high thermal conductivity.

FIG. 9 is a horizontal sectional view of a semiconductor device according to the fifth embodiment of the present invention. Parts other than those necessary for explanation are omitted. The insulating film 9 on the side wall has more irregularities.

FIG. 10 is a horizontal sectional view of the semiconductor device according to the sixth embodiment of the present invention. The insulating film 9 on the side wall is formed into a diamond shape.

FIG. 11 is a horizontal sectional view of the semiconductor device according to the seventh embodiment of the present invention. The insulating film 9 on the side wall has a shape in which a part of a square is projected.

FIG. 12 is a vertical sectional view and FIG. 13 is a horizontal sectional view of a semiconductor device according to a fifth embodiment of the present invention. Parts other than those necessary for explanation are omitted. The insulating film 9 on the side wall has a curved shape in which arcs are combined. Further, the portion 17 made of a material having a high thermal conductivity is formed into a cylindrical shape.

A vertical sectional view of a semiconductor device according to an eighth embodiment of the present invention is shown in FIG. 14, and a horizontal sectional view thereof is shown in FIG. A material 17 having a high thermal conductivity is formed on the outer side of the insulating film 9 on the side wall so that the thickness thereof changes in the depth direction. A wiring material and an insulating material are filled in the gap 18.

[0025]

The effect of the present invention was obtained by numerical calculation by a computer. In the structure shown in FIG. 2, the emitter region 13 has a thickness of 2 μm × 1 μm × 0.2 μm and a heat generation amount of 3 m.
W, semiconductor element forming region 5 is 4 μm × 4 μm × 2 μm
In the case of high and insulating film thickness of 0.4 μm, if the width of the wiring 8 is all 1 μm, the temperature rise of the semiconductor element from the silicon substrate becomes 21 ° C. On the other hand, as shown in the structure of FIG. If the width of the wiring at the length of 20 μm from the end connected to the device electrode portion 11 is 6 μm, the temperature rise will be 11 ° C. In the structure shown in FIGS. 5 and 6 of the present invention, all the widths of the wiring 8 are set to 1 μm under the same conditions as above.
m and a heat transfer layer of 200 μm × 200 μm is formed thereon, the temperature rise becomes 13 ° C. Both can reduce the temperature rise by about half.

According to the present invention, with respect to the heat emitted from the heating element, the amount of heat transferred through the wiring layer and the heat transfer layer is increased and the amount of heat transferred across the insulating film is increased, so that the local temperature of the semiconductor element rises. Can be prevented, and damage and deterioration of electrical characteristics can be prevented. This improves the life reliability of the semiconductor device.

Further, according to the present invention, the temperature difference between the semiconductor elements is reduced by preventing the local temperature rise of the semiconductor elements, thereby reducing the non-uniformity of the electrical characteristics of the semiconductor elements due to the temperature difference. Therefore, it is possible to stabilize the operation of an integrated circuit or the like to which a differential effect that requires the uniformity of the electric characteristics of the semiconductor element is applied.

[Brief description of drawings]

FIG. 1 is a vertical sectional view of a semiconductor device showing an embodiment of the present invention.

FIG. 2 is a vertical cross-sectional view showing a main part 2 of the semiconductor device of FIG.

FIG. 3 is a plan view of a semiconductor device showing an embodiment of the present invention.

FIG. 4 is a plan view of a semiconductor device showing a second embodiment of the present invention.

FIG. 5 is a plan view of a semiconductor device showing a third embodiment of the present invention.

6 is a vertical sectional view showing a main part of a semiconductor element of the semiconductor device of FIG.

FIG. 7 is a vertical sectional view of a semiconductor device showing a fourth embodiment of the present invention.

8 is a horizontal sectional view taken along the line AA of FIG.

FIG. 9 is a horizontal sectional view of a semiconductor device showing a fifth embodiment of the present invention.

FIG. 10 is a horizontal sectional view of a semiconductor device showing a sixth embodiment of the present invention.

FIG. 11 is a horizontal sectional view of a semiconductor device showing a seventh embodiment of the present invention.

FIG. 12 is a vertical sectional view of a semiconductor device showing a fifth embodiment of the present invention.

13 is a horizontal sectional view of the semiconductor device of FIG.

FIG. 14 is a vertical sectional view of a semiconductor device showing an eighth embodiment of the present invention.

15 is a horizontal cross-sectional view of the semiconductor device of FIG.

[Explanation of symbols]

3 ... External electrode terminals, 5 ... Semiconductor element formation region, 5a ... Width component of semiconductor element formation region, 8 ... Wiring, 9 ... Side wall insulating film, 10 ... Wiring, 11 ... Semiconductor element electrode part, 13 ... Emitter region.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Ichiro Imaizumi 2326 Imai, Ome-shi, Tokyo Hitachi, Ltd. Device Development Center

Claims (1)

[Claims] 1. A semiconductor device comprising a plurality of semiconductor elements such as transistor elements and a circuit pattern formed on a semiconductor substrate, the inside of an element forming region in which each semiconductor element is surrounded by an electrically insulating film. A conductive member having one end connected to the semiconductor element is formed, and the conductive member is located at a position over the upper portion of the insulating film and extending over the inner upper portion and the outer upper portion of the element formation region. The semiconductor device is characterized in that the width dimension thereof is larger than the width dimension of the element forming region.