JPH0772457A - Driving method for liquid crystal display device and liquid crystal display device - Google Patents

Abstract

PURPOSE:To reduce an after image caused by the shift of the I-V characteristic of a nonlinear element in an active matrix type liquid crystal display device mainly using two terminal-type nonlinear element. CONSTITUTION:The AC driving of a liquid crystal is performed by means of an AC inverted signal FR. By dividing a horizontal scanning period into TA, TB periods so as to uniform the shift of the I-V characteristic of a nonlinear element and inverting the polarities of TA and TB so as to compensate the data signal, the I/V characteristic of the nonlinear element is made to be the same in the screen even whichever display is happened and the drive in which the after image due to the characteristic is realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly to a two-terminal type active matrix liquid crystal display device and a driving method thereof.

[0002]

2. Description of the Related Art Since an active matrix type liquid crystal display device can obtain a higher contrast than a conventional passive type liquid crystal display device, it is widely used in various display application product fields. . There are two types of active elements used, two-terminal type and three-terminal type, and it is considered that the two-terminal type is more economically advantageous.

As a two-terminal type active element, MIM
(Metal-Insulator-Metal), ring diode, varistor, etc. are adopted.

A two-terminal type active element generally used in an active matrix type liquid crystal display device is shown in FIG.
It has the following IV characteristics. That is, the switching function based on the non-linear current characteristic with respect to the applied voltage is utilized to effectively charge and discharge the pixel.

FIG. 1 shows an example of the configuration of an active matrix liquid crystal display device employing a two-terminal active element. Reference numeral 101 is a column direction drive circuit (X driver) that drives the column electrodes of the liquid crystal panel 115, 102 is a row direction drive circuit (Y driver) that drives the row electrodes, and 115 is a liquid crystal panel.

In the X driver 101, 104 is an AC video generation circuit which receives a video signal (P) and generates an AC video signal in synchronization with the AC inversion signal FRX. A shift register 103 is activated by a shift start signal DX and shift clock signal XSC.
The shift operation is performed in synchronization with L, and the sampling signal Sm
Are sequentially generated. Reference numeral 105 denotes a first analog switch, which uses the sampling signal Sm for the AC video generation circuit 1
The AC video signal generated from 04 is supplied to the capacitor 106.
Sample hold. Capacitor 106 is the first sample and hold capacitor. 107 is the second
Is an analog switch of the video signal sampled in the capacitor 106 by the latch pulse LP,
Transfer to the capacitor 108. The capacitor 108 is the second
This is a sample and hold capacitor. A buffer amplifier 109 drives the column electrode Xm based on the video signal held in the capacitor 108.

In the Y driver 102, 110 is V
The inverter uses p, -Vp as a power source and generates the selection voltage signal Vs in synchronization with the AC inversion signal FRY. 1
A shift register 11 is activated by a shift start signal DY, performs a shift operation in synchronization with a shift clock signal YSCL, and generates a selection signal Cn. 11
Reference numeral 2 denotes one cell of the drive circuit for the row electrode Yn.

The internal structure of 112 is shown in FIG. The AC inversion signal FRY and the selection signal Cn are input to the SR latch composed of NORs 201 and 202. AND204,
The output of NOR 201 and the inverted signal of Cn (inverted by the inverter 203) are input to 205, and the respective outputs are input to the gate terminals of the analog switches 207 and 208. Cn is input to the gate terminal of the analog switch 206. The selection voltage signal Vs and the power supplies -Va and Va are input to the source terminals of the analog switches 206 to 208, the source terminals are commonly connected, and a signal Yn (a signal that drives the row electrode Yn) is input. Is output.

Reference numeral 115 is a liquid crystal panel. The column electrode Xm and the row electrode Yn are formed on the substrates facing each other, and at the intersections thereof, the nonlinear element 114 and the liquid crystal layer 113 are arranged in series to form a pixel. Here, the voltages applied to the liquid crystal layer 113 and the non-linear element 114 with respect to the row electrodes are Vm and Vl, respectively.

The non-linear element 114 has a voltage as shown in FIG.
It has current characteristics. That is, when the applied voltage is small, the current is minute, and when the applied voltage is large, a steep current characteristic is exhibited.

The operation of the conventional liquid crystal display device shown in FIGS. 1 and 2 will now be described with reference to the time charts shown in FIGS.

In FIG. 4, the video signal (P) is AC-inverted in synchronization with the AC inversion signal FRX (FRX = "1" is a positive phase, "0" is a negative phase), and an AC video signal 104 is obtained. available. Here, Va is the white 100% level of the normal phase video signal,
Further, the white 0% level (pedestal level) of the reverse phase video signal, -Va is the white 0% level (pedestal level) of the normal phase video signal, and the white 100% level of the reverse phase video signal. The shift start signal DY of the Y driver is sequentially transferred by the shift clock signal YSCL, and C1 ~
A selection signal of Cn ~ is generated. Latch pulse LP, X
The driver shift start signal DX is input every horizontal scanning period.

The lower part of FIG. 4 is an enlarged view of one predetermined horizontal scanning period. The latch pulse LP is located almost at the sync signal portion of the video signal, and transfers the video signal sampled and held by the capacitor 106 to the capacitor 108 in the previous one horizontal scanning period. The shift start signal DX is
It is located at the beginning of the video signal portion in almost one horizontal scanning period and is transferred by the shift clock signal XSCL to generate sampling signals S1 to Sm. For example, the nth video signal 104 sampled with the sampling signal Sm (the sampling position is indicated by a circle in the figure)
Is output to the column electrode Xm at the timing of the (n + 1) th video signal after one horizontal scanning period.

FIG. 5 shows a time chart of each part of FIG. The output of the SR latches 201 and 202 is "0" due to a logical combination of the selection signal Cn and the AC inversion signal FRY (in the conventional example, a common AC inversion signal is input to the X and Y drivers. That is, FRX = FRY). 1 "(C
n = 1, FRY = 0), “0” (Cn = 1, FRY =
Repeat 1). Yn is the selection voltage signal Vs when Cn = 1
(-Vp when FRY = 1, Vp when FRY = 0) is output, and in Cn = 0 (referred to as a non-selection period or holding period), it corresponds to the polarity of Yn in the immediately preceding selection (Cn = 1).
Positive (Vp) outputs Va after selection, and negative (-Vp) outputs -Va after selection.

FIG. 6 shows the column electrode signal Xm and the row electrode signal Yn,
FIG. 3 is a time chart diagram regarding the difference signals Xm-Yn thereof. With the AC video signal 104, the liquid crystal panel 11
The video data corresponding to the m-th column in the horizontal direction of 5 are sequentially sampled and output as the column electrode signal Xm. The row electrode signal Yn outputs the selection voltage signal Vs in the selection period Ts, and outputs the non-selection voltage Va or −Va in the non-selection period Th. The non-selection potential after selection at the positive potential Vp is Va, and the non-selection potential after selection at the negative potential −Vp is −Va.
Is.

The difference signal Xm-Yn is represented by a solid line in the signal diagram shown at the bottom of FIG. Here, the dotted line locus is the locus of the potential of the connection portion between the liquid crystal layer 113 and the non-linear element 114. Since a large voltage is applied to the non-linear element 114 during the selection period TS, the flowing current is also large and the liquid crystal layer 113 is charged, as is known from the IV characteristic of FIG. The amount of charge to be charged is Xm-Yn in the selection period Ts.
Of the column electrode signal Xm, and thus the sampling level of the AC video signal 104. As described above, by changing the non-selection potential according to the polarity of the preceding selection potential, in the difference signal Xm-Yn, the signal level is positive in the non-selection period after the positive polarity selection period and after the negative polarity selection period. Since the signal level becomes negative in the non-selection period, the voltage applied to the non-linear element 114 in each non-selection period becomes small, and the charge charged in the liquid crystal layer 113 in the non-selection period is discharged through the non-linear element 114. It gets harder. The effective voltage applied to the liquid crystal layer 113 is proportional to the area of the shaded area in the figure, and consequently depends on the level of the sampled video signal. The liquid crystal layer 113 controls the amount of light transmission according to the applied effective voltage, and a predetermined image is displayed on the liquid crystal panel 115.

However, the two-terminal type non-linear element, especially MIM, MIS (Metal-Insulator-S) is used.
There is a characteristic shift as described below in the element of the "electron inductor" type. In FIG. 7, I / V
1 is the initial voltage-current characteristic of the two-terminal nonlinear element, but when the voltage is continuously applied to the element, the characteristic shifts like I / V2 (reference document: E. Mizobata.
et al. , SID91 DIGEST, p. 226
(1991)). The characteristic I / V2 has a larger resistance when the voltage is higher than that of the characteristic I / V1, which means that writing of charges to the liquid crystal layer at the time of selection is reduced. There is not much difference in resistance when the voltage is small, which means that there is not much difference in charge retention of the liquid crystal layer when not selected.
Further, it is known that this I / V characteristic shift is saturated.

The influence of the I / V characteristic shift on the display will be described. In FIG. 8, the display content is a white window display on a black background. The pixel P1 is located at the intersection of the column electrode Xm1 and the row electrode Yn and displays black. The pixel P2 is located at the intersection of the column electrode Xm2 and the row electrode Yn and displays white. Next, when the display content becomes halftone display on the entire screen as shown in FIG. 9, the previous window display remains as an afterimage. That is, the pixel P1 becomes brighter than the pixel P2. The reason will be described with reference to FIG. Xm1-
Yn is a signal applied to the pixel P1, and Xm2-Yn is a signal applied to the pixel P2. Select period T in white display period
The voltage VmsW applied to the nonlinear element of the pixel P2 at s
Is larger than the voltage VmsB applied to the nonlinear element of the pixel P1 during the black display period. Therefore, the non-linear element of the pixel P2 has a larger I / V characteristic shift amount. (In the non-selection period, the voltage applied to the non-linear element for any pixel is smaller than that in the selection period, so the I / V characteristic shift due to the voltage application to the non-linear element in this period can be ignored.) When the halftone display is performed, the I / V characteristics of the nonlinear element of the pixel P2 are shifted so as to have high resistance when a large voltage is applied, as compared with those of the pixel P1, so that the liquid crystal layer in the selection period is changed. The effective voltage is proportional to the area of the shaded area in the figure, but obviously S1> S2,
As a result, the pixel P2 becomes darker than the pixel P1 and is recognized as an afterimage.

Assuming that the voltage applied to the non-linear element during black display is VmB and the voltage applied during white display is VmW, the voltages effectively applied to the non-linear element in each display state are compared.

[Equation 1] Becomes Considering that the voltage application during the non-selection period does not affect the I / V characteristic shift so much, the above Equation 1
Can be rewritten as

[Equation 2] Becomes Due to the difference in the voltage applied to the non-linear element during the selection period Ts, a difference occurs in the I / V characteristic shift amount of the non-linear element, which causes a difference in luminance between two pixels that should have the same luminance.

The afterimage phenomenon described above similarly occurs in the case of the drive circuit shown in FIG. The drive circuit of FIG. 11 is different from that of FIG. 1 in the following points.

In the X driver 101, 120 is an A / D converter for converting a video signal into a digital signal, which receives the video signal and generates n-bit digital data. A shift register 121 performs a shift operation in synchronization with the shift clock signal XSCL and samples an input digital signal. 122
Is a latch circuit which latches and holds the data sampled by the shift register 121. 123
Xm is a drive circuit for the column side AC inversion signal FRX and the potential Va, − based on the data held in the latch circuit 122.
The column electrode Xm is driven by outputting any of Va.

In the Y driver 102, 125 is a liquid crystal power supply generation circuit, which receives the voltages Vp and -Vp and generates a multiplexed selection voltage signal Vs in synchronization with the row side AC inversion signal FRY. The liquid crystal power supply generation circuit 125 is functionally the same as the inverter 110 of FIG. The shift register 111 generates the selection signal Cn in the same manner as in FIG. Reference numeral 112 denotes a power supply selection switch corresponding to one cell of the drive circuit for the row electrode Yn, as in FIG. 1, and outputs any one of the power supplies Vs, Va, and -Va based on the selection signal Cn to output the row electrode Yn. To drive.
In the conventional example, since Cn and FRY are switched at the same time, the output potential is the row side AC inversion signal FRY = “1” when the selection signal Cn = “1”, and Yn = “+ Vp”, FRY =
When "0", Yn = "-Vp" is selected. However, the switching timings of the selection signal Cn and the row-side AC inversion signal FRY do not have to match.

Next, referring to the time chart of FIG.
A conventional example of the operation of the liquid crystal display device will be described.

FIG. 12 shows the column electrode signal Xm and the row electrode signal Y.
3 is a time chart regarding n and their difference signals Xm-Yn. For FR = [0], Xm takes -Va as the OFF level (Voff) and Va as the ON level (Von), and when FR = [1], takes Va as the OFF level and -Va as the ON level. The ratio of Von and Voff changes according to the level of the video signal, and PWM
A display including a halftone by (pulse width modulation) becomes possible. The row electrode signal Yn outputs the selection voltage signal Vs in the selection period Ts, and outputs the non-selection voltage Va or −Va in the non-selection period Th. The non-selection potential after selection at the positive potential Vp is Va, and the non-selection potential after selection at the negative potential −Vp is −Va.
Is.

The difference signal Xm-Yn is represented by the solid line in the signal diagram shown at the bottom of FIG. Here, the dotted line locus is the locus of the potential of the connection portion between the liquid crystal layer 113 and the non-linear element 114. Since a large voltage is applied to the non-linear element 114 during the selection period TS, the flowing current is also large and the liquid crystal layer 113 is charged, as is known from the IV characteristic of FIG. The amount of charge to be charged is Xm-Y in the selection period Ts.
It is controlled by the amplitude of n, that is, the width of Von of the column electrode signal Xm. As described above, by changing the non-selection potential according to the polarity of the preceding selection potential, in the difference signal Xm-Yn, the signal level is positive in the non-selection period after the positive polarity selection period and after the negative polarity selection period. Since the signal level becomes negative in the non-selection period, the voltage applied to the non-linear element 114 in each non-selection period becomes small, and the charge charged in the liquid crystal layer in the non-selection period is unlikely to be discharged through the non-linear element 114. Become.

The I / I of FIG. 7 in the drive circuit of FIG.
The influence of the V characteristic shift on the display will be described. In FIG. 13, Xm1-Yn is a signal applied to the pixel P1 in FIGS. 8 and 9, and Xm2-Yn is a signal applied to the pixel P2 in FIGS. The voltage VmsW applied to the non-linear element of the pixel P2 in the selection period Ts in the white display period is as shown in FIG.
As in the case of 0, it is higher than the voltage VmsB applied to the nonlinear element of the pixel P1 during the black display period. Therefore, the non-linear element of the pixel P2 has a larger I / V characteristic shift amount. Therefore, when the halftone display is performed, the I / V characteristics of the non-linear element of the pixel P2 are shifted so as to have high resistance when a large voltage is applied, as compared with those of the pixel P1.
The effective voltage to the liquid crystal layer during the selection period is proportional to the area of the shaded area in the figure, but obviously S1> S2, and as a result, the pixel P2 becomes darker than the pixel P1 and is recognized as an afterimage.

Here, also in the circuit of FIG. 11, if the voltage applied to the non-linear element during black display is VmB and the voltage applied during white display is VmW, as in the case of FIG.
Comparing the voltages effectively applied to the non-linear element in each display state, the above-mentioned formula 1 is established. Further, considering that the voltage application during the non-selection period does not affect the I / V characteristic shift, the formula 1 can be rewritten as the formula 2. Therefore, also in the case of the circuit of FIG. 11, due to the difference in the voltage applied to the non-linear element during the selection period Ts, a difference occurs in the I / V characteristic shift amount of the non-linear element, so that the two pixels which should originally have the same brightness. A brightness difference will occur.

The present invention is intended to solve the problem of the prior art, that is, the afterimage phenomenon of the two-terminal type active matrix liquid crystal display device.

[0029]

In order to solve the above problems, according to the invention of claim 1, a plurality of row electrodes to which a scanning signal is supplied and a plurality of row electrodes to which a data signal is supplied are provided. A column electrode and each pixel formed by connecting in series a liquid crystal layer and a two-terminal element having a non-linear resistance characteristic at each intersection of the plurality of rows and column electrodes are provided, and each row is selected. In the data writing period in which the liquid crystal layer of each pixel is charged with a voltage according to the display gradation, a relatively large writing voltage is applied to the pixel, and the data holding period after the writing period is applied. In the method for driving a liquid crystal display device to which a relatively small holding voltage is applied, immediately before the writing period, a polarity opposite to the data charging voltage for the liquid crystal layer in the writing period is set. The charging voltage for compensation of, and the charging voltage for data is large. The case small, and the said compensation charging voltage becomes large when a small, a compensation voltage for charging the liquid crystal layer, and applying to the pixel.

According to the invention of claim 1, the compensation voltage is applied to the pixel immediately before the data writing period, and the compensation charging voltage having a polarity opposite to that of the data charging voltage in the writing period is applied to the liquid crystal layer of the pixel. Since a large voltage is applied to the non-linear element immediately before the writing period, the compensating voltage preferably has a complementary relationship with the voltage charged in the liquid crystal layer during writing on the display gradation. Since the voltage is set, the IV characteristic shift of the non-linear element can be made substantially uniform regardless of the display content on the pixel, and the afterimage phenomenon caused by the difference between the both shifts of the IV characteristic can be prevented. Can be suppressed.

According to a second aspect of the invention, the compensation period in which the compensation voltage is applied is TA, and the data writing period is TB.
Then, with respect to the width of the period TB, the potential of the scanning signal or the potential of the data signal in the period TB, the width of the period TA, the potential of the scanning signal in the period TA, or the data, respectively. By setting at least one of the signal potentials differently, the effective value of the voltage applied to the two-terminal element can be adjusted to be substantially the same for the two-terminal element of each pixel.

In the third and fourth aspects of the invention, TA / (TA +
By setting TB) ≦ 1/4 or making the period TA include the blanking period of the video signal, noise caused by a large voltage change at the boundary between the compensation voltage and the write voltage having different polarities is reduced. , It can be superimposed during the blanking period of the video signal, and no noise is displayed on the liquid crystal panel.

According to a fifth aspect of the invention, a plurality of row electrodes to which a scanning signal is supplied, a plurality of column electrodes to which a data signal is supplied, and a liquid crystal layer and a non-linear layer at each intersection of the plurality of row and column electrodes. A pixel formed by connecting two terminal elements having resistance characteristics in series, and selecting each row to charge the liquid crystal layer of each pixel with a voltage according to a display gradation. Drive of a liquid crystal display device in which a relatively high write voltage is applied to the pixel during the write period and a relatively low hold voltage is applied during the data holding period after the write period. In the method, the data signal is set to a voltage according to a display gradation for each horizontal scanning period, and has the same voltage level within one horizontal scanning period, and the scanning signal has two horizontal scanning periods. TA in the first half when divided into two, and the second half When the B and the write period, and the period TA and the write period TB is characterized in that it is set to the voltage to vary the polarity of the voltage charged in the liquid crystal layer.

In the invention of claim 5, the data signal having the same voltage level in one horizontal scanning period and the periods TA and TB
When the difference between the polarity of the voltage to be charged in the liquid crystal layer and the scanning signal is taken, the voltage applied to the pixel in the period TA and the voltage applied to the pixel in the period TB are charged in the liquid crystal layer. Seen in terms of voltage, there is a complementary relationship on the display gradation. Therefore,
The afterimage phenomenon can be suppressed based on the principle of the invention of claim 1 only by improving the scanning signal waveform.

Here, as in claim 6, the periods TA and T
When the time ratio with B is set so that the effective value of the voltage applied to the two-terminal element is approximately equal for the two-terminal element of each pixel, the IV of the nonlinear element is irrespective of the display content. The characteristic shift can always be made uniform, and afterimages can be eliminated.

According to the seventh aspect of the invention, the scanning signal is set to different voltages in the periods TA and TB so that the effective values of the voltages applied to the two-terminal elements are substantially equal for the two-terminal elements of each pixel. Therefore, the IV characteristic shift of the non-linear element can always be made uniform regardless of the display content, and the afterimage can be eliminated.

According to the invention of claim 8, the scanning signal is of the period TA.
And TB have almost the same time ratio, and the voltage during the period TA is V
TA and the voltage during the period TB is VTB, | V
By setting TA│> │VTB│, the effective value of the voltage applied to the two-terminal element can be made to be approximately the same for the two-terminal element of each pixel.

In the invention of claim 9, unlike the invention of claim 6, the data signal is not the same in one horizontal scanning period, and is set to a voltage according to the display gradation in the period TB, and within the period TB in the period TA. The absolute value of the voltage is set to be larger than the above voltage, and the effective value of the voltage applied to the two-terminal element is set to be approximately the same for all the two-terminal elements of each pixel.

The invention of claim 10 is an invention to which the exception of loss of novelty of the invention is applied, and a plurality of row electrodes to which a scanning signal is supplied, a plurality of column electrodes to which a data signal is supplied, and a plurality of column electrodes. A pixel formed by connecting in series a liquid crystal layer and a two-terminal element having a non-linear resistance characteristic at each intersection of the row and column electrodes, and selecting each row, A relatively large write voltage is applied to the pixel during the data write period in which the liquid crystal layer is charged with a voltage according to the display gradation, and a relative write voltage is applied during the data holding period after the write period. In the method for driving a liquid crystal display device, a holding voltage that is relatively small is applied, and the data signal is a pulse width modulation signal whose pulse width is variable according to the voltage with which the liquid crystal layer of each pixel is charged, One horizontal scanning period is the period TA in the first half. , Divides the second half of the period TB in two as the writing period, the data signal, the period T
Also in A, the pulse potential is the same as the pulse potential in the writing period TB, and the ratios of the pulse widths to the periods TA and TB are equal, and the scanning signal is the period. It is characterized in that TA and TB are set to voltages that make the polarities of the voltages charged in the liquid crystal layer different.

The invention of claim 10 is different from the invention of claim 5 in that the data signal is pulse-width modulated.
The data signal is written in the write period T even in the period TA.
Has the same pulse potential as the pulse potential at B, and
The signal having the same ratio of each pulse width to each of the periods TA and TB is used, and the scanning signal is equal to each of the periods TA and T.
B and B are set to voltages that make the polarities of the voltages charged in the liquid crystal layer different, so that the difference signal between the data signal and the scanning signal has a relationship that becomes a complement on the display gradation between the periods TA and TB. The afterimage can be suppressed based on the principle of the invention of claim 1.

According to an eleventh aspect of the present invention, the difference signal between the data signal and the scanning signal has a period corresponding to a pulse width of the same potential as the potential Von of the data signal within the period TA, and is ToffA. Ton in other period within period TA
A (TA = TonA + ToffA), and the period TB
In the figure, the period corresponding to the pulse width of the potential Von of the data signal is set to TonB, and the other period in the period TB is set to TonB.
When offB (TB = TonB + ToffB),
The feature is that TonA / TA and TonB / TB have an inverse relationship.

Period TA, TB of the difference signal applied to the pixel
At TonA, ToffA, TonB, Tof respectively
By setting each period of fB as described above, the difference signal becomes a complement on the display gradation between the periods TA and TB, and afterimage can be suppressed based on the principle of the invention of claim 1.

According to the twelfth aspect of the present invention, the effective value of the voltage applied to the two-terminal element can be set to be substantially uniform for the two-terminal element of each pixel by setting the time ratio between the periods TA and TB. .

According to a thirteenth aspect of the present invention, in addition to the tenth aspect of the invention, TonA of the difference signal in each period of TA and TB,
The timing of each period of ToffA, TonB, and ToffB is limited. When TonA of the difference signal is the first half period of the period TA and TonB of the difference signal is the second half period of the period TB, a data signal for obtaining such a difference signal is easily generated by a relatively simple circuit. it can.

The liquid crystal display device according to the invention of claim 14 is
A liquid crystal display device in which each of the driving methods is implemented, wherein the two-terminal element is a metal layer-insulating layer-metal layer structure MIM element or a metal layer-insulating layer-semiconductor layer structure MIS element. As the insulating layer of the device, an oxide film anodized with a solution of an electrolyte containing phosphorus such as phosphoric acid or ammonium phosphate is used.

In this way, I-
It was experimentally confirmed that both of the V characteristic shifts can be greatly reduced.

As the insulating layer, it is preferable that tantalum is anodized. When a MIM element is used as the non-linear element, one of the metal layers may be a transparent conductive film layer so that it can be used also as a transparent electrode of the liquid crystal panel.

[0048]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

First Embodiment The first embodiment is an improvement of the driving method using the liquid crystal display device of FIG. 1, and the internal structure and function of the device of FIG. 1 are as described above. In addition, as the nonlinear element 114 in FIGS. 1 and 11 used in the liquid crystal driving method of the present invention described as the first to sixth embodiments,
Besides the MIM element, the MIS element, the varistor, the ring diode, the back to back diode, and the like, an MSI element having a metal-silicon nitride-ITO (transparent electrode) structure can be applied. Further, in the MIM element, one metal layer of the MIM element may be composed of a transparent conductive film layer and may also be used as a transparent electrode of the liquid crystal panel.

14 and 15 show the basics of the time chart based on the first embodiment. FIG. 14 shows the first
6 is a time chart of a Y driver necessary for realizing the embodiment. Here DY, YSCL, FRY, C1,
Cn is the same as the signal described in FIG. The output Yn of the Y driver outputs the selection voltage signal Vs when the selection signal Cn = 1, but the phase relationship between the selection signal Cn and the AC inversion signal FRY is changed to implement the first embodiment. is there. In conventional drive (Fig. 5), Cn and FRY
However, in the first embodiment, the phase relationship is shifted, that is, the timing of changing the phase of FRY within the period of Cn = 1. 14
Will be described in detail. Now, on the left side of FIG. 14, Cn =
It becomes 1 and Yn is F when outputting the selection voltage signal Vs.
RY changes from "1" to "0". Selection voltage signal V
s has its potential switched by FRY (F
When RY = 1, -Vp is output, when FRY = 0, Vp is output, and as Yn, -Vp is output, and then Vp is output by switching FRY. On the other hand, on the right side of FIG. 14, conversely, when Cn = 1, F
RY changes from "0" to "1". Therefore Yn
Output Vp and then switch FRY to -Vp
Is output. In this example, since the switching of FRY is set in the latter half of the period of Cn = 1, the duty is wide in the latter half, but this duty can be arbitrarily selected by changing the phase of Cn and FRY. is there.

Next, the actual driving in which the operation of the Y driver described above and the X driver are combined will be described with reference to FIG. FIG. 15 shows waveforms applied to the m-th pixel in the horizontal direction and the n-th pixel in the vertical direction of the liquid crystal panel 115 of FIG. 1 in the same manner as described in FIG. The column electrode signal Xm is used to sequentially sample the AC video signal 104, hold the data for one horizontal scanning period, and output the data, so that the output data itself is the one before one horizontal scanning period. is there. The row electrode signal Yn is the signal shown in FIG. 11 described above. Here, one horizontal scanning period means one field period in the number of data lines (number of column electrodes).
When a certain column electrode is provided with a rest period, it becomes a period divided by the number of column electrodes other than the column electrode which is the rest period.

Next, the difference signal Xm-Yn between the column electrode signal Xm and the row electrode signal Yn actually applied to the nonlinear element 114 and the liquid crystal layer 113 will be examined. The column electrode signal Xm outputs the same level within one horizontal scanning period, but the row electrode signal Yn
Has a large polarity reversal in one horizontal scanning period. Therefore, the potential of the difference signal also greatly changes between positive polarity and negative polarity as shown in the lower part of FIG. On the left side of FIG. 15, a large potential is applied to the positive polarity first, and then a large potential is applied to the negative polarity side.
On the right side of FIG. 15, a large potential is applied with positive polarity after selection with negative polarity. As shown in the figure, it becomes a form in which selection is made twice in the periods TA and TB within one horizontal scanning period. When the non-linear element 114 is selected twice, the writing is determined only by the selection in the latter half. Therefore, in FIG. 15 as well, the display gradation is determined by the selection in the latter half period TB (writing on the positive polarity side in the example on the right side). It Therefore, the display in the driving of FIG. 15 (in other words, the effective value actually added to the liquid crystal layer 113) is the same as that of FIG.

Also noteworthy here is the potential of the difference signal Xm-Yn in the first half period TA and the second half period TB of one horizontal scanning period. As described above, the selection of the second half determines the display gradation, but in the first embodiment, the data of the selection in the first half period TA is the complement of the data of the second half period TB (here, the term "complement"). Is defined as a level of 100% when the complement is added to the data such as 0 for 1 and 0.9 for 0.1). This is because the column electrode signal is as follows. Now consider a column electrode signal when selecting with positive polarity. When the panel is a negative display, the potential of the column electrode signal is Va when white is displayed with a positive polarity, -Va when displaying black, and the potential of the column electrode signal is -Va when white is displayed with a negative polarity, When displaying black, it becomes Va. Hereinafter, unless otherwise specified, the panel display refers to the negative display. Assuming that the data is white for the easiest reason, the potential of the column electrode signal is V
a. Considering this as a negative polarity, the potential called Va becomes data black. That is, the column electrode signal has the complement relation defined above from the standpoint of positive polarity and negative polarity. It can be seen in FIG. 15 that this works exactly the same for halftones. Therefore, in the driving of FIG. 15, the complement data is written in the first half period TA (hereinafter referred to as compensation selection) with respect to the selection (hereinafter referred to as main selection) that determines the display gradation in the second half period TB. By this operation, I of the nonlinear element
It is possible to reduce the afterimage caused by the / V shift.

The principle of reducing the afterimage due to the I / V shift of the non-linear element according to the first embodiment will be described in detail with reference to FIG. First, the case where white display is performed will be described. This corresponds to the left side of the drawing. In order to perform white display, the write potential of the main selection in the second half period TB is | Vp + Va |
Therefore, the write potential is the highest. In the first half period TA, the compensation selection is performed because the complement data is written | Vp-Va |
And the smallest potential. On the other hand, when black display is performed (corresponding to the right side of the drawing), the main selection write in the second half period TB is | Vp−Va |, which is the smallest write potential, and the compensation selection in the first half period TA is | Vp + Va |. It becomes a large potential. This means that when white is selected, a large potential is applied to the non-linear element during the main selection, but the previous compensation selection applies only a small potential to the non-linear element, and when black is selected, conversely, a small potential is applied during the main selection. Although it is only necessary, a large potential is applied to the non-linear element in the compensation selection. That is, it means that the potential applied to the non-linear element can be the same whether white is selected or black is selected.

Strictly speaking, if the effective voltage applied to the non-linear element is equal to VmW at the time of white display and VmB at the time of black display, the I / V characteristic shift of the non-linear element can be made uniform and the afterimage can be eliminated. Is possible. When this condition is written as an equation in FIG.

[Equation 3] Becomes Therefore, the period of compensation selection and main selection TA, TB
Can be determined so that the above equation is satisfied. Generally, in the case of compensation selection, the compensation selection potential is applied to the non-linear element from the non-selection period (from -2Va to-(Vp-V in the example on the left side in FIG. 16).
a), 0 to − (Vp + Va) on the right side) The main selection is from the compensation selection potential to the main selection potential (on the left side in FIG. 16, −).
From (Vp-Va) to (Vp + Va),-(Vp on the right
Since + Va) to (Vp-Va potential) is applied, a larger potential is applied to the non-linear element during this selection. Therefore, TA> TB.

The fact that the afterimage due to the shift of the I / V characteristic of the nonlinear element can be remarkably reduced will be described with reference to the example of FIG. As described with reference to FIG. 10, the pixel P1, that is, Xm
Signal applied to 1-Yn, pixel P2 or Xm2-
The signal applied to Yn is shown in FIG. The pixel P1 is displayed in black and the pixel P2 is displayed in white. When the display content is switched to the halftone in this state, the effective voltage VmsB applied to the pixel P1 and the pixel P are applied to the pixel P1 according to the principle described above.
Since the effective voltage VmsW applied to 2 is equal, the I / V characteristic shift amount of the nonlinear element is also equal. Therefore, the effective voltage S1 applied to the pixel P1 which is displaying halftone and the effective voltage S2 applied to the pixel P2 are also equal, and the brightness difference described in FIG. 10 can be eliminated.

In the present embodiment, only the case of white display and black display has been described for the sake of clarity, but according to the present invention, the I / V characteristic shift of the non-linear element can be made uniform in all display cases. . Therefore, it is possible to reduce the afterimage regardless of the display content.

Second Embodiment FIG. 18 is a time chart of the Y driver necessary for realizing the second embodiment. Where DY / YSCL / F
RY, C1, and Cn are the same as the signals described in FIG. Also, the duty of YSCL is 50% and the V of Vs
It is also used as a switching signal for r system and Vp system.
That is, Vs is output according to the following relationship.

When FRY = “0” and YSCL (switching signal) = “0”, Vs = Vr FRY = “0” and YSCL (switching signal) = “1”, Vs = Vp FRY = “1” and YSCL When (switching signal) = “0”, Vs = −Vr FRY = “1” and YSCL (switching signal) = “1” Vs = −Vp Y The output Yn of the driver is the selection voltage when the selection signal Cn = 1 Although the output of the signal Vs is the same, the phase relationship between the selection signal Cn and the AC inversion signal FRY is changed and | Vr |> | Vp | in order to implement the second embodiment.
In the conventional drive, the switching timings of Cn and FRY are matched, but in the second embodiment, the phase relationship is shifted, that is, the timing of changing the phase of FRY within the period of Cn = 1. A detailed description will be given with reference to FIG. now,
On the left side of FIG. 18, Cn = 1 and Yn outputs the selection voltage signal Vs. At this time, Vs is −
A voltage that is Vr and is relatively larger than -Vp is output. . Next, FRY changes from "1" to "0" during the period of Cn = 1. At the same time as this timing, YSCL
(Vr / Vp switching signal) is also switched from "0" to "1", so that Vp is output as the selection voltage signal Vs as Yn. That is, the output of Yn becomes the output of Vp by the switching of FRY after the output of -Vr. Also, FIG.
On the right side of 8, when Cn = 1, FRY changes from “0” to “1” and YSCL changes from “0” to “1”,
Therefore, Yn outputs Vr and then outputs -Vp by switching FRY. In this example, the switching of FRY is set at the center so that the selection period (Cn = 1) is equally divided, but this duty can be arbitrarily selected.

Next, the actual driving in which the operation of the Y driver described above and the X driver are combined will be described with reference to FIG. 19, in the same manner as described with reference to FIG. 6, the liquid crystal panel 115 of FIG.
The waveform applied to the nth pixel in the vertical direction is shown. The column electrode signal Xm is used to sequentially sample the AC video signal 104, hold the data for one horizontal scanning period, and output the data, so that the output data itself is the one before one horizontal scanning period. is there. The row electrode signal Yn is the signal shown in FIG. 18 described above.

Next, the difference signal Xm-Yn between the column electrode signal Xm and the row electrode signal Yn actually applied to the nonlinear element 114 and the liquid crystal layer 113 will be examined. The column electrode signal Xm outputs the same level during one horizontal scanning period, but the polarity of the row electrode signal Yn is largely inverted during one horizontal scanning period. Therefore, the potential of the difference signal also changes greatly between positive polarity and negative polarity as shown in the lower part of FIG. Therefore, as in the first embodiment, it becomes a form in which the periods TA and TB are selected twice within one horizontal scanning period. In the non-linear element, when the selection is performed twice, the writing is determined only by the selection in the latter half. Therefore, also in FIG. 19, the display gradation is determined by the selection in the latter half period TB (writing on the positive polarity side in the example on the right side). . Therefore, FIG.
In the case of driving, the display (in other words, the liquid crystal layer 1
The actual value added to 13 is the same as in FIG. Also in the second embodiment, as in the first embodiment, the data selected in the first half period TA is the complement of the data in the second half period TB. The reason for this is the same as in the first embodiment. Therefore, even in the driving of FIG. 19, the complement data is written during the compensation selection in the first half period TA with respect to the main selection in the second half period TB which determines the display gradation in the second half. By this operation, it is possible to reduce the afterimage caused by the I / V shift of the nonlinear element.

The principle of reducing the afterimage due to the I / V shift of the non-linear element according to the second embodiment will be described in detail with reference to FIG. First, the case where white display is performed will be described. This corresponds to the left side of the drawing. In order to perform white display, the write potential of the main selection in the second half period TA is | Vp + Va |
Therefore, the write potential is the highest. Compensation selection in the first half period TA is done by writing complementary data | Vr-Va
It is the smallest potential among the voltages to be compensated with |. On the other hand, when black display is performed (corresponding to the right side of the drawing), the main selection write in the latter half period TB is | Vp−Va | with the smallest write potential, and the compensation selection in the first half period TA is | Vr.
It becomes a large potential of + Va |. This means that when white is selected, a large potential is applied to the non-linear element during the main selection, but the previous compensation selection applies only a small potential to the non-linear element, and when black is selected, conversely, a small potential is applied during the main selection. Although it is only necessary, a large potential is applied to the non-linear element in the compensation selection. That is, it means that the potential applied to the non-linear element can be the same whether white is selected or black is selected.

Strictly speaking, if the effective voltage applied to the non-linear element is equal to VmW during white display and VmB during black display, the I / V characteristic shift of the non-linear element can be made uniform and the afterimage can be eliminated. Is possible. If this condition is written as a formula in FIG. 20, the above-mentioned formula 3 is established.

Therefore, the selection voltage | Vr | for compensation selection may be determined so as to satisfy the equation (3). Generally, in the compensation selection, the compensation selection potential is applied to the non-linear element from the non-selection period (in the example on the left side in FIG. 20, from -2Va to-(Vr-V
a), 0 to − (Vr + Va) on the right side), and the main selection is from the compensation selection potential to the main selection potential (on the left side in FIG. 20, −).
From (Vp-Va) to (Vp + Va),-(Vp on the right
Since + Va) to (Vp-Va potential) is applied, a larger potential is applied to the non-linear element during this selection. Therefore, Vr> Vp.

The fact that afterimages due to the I / V characteristic shift of the non-linear element can be remarkably reduced will be described with reference to the example of FIG. As described with reference to FIG. 10, the pixel P1, that is, Xm
Signal applied to 1-Yn, pixel P2 or Xm2-
The signal applied to Yn is shown in FIG. The pixel P1 is displayed in black and the pixel P2 is displayed in white. When the display content is switched to the halftone in this state, the effective voltage VmsB applied to the pixel P1 and the pixel P are applied to the pixel P1 according to the principle described above.
Since the effective voltage VmsW applied to 2 is equal, the I / V characteristic shift amount of the nonlinear element is also equal. Therefore, the effective voltage S1 applied to the pixel P1 which is displaying halftone and the effective voltage S2 applied to the pixel P2 are also equal, and the brightness difference described in FIG. 10 can be eliminated.

Further, in the second embodiment, only the case of white display and black display is described for the sake of clarity, but according to the second embodiment, the I / V characteristic shift of the nonlinear element is changed in all the display cases. Can be made uniform. Therefore, it is possible to reduce the afterimage regardless of the display content.

Third Embodiment This third embodiment is an improvement of the driving method using the liquid crystal display device of FIG.

FIG. 22 is a time chart of the Y driver necessary to realize the third embodiment.

Here, DY / YSCL / FRY / C1 / C
n is the same as the signal described in FIG. The output Yn of the Y driver is the selection voltage signal V when the selection signal Cn = 1.
Although s is still output, the phase relationship between the selection signal Cn and the AC inversion signal FRY is changed to implement the third embodiment.

In the example of FIG. 22, FIG. 14 of the first embodiment is used.
Unlike the above example, since the switching of FRY is set at the center of the period of Cn = 1, the duty is even. The duty can be arbitrarily selected by changing the phases of Cn and FRY.

Next, the actual driving in which the operation of the Y driver described above and the X driver are combined will be described with reference to FIG. 23 shows the waveforms applied to the m-th pixel in the horizontal direction and the n-th pixel in the vertical direction of the liquid crystal panel 115 of FIG. 11 as in the case of FIG. For the column electrode signal Xm, the video signal is sequentially sampled by the A / D converter 120, and Von.
The Voff period is output. In the third embodiment, one horizontal scanning period is divided into two, TA and TB, and the data selected in the first half period TA is the complement of the data in the second half period TB. In the actual column electrode signal, the AC inversion signal FRX is switched within one horizontal scanning period, so that the data in the first half is line-symmetric with respect to the switching of the FRX with respect to the latter half data. Therefore, in relation to the polarity of the scanning signal in the period TB,
The potential Von of the column electrode signal Xm in the writing period TB in which a relatively large voltage is applied to the pixel is as shown in FIG.
In the case of the waveform of 3, the column electrode signal Xm becomes Va,
A and TB have the same potential Von with the same pulse width. In this embodiment, TA = TB (hence TA = TB
= 1 horizontal scanning period / 2), the drive of the third embodiment can be realized even when TA ≠ TB. Row electrode signal Yn
Is the signal of FIG. 22 described above.

The difference signal X between the column electrode signal Xm and the row electrode signal Yn actually applied to the non-linear element 114 and the liquid crystal layer 113.
Since the polarity of the row electrode signal Yn is largely inverted in one horizontal scanning period in m-Yn, the potential difference of the difference signal also largely changes between positive polarity and negative polarity as shown in the lower part of FIG. From the figure, it can be seen that the selection is performed twice in the periods TA and TB within one horizontal scanning period. Also in FIG. 23, selection of the second half period TB (writing on the positive polarity side in the example on the right side)
The display gradation is determined by. Therefore, the display in the driving of FIG. 23 (in other words, the effective value actually added to the liquid crystal layer 113) is the same as that of FIG.

Also, in the driving example in which the third embodiment is carried out,
The compensation selection in the first half period TA is the complement of the main selection in the second half period TB. The left side of FIG. 23 is an example in which a display close to white is performed in consideration of the case where the panel is displayed negatively. In the latter half period TB, the ratio of Von to Voff is large,
A large effective value is added to the liquid crystal layer 113 of FIG. However, in the selection of the first half period TA, since the complement data described above is selected, a wide pulse having the same potential as the potential Von of the period TB functions as the Voff potential when applied to the pixel, and as a result, It is selected such that the ratio of Von is small.
On the contrary, in the example on the right side of FIG. 23, since display close to black is performed, the ratio of Von to Voff is small in the latter half of the main selection,
Although a relatively small effective value is added to the liquid crystal layer 113, the compensation selection in the first half results in Voff due to the same reason as described above.
However, the ratio of Von is large.

Summarizing the above, the effective value of the compensation selection in the first half is small when the selection is close to white where a large effective value is required for the liquid crystal layer, and the effective value of the compensation selection in the first half is large when the selection is close to black. That is, since the latter half of the main selection required for the actual display is compensated by the first half of the compensation selection, the effective value applied to the non-linear element 114 can be made substantially uniform from white to black display. By this operation, it is possible to reduce the afterimage caused by the I / V shift of the nonlinear element.

Strictly speaking, if the effective voltage applied to the non-linear element is equal to VmW at the time of white display and VmB at the time of black display, the I / V characteristic shift of the non-linear element can be made uniform and the afterimage can be eliminated. Is possible. When this condition is written as an equation in FIG. 23, the same as in the first and second embodiments, Equation 3
Is established.

Therefore, the period TA for compensation selection and main selection,
TB may be determined so as to satisfy the above formula. Note that TA
= TonA + ToffB, TB = TonB + ToffB
Then, TonA / ToffA is replaced by TonB / Tof
If the relationship is approximately the reciprocal of fB, the compensation selection data is in a complementary relationship with the main selection data. In general, in the compensation selection, the compensation selection potential is applied to the non-linear element from the non-selection period (in the example on the left side in FIG. 23, −2Va to − (Vp−
Va), 0 to-(Vp + Va) on the right side) The main selection is from the compensation selection potential to the main selection potential (on the left side in FIG. 23,-).
From (Vp-Va) to (Vp + Va),-(Vp on the right
Since (Vp-Va) to (Vp-Va) is applied, a larger potential is applied to the non-linear element during this selection.
A> TB.

The fact that the afterimage due to the shift of the I / V characteristic of the non-linear element can be remarkably reduced will be described with reference to the example of FIG. As described with reference to FIG. 13, the pixel P1, that is, Xm
Signal applied to 1-Yn, pixel P2 or Xm2-
The signal applied to Yn is shown in FIG. The pixel P1 is displayed in black and the pixel P2 is displayed in white. When the display content is switched to the halftone in this state, the effective voltage VmsB applied to the pixel P1 and the pixel P are applied to the pixel P1 according to the principle described above.
Since the effective voltage VmsW applied to 2 is equal, the I / V characteristic shift amount of the nonlinear element is also equal. Therefore, the effective voltage S1 applied to the pixel P1 that is displaying halftone and the effective voltage S2 applied to the pixel P2 are also equal, and the brightness difference described in FIG. 13 can be eliminated.

Further, in the third embodiment, only the case of white display and black display is described for the sake of clarity, but according to the third embodiment, the I / V characteristic shift of the non-linear element is changed in all display cases. Can be made uniform. Therefore, it is possible to reduce the afterimage regardless of the display content.

Fourth Embodiment In this fourth embodiment, the difference signal Xm-Yn is obtained by changing the waveform of the column electrode signal Xm in FIG. 23, which is the timing chart of the third embodiment, as shown in FIG. The signal waveform of is changed. In the third embodiment, as shown by the column electrode signal Xm in FIG. 23, the first half period T which is the compensation selection is performed.
The data of A is line-symmetric with respect to the data of the latter half period TB which is the main selection, with the switching of FRX as the axis.
In the fourth embodiment, as shown by the column electrode signal Xm in FIG. 25, for example, two identical data that are time-compressed in one horizontal scanning period / 2 are continuously output within one horizontal scanning period. There is. As a result, the difference signal Xm-Yn becomes V of the compensation selection in the third embodiment, as shown in FIG.
While the period TonA that is on is right-justified to the period TA for compensation selection, in the fourth embodiment, the period TonA that is Von for compensation selection is left-justified to the period TA, as shown in FIG. There is.

FIG. 26 shows an example of the configuration of the X driver which outputs the column electrode signal Xm shown in FIG. FIG. 26
Is a drive circuit for supplying an M-bit image signal to each of the N data lines. In the figure, 300
Is a data bus for supplying an M-bit image data signal, and changes N cycles within one cycle, as indicated by 421 in FIG. The M-bit image data signal is written in the first memories 311 to 315 corresponding to the addresses determined by the outputs of the N-stage shift registers 301 to 305, respectively. Reference numerals 351 to 355 in FIG. 26 denote output signals from the shift registers 301 to 305, respectively. The output signals 351 to 355 are usually logic "0".
Therefore, the logical value becomes “1” only once in one cycle, and the contents of the data bus 300 can be written in the first memories 311 to 315.

The timing chart of FIG. 27 shows this state, and the output signals of the shift registers 351 to 355 are shown as 401 to 405, respectively. The contents of the data stored in the first memories 311 to 315 are shown as 411 to 415, respectively.
The diagonal lines show the state where the data is uncertain.

26 and 27, the data bus 300
The image data signal in the memory 311 at the timing of T1.
Then, it is written in the memory 312 at the timing of T2 and written in the memory 313 at the timing of T3. Thereafter, the image data is sequentially written to the memory, the image data is written to the final stage memory 315 at the timing of Tn, and the writing operation of the image data of one cycle to the memory is completed. The image data for one cycle corresponds to the image data for one scanning line.

In FIG. 26, the second memories 321 to 321
A latch pulse (LP) 360 is input to each 25. This latch pulse 360 is output to the first memory 311.
To 315 are transferred to the second memories 321 to 325. The signal waveform of the latch pulse 360 is shown as 422 in FIG. The data of the first memory is simultaneously written to the second memory during the period when the latch pulse 422 is the logic "1", and the second memories 321 to 325 are written during the period when the logic is "0". The data of No. 2 is stable as shown by the data 423 in FIG.

Next, the operation of generating the column electrode signal Xm shown in FIG. 25 based on the data in the second memories 321 to 325 will be described with reference to the timing chart of FIG.

Each of the second memories 321-325 has M-bit data 371-37 as shown in FIG.
5 is output. This M-bit data 371 to 375
And the basic pulse group 361 which is a component of the gradation signal are combined by the gradation signal generation circuits 331 to 335,
The gradation signals 381 to 385 of each stage (that is, the column electrode signal X
m) is generated.

Here, the basic pulse group 361 has a pulse width different from that of the reset signal RES shown in FIG.
^And a GCP signal consisting of ^M pulses. Figure 2
As shown in FIG. 8, the reset signal RES has a pulse that becomes HIGH at the initial position and the final position of one horizontal scanning period, similarly to the latch pulse 422, and a pulse at an intermediate position within the one horizontal scanning period. Have As for the GCP signal, two identical signals, which are time-compressed in one horizontal scanning period / 2, are continuously output within one horizontal scanning period. This reset signal RE
By combining the outputs from the second memories 321 to 325 with the S and GCP signals, the same waveform reflecting the grayscale data is continuously output within one horizontal scanning period as shown in FIG. 381-385 can be generated. The gradation signal generation circuits 331 to 335 can also invert the polarity of the data 381 to 385 every horizontal scanning period based on the polarity inversion signal (FR).

The outputs 381 to 385 of the gradation signal generating circuits 331 to 335 are input to the liquid crystal drive circuits 341 to 345. The liquid crystal drive circuits 341 to 345 have a voltage level 362 (that is, Va or -V) for turning on the liquid crystal.
a) and the voltage level 363 for turning off the liquid crystal (that is, -Va or Va), the gray scale signals 381 to 381.
Liquid crystal drive signals 391 to 39 whose level is shifted from 85
5 (that is, the column electrode signal Xm) is generated.

X for outputting the column electrode signal Xm shown in FIG.
The driver can also be configured as shown in FIG.
The bidirectional shift register 601, the first latch 602, the second latch 603, the decoder 605, and the level shifter 607 + LCD driver 608 in FIG.
6 in the shift registers 301 to 305, the first memory 3
11-315, second memories 321-325, gradation signal generation circuits 331-335, liquid crystal drive circuits 341-345.
It corresponds to. In FIG. 37, the enable control 600 controls the bidirectional shift register 601 and the data control 603 at the timing of the latch pulse LP or the like to realize the data transfer of FIG.

The difference of FIG. 37 from the circuit of FIG. 26 is that
P is not a signal having a pulse width of 2 ^M , but a signal having pulses at 2 ^M positions according to the grayscale value, and the decoder 605 that inputs GCP via the gray scale control 606 is Data 37 from the latch 604
1 to 375 and GCP are detected, and signals 381 to 385 shown in FIG. 28 are generated. Except for this point, the operation of the circuit of FIG. 37 is the same as the operation of the time chart of FIG.

As described above, in the fourth embodiment, the column electrode signal Xm formed by continuously outputting two waveforms reflecting the grayscale data within one horizontal scanning period is shown in FIG. 26 or FIG. It can be easily generated by the relatively simple drive circuit shown in FIG. Then, the column electrode signal X shown in FIG.
The difference signal Xm-Yn signal between m and the row electrode signal Yn can have a waveform in which the Von period TonA in the compensation period TA is left-justified in the compensation period TA. In addition,
Also in the fourth embodiment, the difference signal Xm- shown in FIG.
In Yn, the data in the first half and the data in the second half obtained by dividing one horizontal scanning period into two, TA and TB, have a complementary relationship, respectively.
It is possible to reduce the afterimage caused by the shift in / V.

The fact that the drive circuit shown in FIG. 26 employed in the fourth embodiment can be more simply constructed is compared with the drive circuit for generating the column electrode signal Xm shown in FIG. 23 of the third embodiment. Then you can understand well. FIG. 29A shows the waveform of the column electrode signal Xm used in the third embodiment, and the waveform reflecting the grayscale data has the periods TA and TB.
The waveform has a line symmetry with the boundary of as the axis. Figure 2
9B shows an example of the configuration of a drive circuit for generating the waveform of FIG. 29A. In this case, a relatively large memory such as a FIFO (first-in first-out) memory 501 is used. Will be needed. FIG. 29C shows F
A video signal which is an input signal to the IFO memory 501 is shown, and FIG. 29D shows an output signal from the FIFO memory 501. In this FIFO memory 501, the read clock is set to double speed with respect to the write clock. As a result, with respect to the input signal shown in FIG.
The output signal from the memory 501 is the same in the form that the video signal shown in FIG. 29C is compressed by 1/2 on the time axis at a time timing delayed by one horizontal scanning period / 2. Two consecutive signal waveforms will be output.
The output from the FIFO memory 501 is input to the X driver 503 via the signal processing circuit 502 which processes the signal based on the AC inverted signal FR, so that the pulse waveform having the line symmetry shown in FIG. It can be output as the signal Xm.

Fifth Embodiment In the fifth embodiment, the potential greatly fluctuates due to the difference signal Xm-Yn shown in the first to fourth embodiments, that is, at the boundary between the periods TA and TB. This is an improvement for preventing the noise caused by the display from being displayed on the liquid crystal panel 115.

As shown in FIG. 30, the voltage greatly shifts from the negative potential to the positive potential at the boundary between the periods TA and TB in the difference signal Xm-Yn. This large potential difference generated in the liquid crystal display device may be superimposed as noise on the video circuit in the preceding stage, the tuner circuit or the antenna in the preceding stage as noise, and finally this may be displayed as noise on the liquid crystal screen. This noise can be removed by providing a removing circuit in the video circuit, but the configuration becomes complicated. The fifth embodiment is solved by including the compensation selection period TA of the difference signal Xm-Yn including the blanking period of the video signal.
This means that the compensation selection period TA and one horizontal scanning period (T
When defined in relation to A + TB), TA / (TA + TB) ≦ 1/4. More preferably, TA is (TA + TB) 10 so that the width of the period TA substantially matches the width of the blanking period.
It is good to set it within a few percent.

As shown in FIG. 30, the video signal and the difference signal Xm-Yn are synchronized, and by satisfying the above formula, the compensation selection pulse in the difference signal, that is, the compensation selection period TA is changed to the video signal. It is possible to set so as to almost correspond to the blanking period of. Therefore, the difference signal Xm-Y
Even if noise due to a large potential difference in n is superimposed on the video signal, this noise will be superimposed on the signal within the blanking period. Since the signal within this blanking period is not displayed on the liquid crystal screen, it does not appear as noise on the liquid crystal screen.

Sixth Embodiment In the sixth embodiment, the driving waveform of the column electrode signal Xm is improved so that the voltage applied to both ends of the non-linear element and the liquid crystal layer when the compensation selection is performed is made more than that in the main selection. It is designed to be large.

FIG. 31 shows the waveform of the fourth embodiment shown in FIG.
The column electrode signal Xm is improved. As shown in FIG. 31, the reference potential Va of the column electrode signal Xm at the time of main selection,
The reference potentials at the time of compensation selection with respect to −Va are respectively V
b, -Vb (| Vb |> | Va |).
In the case shown in FIG. 31, the amplitude of the row electrode signal Ym is 2 × V.
Even though the difference signal is set to p, the potential of the difference signal Xm-Yn in the compensation selection is relatively larger than the potential in the main selection.

On the other hand, FIG. 32 shows an improvement of the column electrode signal Xm and the row electrode signal Yn in FIG. 19 which is the second embodiment. Similarly in FIG. 32, the column electrode signal X at the time of the main selection
The reference potentials for compensation selection with respect to the reference potentials Va and -Va of m are set to Vb and -Vb (| Vb |> | Va |), respectively. A case where white display is performed in FIG. 32 (corresponding to the left side of the drawing) will be described. In order to perform white display, the write potential of this selection is | Vp + Va |, which is the highest write potential. In the compensation selection, since complement data is written, | Vr-Vb | is the smallest potential among the voltages to be compensated. On the other hand, when black display is performed (corresponding to the right side of the drawing), | Vp-Va | is the smallest write potential for writing in this selection, and | Vr + Vb | is the largest potential for compensation selection. This means that when white is selected, a large potential is applied to the non-linear element during the main selection, but the previous compensation selection applies only a small potential to the non-linear element, and when black is selected, conversely, a small potential is applied during the main selection. Although it is only necessary, a large potential is applied to the non-linear element in the compensation selection. That is, it means that the potential applied to the non-linear element can be the same whether white is selected or black is selected.

FIG. 33 shows an example of the configuration of the drive circuit on the row electrode side. As shown in FIG. 33, the first power source 701 that sets the reference potential Va in the main selection as the power source voltage for the X driver 700, and the reference potential Vb in the compensation selection.
And a second power source 702 for setting the switch 70, which is switched based on the AC inversion signal FR.
It is configured to be switched by 3 to supply power to the X driver 700. In this case, the first power source 701 may be, for example, about 5V, and the second power source 702 may be configured by a relatively low voltage power source, for example, about 6V.

On the other hand, when the potential in the compensation selection of the row electrode signal Yn is set higher than the potential in the main selection as in the second embodiment, the power supply voltage connected to the Y driver is set. Must be larger. Especially when the non-linear element is an MIM element, this MI
Since the driving voltage of the M element is, for example, 30 to 40 V, which requires a large voltage, a large load is required in order to add a higher voltage thereto. Further, in the liquid crystal drive circuit using the MIM element, in order to obtain a large voltage of 30 to 40 V, a large voltage is generated by swinging a voltage lower than this, and as shown in FIG. The potential Vr at the time of compensation selection with respect to the potential Vp required at that time
It becomes difficult to accurately generate the voltage due to the voltage swing. Therefore, the configuration of the drive circuit is improved by improving the X driver that can set the potential at the time of compensation selection as the difference signal to be larger than the potential of the main selection simply by adding a relatively low voltage power supply. The voltage setting can be performed easily and with high accuracy.

In the first to sixth embodiments, the difference signal Xm
Although it has been described that the compensation selection data of the period TA and the main selection data of the period TB which are given by -Yn have a complementary relationship with each other, the present invention is not limited to this. Even if the strict complement relation is not established, the liquid crystal layer 1 is selected when the main selection is made.
When the data writing charging voltage charged in 13 is high, the compensation charging voltage charged in the liquid crystal layer 113 during compensation selection is low, and conversely when the data writing charging voltage is low. Even if the relationship in which the charging voltage for compensation is large is established between the main selection data and the compensation selection data, the afterimage phenomenon can be suppressed.

Further, in carrying out the first to sixth embodiments, for example, the polarity of the voltage charged in the liquid crystal layer of the pixel in the odd frame and the polarity of the voltage charged in the liquid crystal layer in the even frame. It is also possible to use a line inversion technique for driving so as to be different from each other.

Seventh Embodiment FIG. 34 is a plan view of one pixel of a non-linear element (corresponding to 114 in FIGS. 1 and 11) of the liquid crystal panel used in the embodiment. Here, an MIM element using a material of tantalum-tantalum oxide-chromium is used as the non-linear element, and 801 is tantalum covered with tantalum oxide, which also serves as a column electrode. Reference numeral 802 denotes a chrome pattern, and the intersection with tantalum becomes a MIM element. A transparent ITO pattern 803 serves as a pixel electrode.

FIG. 35 is a sectional view of a portion indicated by a dashed-dotted line 804 in FIG. 34, showing a sectional structure of the MIM element. 901
Is a transparent substrate, 902 is tantalum, and 903 is tantalum oxide.

Next, a method of manufacturing the MIM element having such a structure will be described below. A tantalum layer is formed on the transparent substrate by sputtering and patterned to form a tantalum electrode to be a column electrode. Next, this tantalum electrode is anodized and its surface is covered with tantalum oxide. Here, a diluted phosphoric acid aqueous solution is used as the anodizing electrolyte.

By initially limiting the current and then applying a constant voltage, an oxide film having a uniform thickness can be obtained. After that, the chromium layer is sputtered and patterned, and further ITO which becomes the transparent pixel electrode is sputtered and patterned. In this way, the electrode substrate on which the MIM element is mounted is formed. A liquid crystal panel can be formed by laminating this substrate and a substrate having a counter electrode formed thereon and enclosing a liquid crystal in the gap.

FIG. 36 is a display diagram of an example of measuring the amount of afterimage in the embodiment. This is when the window display of FIG. 8 is left for a certain period of time and then the screen is switched to the uniform screen display as shown in FIG.
It is a display of changes in the luminance ratio of points P1 and P2 in FIG.

The horizontal axis represents the elapsed time after switching to the uniform screen display in a logarithmic manner, and the vertical axis represents RΔT when the brightness of points P1 and P2 is TP1 and TP2, respectively, and RΔT = | TP1− It is defined by TP2 | / TP2 × 100 and represents the degree of the luminance ratio.

The conventional driving method is a, the driving method described in the third embodiment is A, the case where a liquid crystal panel manufactured by the conventional anodizing method is used is b, and the anodizing method described in the seventh embodiment is used. Letting B be the time of using the produced liquid crystal panel, the luminance ratio change at the time of ab combination is line 1, the time of ab is line 2, the line Ab is line 3, and the case of the embodiment. AB
Became line 4. According to the result of comparison with the sensory test, the afterimage cannot be generally identified if the luminance ratio RΔT is initially 8% or less, although it depends on the luminance itself. In fact, in the display device of this embodiment, the afterimage could not be confirmed unless the fixed pattern was displayed for a very long period of time as compared with the conventional case.

This is because the amount of I / V characteristic shift can be greatly reduced as compared with the conventional non-linear element by forming the insulating layer serving as the non-linear resistor by the anodic oxidation method using the electrolyte solution containing phosphorus. Is. This phenomenon has been clarified by experimental results, and the mechanism is still unclear, but
It is presumed that the incorporation of phosphorus into the oxide film stabilizes the impurity levels existing in the film, and stabilizes the current flowing due to the Pool Frenkel effect, the Schottky effect, or the like. The above-mentioned insulating layer is MI
The same effect can be obtained even when used as an insulating layer of an S element. Further, in the MIM element, one metal layer of the MIM element may be composed of a transparent conductive film layer and may also be used as a transparent electrode of the liquid crystal panel.

As described above in the embodiments, according to the present invention, the liquid crystal layer is charged with the voltage according to the display gradation even when there is an afterimage due to the IV characteristic shift of the nonlinear element. Immediately before the data writing period, compensation for setting a voltage having a polarity opposite to that of the writing voltage in the writing period and having a complementary relationship on the display gradation with the voltage charged in the liquid crystal layer. By applying the voltage to the pixel, the IV characteristic shift of the non-linear element can be made uniform regardless of the display contents, and thus the afterimage caused by the shift can be remarkably reduced and the reliability is high. A liquid crystal display device can be realized.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a liquid crystal display device.

FIG. 2 is a configuration example diagram of a voltage selection switch in the row-direction drive circuit of FIG.

FIG. 3 is a diagram showing IV characteristics of a non-linear element.

FIG. 4 is a time chart diagram of a conventional example of each unit of FIG.

FIG. 5 is a time chart diagram according to a conventional example of row-direction driving.

FIG. 6 is a drive waveform diagram of a conventional example of a liquid crystal panel.

FIG. 7 is a diagram illustrating IV characteristic shift of a nonlinear element.

FIG. 8 is a diagram showing a window display on a liquid crystal panel.

FIG. 9 is a diagram showing halftone display on a liquid crystal panel.

FIG. 10 is a drive waveform diagram according to a conventional example for explaining that an afterimage is generated due to the IV characteristic shift of a nonlinear element.

FIG. 11 is a configuration diagram of another example of the liquid crystal display device.

12 is a drive waveform diagram of a conventional liquid crystal panel using the device of FIG.

FIG. 13 is a drive waveform diagram according to a conventional example for explaining that an afterimage is generated due to the IV characteristic shift of a nonlinear element.

FIG. 14 is a time chart diagram of row-direction driving according to the first embodiment.

FIG. 15 is a drive waveform diagram of the liquid crystal panel according to the first embodiment.

FIG. 16 is a diagram illustrating the principle of afterimage reduction according to the first embodiment.

FIG. 17 is a drive waveform diagram illustrating that afterimages due to the nonlinear element according to the first embodiment can be reduced.

FIG. 18 is a time chart diagram of row-direction driving according to the second embodiment.

FIG. 19 is a drive waveform diagram of a liquid crystal panel according to a second example.

FIG. 20 is a diagram illustrating the principle of afterimage reduction according to the second embodiment.

FIG. 21 is a drive waveform diagram illustrating that afterimages due to a nonlinear element according to the second embodiment can be reduced.

FIG. 22 is a time chart of row-direction driving according to the third embodiment.

FIG. 23 is a diagram illustrating the principle of afterimage reduction according to the third embodiment.

FIG. 24 is a drive waveform diagram illustrating that afterimages can be reduced by a non-linear element according to the third embodiment.

FIG. 25 is a drive waveform diagram of a liquid crystal panel according to a fourth example.

FIG. 26 is a circuit diagram of an X driver used in the fourth embodiment.

FIG. 27 is a characteristic diagram for explaining a signal change state of each unit in FIG. 26.

28A to 28D are diagrams for explaining a drive circuit for generating the column electrode signal Xm shown in FIG. 23 and the operation thereof, respectively.

29 is a time chart showing the operation of the grayscale signal generation circuit of FIG. 26. FIG.

FIG. 30 is a drive waveform chart for explaining the fifth embodiment.

FIG. 31 is a drive waveform diagram of a liquid crystal panel according to a sixth embodiment.

FIG. 32 is another driving waveform diagram of the liquid crystal panel according to the sixth embodiment.

FIG. 33 is an explanatory diagram of an X driver that generates the column electrode signal shown in FIGS. 31 and 32.

FIG. 34 is a plan view of a non-linear element according to a seventh exemplary embodiment.

FIG. 35 is a cross-sectional view of a non-linear element of Example 7.

FIG. 36 is a display diagram of an example of measuring the afterimage level in the seventh example and the conventional example.

FIG. 37 is a circuit diagram showing a modification of the X driver used in the fourth embodiment.

[Explanation of symbols]

 101 Column Electrode Driving Circuit (X Driver) 102 Row Electrode Driving Circuit (Y Driver) 103 Shift Register 104 AC Video Signal Generating Circuit 105 Analog Switch 106 Capacitor 107 Analog Switch 108 Capacitor 109 Buffer Amplifier 110 Liquid Crystal Power Generation Circuit 111 Shift register 112 Power source selection switch 113 Liquid crystal layer 114 Non-linear element 115 Liquid crystal panel 120 A / D converter

 ─────────────────────────────────────────────────── ─── Continuation of front page (31) Priority claim number Japanese Patent Application No. 5-149552 (32) Priority date Hei 5 (1993) June 21 (33) Priority claiming country Japan (JP) Article 30 of the Patent Act Paragraph 1 Application for application Announced on April 23, 1993, in "1st Liquid Crystal Display Seminar" issued by Nikkei BP Co., Ltd. (72) Inventor Masasuke Konishi 3-3-5 Yamato, Suwa City, Nagano Prefecture Seiko Epson Corporation (72) Inventor Hiroaki Mikoshiba 3-3-5 Yamato, Suwa City, Nagano Prefecture Seiko Epson Corporation

Claims (16)

[Claims] 1. A plurality of row electrodes to which a scanning signal is supplied,
A plurality of column electrodes to which a data signal is supplied; and a pixel formed by connecting in series a liquid crystal layer and a two-terminal element having a non-linear resistance characteristic at each intersection of the plurality of row and column electrodes. , A relatively large write voltage is applied to the pixels during a data write period in which each row is selected and the liquid crystal layer of each pixel is charged with a voltage according to a display gradation. In a method of driving a liquid crystal display device, in which a holding voltage that is relatively small is applied in a data holding period after the writing period, the liquid crystal layer is applied to the liquid crystal layer in the writing period immediately before the writing period. A compensation charging voltage having a polarity opposite to that of the data charging voltage, which is small when the data charging voltage is large, and is large when the data charging voltage is small,
A method of driving a liquid crystal display device, wherein a compensation voltage for charging the liquid crystal layer is applied to the pixels. 2. The width of the period TB, the potential of the scanning signal in the period TB, when the compensation period in which the compensation voltage is applied is TA and the data writing period is TB, according to claim 1. Alternatively, with respect to the potential of the data signal, at least one of the width of the period TA, the potential of the scanning signal and the potential of the data signal in the period TA is made different, and applied to the two-terminal element. The driving method of the liquid crystal display device, wherein the effective values of the applied voltages are set to be substantially equal for the two-terminal elements of each pixel. 3. The method for driving a liquid crystal display device according to claim 2, wherein TA / (TA + TB) ≦ 1/4 is set. 4. The method for driving a liquid crystal display device according to claim 2, wherein the period TA includes a blanking period of a video signal for generating the scan signal and the data signal. 5. A plurality of row electrodes to which a scanning signal is supplied,
A plurality of column electrodes to which a data signal is supplied; and a pixel formed by connecting in series a liquid crystal layer and a two-terminal element having a non-linear resistance characteristic at each intersection of the plurality of row and column electrodes. , A relatively large write voltage is applied to the pixels during a data write period in which each row is selected and the liquid crystal layer of each pixel is charged with a voltage according to a display gradation. In a method of driving a liquid crystal display device, in which a relatively small holding voltage is applied in a data holding period after a writing period, the data signal is a voltage corresponding to a display gradation for each horizontal scanning period. It is set and has the same voltage level in one horizontal scanning period, and the scanning signal has a first half period TA when the one horizontal scanning period is divided into two and the latter half period TB as the writing period. At this time, in the period TA and the writing period TB, The driving method of a liquid crystal display device characterized in that it is set to the voltage to vary the polarity of the voltage charged in the liquid crystal layer. 6. The time ratio between the periods TA and TB according to claim 5, wherein the effective value of the voltage applied to the two-terminal element is substantially equal for the two-terminal element of each pixel. A method for driving a liquid crystal display device, which is set. 7. The scanning signal according to claim 5, wherein the scanning signals are generated in the periods TA and TB so that the effective values of the voltages applied to the two-terminal elements are substantially equal to each other in the two-terminal elements of each pixel. A method of driving a liquid crystal display device, wherein the voltages are set to different voltages. 8. The scanning signal according to claim 7, wherein the time widths of the periods TA and TB are substantially equal, the voltage in the period TA is VTA, and the voltage in the period TB is VTB. , | VTA |> | VTB |. The driving method of the liquid crystal display device. 9. A plurality of row electrodes to which a scanning signal is supplied,
A plurality of column electrodes to which a data signal is supplied; and a pixel formed by connecting in series a liquid crystal layer and a two-terminal element having a non-linear resistance characteristic at each intersection of the plurality of row and column electrodes. , A relatively large write voltage is applied to the pixels during a data write period in which each row is selected and the liquid crystal layer of each pixel is charged with a voltage according to a display gradation. In a driving method of a liquid crystal display device, in which a relatively small holding voltage is applied in a data holding period after a writing period, the scanning signal is a first half period when one horizontal scanning period is divided into two. , And the latter half period TB is the writing period, the period TA and the writing period TB are set to voltages that make the polarities of the voltages charged in the liquid crystal layer different from each other. During the period TB corresponds to the display gradation. Voltage is set to a voltage whose absolute value is larger than the voltage in the period TB in the period TA, and the effective value of the voltage applied to the two-terminal element is set to the two terminals of each pixel. A method for driving a liquid crystal display device, characterized in that the elements are made substantially the same. 10. A plurality of row electrodes to which a scanning signal is supplied, a plurality of column electrodes to which a data signal is supplied, and a liquid crystal layer and a non-linear resistance characteristic at each intersection of the plurality of row and column electrodes. Each pixel configured by connecting terminal elements in series, and selecting a respective row and charging the liquid crystal layer of each pixel with a voltage according to a display gradation, A relatively high write voltage is applied to the pixel, a relatively low hold voltage is applied in a data holding period after the write period, and the data signal is applied to each pixel. In a method of driving a liquid crystal display device, which is a pulse width modulation signal whose pulse width is variable according to the voltage charged in the liquid crystal layer, in one horizontal scanning period, the first half is a period TA and the latter half TB is The writing period is divided into two, The data signal has a pulse potential that is the same as the pulse potential in the writing period TB even in the period TA, and has the same ratio of each pulse width to each of the periods TA and TB. The method for driving a liquid crystal display device, wherein the scanning signal is set to a voltage that makes the polarities of the voltages charged in the liquid crystal layer different between the periods TA and TB. 11. The difference signal between the data signal and the scanning signal according to claim 10, wherein a period corresponding to the pulse width of the data signal is ToffA within the period TA, and another period signal within the period TA is included. Period TonA
(TA = TonA + ToffA), and the period corresponding to the pulse width of the data signal is Ton within the period TB.
B, and another period within the period TB is ToffB (TB
= TonB + ToffB), TonA / TA and TonB / TB have a reciprocal relationship, and a method for driving a liquid crystal display device. 12. The time ratio between the periods TA and TB according to claim 10, wherein the effective value of the voltage applied to the two-terminal element is substantially equal for the two-terminal element of each pixel. A method for driving a liquid crystal display device, which is characterized in that 13. A plurality of row electrodes to which a scanning signal is supplied, a plurality of column electrodes to which a data signal is supplied, and a liquid crystal layer and a non-linear resistance characteristic at each intersection of the plurality of row and column electrodes. Each pixel configured by connecting terminal elements in series, and selecting a respective row and charging the liquid crystal layer of each pixel with a voltage according to a display gradation, A relatively high write voltage is applied to the pixel, a relatively low hold voltage is applied in a data hold period after the write period, and the data signal is changed in the write period. Of the liquid crystal display device, which is a pulse width modulation signal having a potential Von to which a voltage having a large absolute value is applied to each pixel and a potential Voff to which a voltage having a small absolute value is applied in relation to the polarity of the scanning signal. In the driving method, the first half of one horizontal scanning period Is the period TA, and the latter half of the period TB
Is divided into two as the writing period, the data signal has the same potential as the potential Von in the writing period TB in the period TA, and each pulse for each of the periods TA and TB. The signals having the same width ratio are set, and the scanning signal is set to a voltage that makes the polarities of the voltages charged in the liquid crystal layer different between the periods TA and TB. Of the difference signal is ToffA in a period corresponding to the pulse width of the same potential as the potential Von of the data signal in the period TA, and TonA in another period in the period TA (TA = TonA + ToffA).
And the potential Von of the data signal within the period TB
The period corresponding to the pulse width of
The other period in B is set to ToffB (TB = TonB + Tof
fB), and the first half of the period TA is the period T
onA, the latter half of which is the period ToffA, and the period T
In B, the first half is the period ToffB and the second half is the period Toff.
A method for driving a liquid crystal display device, wherein the driving method is nB. 14. A liquid crystal display device to which the driving method according to claim 1 is applied, wherein the two-terminal element has a metal layer-insulating layer-metal layer structure MI.
M element or MI of metal layer-insulating layer-semiconductor layer structure
A liquid crystal display device, which is an S element, wherein an oxide film anodized with a solution of an electrolyte containing phosphorus such as phosphoric acid or ammonium phosphate is used as the insulating layer of the element. 15. The liquid crystal display device according to claim 14, wherein the insulating layer is anodized tantalum. 16. The liquid crystal display device according to claim 14, wherein one metal layer of the MIM element is a transparent conductive film layer.