JPH0771086B2 - Bus interface circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a bus interface circuit used for a communication terminal or the like connected to a common transmission path by a bus.

(Prior art) In recent years, the development of communication networks including new media has been remarkable,
In order to provide more advanced and faster communication services,
Conventional analog communication is shifting to digital communication.

Among them, ISDN (Integrated Service Digital Network), which is currently being standardized by CCITT (International Telegraph and Telephone Consultative Committee), is expected to spread widely to ordinary households.

By the way, as an interface for accessing this ISDN, various recommendations such as S, T, U and V have been made.

Among these, the interface reference point S is two information (B) channels having a capacity of 64 Kbps for storing information between communication terminals and communication terminals, and for controlling call originating and terminating calls between the communication terminals and exchanges. By multiplexing and transmitting one common signal (D) channel in which signal information is put, a plurality of communication terminals are connected to a common transmission path by a bus, and communication of a plurality of terminals is enabled at the same time.

By the way, in order to improve the functionality of communication terminals, it is common to use a microprocessor to control devices.
The microprocessor is also used for a series of outgoing and incoming sequence control.

This microprocessor has a function of referring to the contents of a ROM (Read Only Memory) in which a control program is stored and executing device control according to the control program. Noise or the like may be mixed in with the power supplied to the processor and the peripheral circuits. When such a situation occurs, the microprocessor may run out of control and recovery may become impossible.

In this case, depending on the abnormal state of the communication terminal, a phenomenon may occur in which the transmission line is continuously accessed by a meaningless signal. However, a system in which a plurality of communication terminals are connected to the transmission line by a bus When such a phenomenon occurs, there is a problem that other normal communication terminals fall into communication incompatibility.

Conventionally, a mode in which a plurality of terminals are connected to a common transmission path by a bus has been realized in a local area network (hereinafter referred to as LAN).

In a LAN, generally, communication information of a communication terminal is packetized in a predetermined format, a vacancy of a transmission path is confirmed before accessing the transmission path, and access is started only when there is a vacancy. At this time, if a "collision" occurs in which a plurality of communication terminals simultaneously access the transmission path, a method is employed in which this is detected, a timer is driven by a random number, and the access is made again.

In such a LAN type communication terminal, in order to reduce the influence on the transmission line when an abnormality occurs in the terminal, the maximum length of the packet to be sent to the transmission line is specified, the timer is driven at the start of access to the transmission line, A control means for forcibly stopping the access to the transmission path is provided if the transmission path is continuously accessed even when the timer times out.

By the way, in the case of carrying out the packet type information transmission in the LAN described above, the abnormality can be easily detected by monitoring the sending time of the information transmission to the transmission path.

On the other hand, at the ISDN interface reference point S, two information channels are connected and controlled by one common signal channel.

In the common signal channel, all communication terminals connected to the bus can arbitrarily access, and call control information of a predetermined format and protocol is exchanged between the communication terminal and the switching device in this common signal channel. To do. Then, according to this call control information, only the communication terminal which is given the use of the information channel by the switching device accesses the information channel in an arbitrary format.

Therefore, if the circuit for controlling the transmission and reception of the signal information on the common signal channel malfunctions due to noise of the power source and the meaningless information is still sent to the common signal channel, for example, the same transmission path will be used. There is a problem that it becomes impossible for other communication terminals connected to the bus to access the common signal channel.

(Problems to be Solved by the Invention) The present invention has been made under the circumstances described above, and a plurality of communication terminals are connected to a common transmission line by a bus, and communication between communication terminals and communication terminals is performed on the transmission line. In a bus interface circuit on the communication terminal side that multiplexes and transmits an information channel that contains information and a common signal channel that contains call control information for outgoing and incoming calls, an abnormality due to noise, etc. occurred in the microprocessor that controls communication. However, it is an object of the present invention to enable automatic recovery even if a phenomenon occurs in which access to the common signal channel is continuously performed.

[Structure of the Invention] (Means for Solving Problems) The bus interface circuit of the present invention includes an information channel for storing communication information to be communicated between communication terminals and a common signal for storing call control information for outgoing and incoming calls. A predetermined format for performing outgoing and incoming call control using the common signal channel in a bus interface circuit of each communication terminal of a communication network in which a plurality of communication terminals are bus-connected to a transmission path for multiplexing and transmitting channels Signal information control means for controlling the transmission and reception of the signal information, and signal information monitoring means for monitoring the signal information sent from the signal information control means to the common signal channel to detect the occurrence of an abnormality, The occurrence of an abnormality in the signal information transmitted to the common signal channel is detected by the signal information monitoring means. , In which the signal information control unit in the bus interface circuit of the communication terminal is configured to be forcibly restored to the initial state.

(Operation) In the bus interface circuit of the present invention, when an abnormality is detected at the time of accessing the common signal channel, the signal information control means in the bus interface circuit of the communication terminal generating the signal information is forcibly set to the initial state. Since the initialization is performed so as to recover, the bus interface circuit automatically recovers to a normal state unless an unrecoverable failure occurs in the internal circuit element in the communication terminal.

Further, even if the initialization is performed, if the abnormal state continues, access to the transmission path can be stopped, so that the influence on other normal communication terminals of the transmission path can be minimized.

(Example) Hereinafter, the detail of the Example of this invention is described based on drawing.

FIG. 1 is a block diagram showing the configuration of an apparatus according to an embodiment of the present invention.

The figure shows an embodiment in which the present invention is applied as a bus interface circuit of a communication communication terminal such as a digital telephone and a data communication terminal.

In the figure, 1 is a common signal control unit, 2 is a multiplexing unit, 3 is a signal information monitoring unit, 4 is an encoding unit, 5 is a driver, 6 is a transmission transformer, 7 is a reception transformer, 8 is a receiver, and 9 is a decoding unit. A digitization unit, 10 is a separation unit, 11 is a clock extraction unit, and 12 is a D channel control unit.

In this circuit, the common signal control unit 1 transmits / receives call information for making and receiving calls to / from a private branch exchange (not shown) (hereinafter referred to as PBX) via a common signal channel (hereinafter referred to as D channel), Information channel (hereinafter,
Control the connection and disconnection of the B channel).

The common signal control unit 1 includes a microprocessor 1a, a memory 1b that stores a signal control program,
Operation panel 1c for making and receiving calls
A data link controller 1d for framing signal information on the D channel based on high-level data link control (hereinafter referred to as HDLC) to be described later
For example, when making a call, the operation panel 1c
Then, when an operation such as off-hook or dialing of the other party is performed, the microprocessor 1a generates signal information according to the input information from the operation panel 1c and outputs it to the data link controller 1d.

As a result, the data link controller 1d, as shown in FIG. 2, has a start flag SF, an address section A, a control section C,
An HDLC frame including an information section C, a check bit CRC and an end flag EF is generated, and signal information is output to the multiplexing section 2 by a transmission enable signal (DCNT) from a D channel control section 12 described later.

The multiplexing unit 2 has, for example, the configuration shown in FIG.
B channel transmission information supplied from the communication terminal that has the function of generating a transmission frame signal from the communication terminal to the PBX
B1TX, B2TX and D channel transmission information DTX supplied from the common signal control unit 1, a frame synchronization signal F, a DC balance bit L are multiplexed, and an NRZ of 192KHZ speed is obtained.
A (non-return to zero) signal is generated and output to the encoding unit 4 to be converted into a bipolar signal, and the driver 5
The transmission transformer 6 is driven via the line to send it to the transmission line T line to the PBX.

Next, the reception frame signal having the configuration shown in FIG. 3 is transmitted from the PBX to the transmission line R line, and is converted from the bipolar signal to the NRZ signal in the combining unit 9 via the reception transformer 7 and the receiver 8. Then, it is supplied to the separation unit 10.

The separation unit 10 separates the frame synchronization bit F, the DC balance bit L, the information channels B1 and B2, the signal channel D, and the echo bit E into B1 and B2 channels.
Supply to external communication terminal as RX, B2RX, D channel DR
X is supplied to the data link controller 1d.

Here, the echo bit E is a monitor bit for detecting an empty state of the D channel and "collision", and
The D channel bit from the communication terminal to the PBX shown in (B) in the figure is folded back on the PBX side to the E bit from the PBX to the communication terminal shown in (A). Then, by monitoring this E bit, it is possible to know whether or not there is a vacancy in the D channel.

When a plurality of communication terminals are connected to the transmission line by a bus, a "collision" can be detected by comparing the E bit with the signal information transmitted by itself while the D channel is being accessed. You can

Therefore, in the separation unit 10, the echo bit ERX is set to D
It is supplied to the channel control unit 12, and the D channel control unit 12 detects the availability of the D channel by this ERX, and during the access of the D channel, the D channel transmission information DTX and ERX from the data link controller 1d. The access control of the D channel is performed by comparing with.

Further, the clock extraction unit 11 inputs the received NRZ signal from the decoding unit 9, extracts the 192KHZ clock, divides the 64KHZ clock for the information channel and the 16KHZ clock for the D channel, and divides the information channel and the D channel. A synchronous clock for transmitting and receiving is supplied to each unit.

On the other hand, the monitoring unit 3 receives the D channel signal information DTX from the data link controller 1d and measures the access time of the D channel while the control unit 1 is accessing the D channel.

This monitoring unit 3 operates independently of the microprocessor 1a of the control unit 1, and is a circuit having a configuration that is simple and does not easily cause a malfunction due to noise so as to operate normally even if the microprocessor 1a malfunctions. Is. An example of this circuit is shown in FIG.

In FIG. 4, 3a is a monostable multivibrator, 3b is an OR gate, 3c is a counter, 3d is an inverter,
3e is a flip-flop.

In this circuit, monostable multivibrator 3a
Has a time constant of about 500 μSec, and is triggered by the D channel transmission information DTX, and the output Q becomes “H”.

The monostable multivibrator 3a is of a retrigger type, and the output Q remains "H" while the DTX continuously changes within 500 μSec.

The time constant of 500 μSec is 62.5 μSec per bit, and 500 μSec for 8 bits because DTX is transmitted at a speed of 16 KHZ.
Therefore, we are seeing the change within 8 bits of DTX.

When the output Q of the monostable multivibrator 3a becomes "H", the output of the OR gate 3b also becomes "H",
The clear terminal of the counter 3c becomes "H", and the counting of 16KHZ supplied as the clock is started.

Therefore, when the common signal control unit 1 starts access to the D channel, the counter 3c starts counting operation, and when the access ends, the counter 3c is cleared.

By the way, the signal information when accessing the D channel is
Assuming that the HDLC frame as shown in FIG. 2 is used and the maximum length of this frame is defined as 2048 bits in advance, the output Q ₁₂ of the counter 3c that counts this number of bits is 4096 bits in succession. Then, when the D channel is accessed, it becomes "H" and the flip-flop 3e
To set the output Q of the flip-flop 3e to "H".

For example, when the microprocessor 1a of the signal control unit 1, the data link controller 1d, and other peripheral circuits run away due to noise of the power supply or the like and an abnormal state occurs while transmitting the signal information DTX to the D channel, 4096 After the bit transmission, the output Q ₁₂ of the counter 3c becomes "H" and the output Q of the flip-flop 3e becomes "H".

The inverter 3c is used to count the counter 3c when the DTX is continuously "L" bits. This is because the vacancy of the D channel is detected by the E bit being continuously "H".

Therefore, when DTX is "L", the D channel is being accessed.

The output Q of the flip-flop 3e is supplied to the driver 5 as a driver enable (ENB) / disable (DIS) signal, and the driver 5 receives this signal as "L".
At the time of, the signal from the encoding unit 5 is driven to the transmission transformer 6 to be sent to the transmission line T line, and at the time of "H", the transmission output is set to the high impedance state to transmit the communication terminal. Has a role of disconnecting from the road.

Further, since the monitoring unit 3 supplies a reset signal to the control unit 1 at this time, the microprocessor 1a, the data link controller 1d, and other circuit elements in the control unit are initialized. Therefore, the microprocessor due to noise etc.
When the malfunction of 1a occurs, it automatically recovers to the initial state.

As described above, according to the bus interface circuit to which the present invention is applied, even if the access control circuit for the common signal channel malfunctions due to the noise of the power source or the like and the common signal channel is continuously accessed, the access control circuit can perform the predetermined operation. Since the initial state is automatically restored after a lapse of time, it is possible to suppress the influence on other communication terminals connected to the bus.

The present invention is not limited to the above embodiment.

In the above-described embodiment, when an abnormality is detected during access to the common signal channel, the driver is disabled and the control unit is initialized only. However, if the operation is not returned to normal even after repeating n times, the operation is forced. You may make it stop (driver disabled state) and perform maintenance inspection.

Further, in the above-mentioned embodiment, only the access abnormality of the common signal channel is detected, but regardless of the origination and the arrival, it is periodic, for example, once every several seconds to several tens of seconds.
By transmitting the signal information for notifying the terminal ready, it is possible to detect an abnormal situation in which the common signal channel is not continuously accessed for more than this time.

[Effects of the Invention] As described above, in the bus interface circuit of the present invention, when an abnormality is detected during access of a common signal channel, signal information control means in the bus interface circuit of the communication terminal which generates signal information. Since it is forcibly initialized to be restored to the initial state, it is automatically restored to the normal state unless an unrecoverable failure has occurred in the internal circuit element in the communication terminal.

Further, even if initialization is performed, if the abnormal state continues, access to the transmission path can be stopped, so that the influence on other normal communication terminals of the transmission path can be minimized.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration of an embodiment of the present invention, FIG. 2 is a diagram showing a frame configuration of a common signal channel in the apparatus of the embodiment, and FIG. 3 is a diagram showing signals on a transmission line in the embodiment. FIG. 4 is a circuit diagram showing a concrete configuration of the signal information monitoring unit in the same embodiment, and FIG. 1 ... Common signal control unit 1a ... Microprocessor 1b ... Operation for sending and receiving memory 1c ... Operation panel 1d ... Data link controller 2 ... Multiplexing unit 3 ... Signal information monitoring unit 4 ... Code Decoding unit 5 ... Driver 6 ... Transmission transformer 7 ... Receiving transformer 8 ... Receiver 9 ... Decoding unit 10 ... Separation unit 11 ... Clock extraction unit 12 ... D channel control unit

Claims (3)

[Claims] 1. A plurality of communication terminals are connected by a bus to a transmission line for multiplexing and transmitting an information channel for storing communication information to be communicated between the communication terminals and a common signal channel for storing call control information for outgoing and incoming calls. And a signal information control means for controlling transmission and reception of signal information of a predetermined format for controlling call originating and terminating calls by using the common signal channel in the bus interface circuit of each communication terminal of the established communication network, and this signal. Signal information monitoring means for monitoring the signal information sent from the information control means to the common signal channel to detect the occurrence of an abnormality, and the signal information sent to the common signal channel by the signal information monitoring means. When the occurrence of an abnormality is detected, the signal information control means in the bus interface circuit of the communication terminal is Bus interface circuit, characterized in braking manner that has been configured to be restored to the initial state. 2. When the abnormality is continuously detected even after the abnormality has occurred in the signal information sent from the signal information control means to the common signal channel and the signal information control means is initialized, the information is output. 2. The bus interface circuit according to claim 1, wherein the bus interface circuit is configured to interrupt transmission of signals of a channel and the common signal channel to a transmission path. 3. The bus interface circuit according to claim 1, wherein the abnormal signal information is a phenomenon in which the signal information is continuously sent to the common signal channel for a predetermined time or longer.