JPH0764876A - Fault detecting device between bus handler - Google Patents

Abstract

PURPOSE:To improve the using efficiency of a bus by interrupting data transfer to a function unit managed by an adjusting function unit at which a fault occurs. CONSTITUTION:This device is constituted of plural function units 18a-18n and 19a-19n which operate data transfer after obtaining the usage permission of buses 5 and 6, and plural adjusting function units 11 and 12 which permit bus usage. Each adjusting function unit 11 and 12 is equipped with an error communicating means 14 which communicates fault occurrence and recovery, status generating means 13 which cancels the bus usage permission and transmits error information at the time of data transfer to the function unit managed by the adjusting function unit at which the fault occurs, and transmits recovery information when the fault recovery is communicated, and start signal transmitting means 15 which instructs to fetch the error information and the recovery information. The plural function units 18a-18n and 19a-19n are respectively equipped with a storage means 16 which stores the error information and the recovery information, and a control means 17 which stops data transmission and interrupts the data transfer to the function unit managed by the adjusting function unit at which the fault occurs when the bus usage permission is canceled, and releases the interruption of the data transfer when the fault is recovered.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention comprises a plurality of functional units connected to a common bus, and a plurality of arbitration functional units for arbitrating a usage request sent by the functional unit for the common bus and issuing a usage permission. In particular, the control device configured to stop the use of the common bus by detecting a failure in the arbitration function unit and notifying the function unit that has acquired the right to use the common bus, thereby improving the use efficiency of the common bus. The invention relates to a fault detection device between bus handlers for improving the performance.

A plurality of functional units connected to a common bus;
A disk control device is an example of a control device including a plurality of arbitration function units. This disk controller sends a bus use request to an arbitration function unit called a bus handler, which is a function unit that sends data, and a bus use permission that the bus handler arbitrates and sends based on the priority given to each function unit. After that, the address of the functional unit of the data transfer destination and the data are sent to the common bus.

When the number of functional units increases, the physical capacity of the bus handler exceeds the limit. Therefore, a plurality of bus handlers are provided and are interconnected to arbitrate the bus use request. , When a functional unit under the control of one bus handler transfers data with a functional unit under the control of another bus handler, the efficiency of use of the common bus is improved when another bus handler fails. It is necessary to prevent it from decreasing.

In Japanese Patent Laid-Open No. 4-257957, an error processing method in bus switching control for switching control of a plurality of bus masters and a plurality of slaves with a plurality of buses based on access information is described. There is disclosed a configuration for preventing such access.

However, Japanese Patent Laid-Open No. 4-257957 describes a method of controlling data transfer by determining whether the functional unit on the data sending side determines the fault of the bus handler or the fault of the functional unit under the control of the bus handler. It has not been.

[0006]

2. Description of the Related Art FIG. 4 is a block diagram illustrating an example of a conventional technique, and FIG. 5 is a block diagram illustrating an example of a functional unit.

The plurality of functional units 1a to 1n are under the control of the bus handler 3, and the plurality of functional units 2a to 2n are under the control of the bus handler 4. And the functional units 1a to 1m
And the functional units 2a to 2m are channel adapters that control data transfer with the host device, and the functional units 1m to 1n and the functional units 2m to 2n are device adapters that control data transfer with the disk device. If so, the configuration is as shown in FIG.

In the case of a channel adapter, the processor 9 reads a program stored in the control memory 10 to operate, and receives a start I / O instruction from the channel via the interface circuit 7 and the channel. Data transfer and controlling the common bus control circuit 8
Data is transferred to and from other functional units via the common buses 5 and 6.

In the case of a device adapter, the processor 9 reads a program stored in the control memory 10 to operate, sends a command to the disk device via the interface circuit 7, and communicates with the disk device. In addition to data transfer, the common bus control circuit 8 is controlled to transfer data with other functional units via the common buses 5 and 6.

For example, when the functional unit 1a, which is a channel adapter, performs data transfer with the functional unit 1n, which is a device adapter, the functional unit 1a sends a bus request signal to the bus handler 3 via the dedicated signal line indicated by. And requests the use of the common bus 5.

When the common bus 5 is unused, the bus handler 3 sends a bus grant signal to the functional unit 1a via the dedicated signal line shown in to permit the use of the common bus 5. The functional unit 1a permitted to use the common bus 5 is
Each of the functional units 1a to 1n and 2a to 2n shown in FIG. 2 is sent a bus start signal to a shared signal line that connects the bus handlers 3 and 4 in common to notify that the contents of the common bus 5 are confirmed and used. The address and data of the functional unit 1n are transmitted to the bus 5.

The functional unit 1n takes in the data transmitted to the common bus 5 by the address transmitted by the functional unit 1a while the bus start signal input from the shared signal line continues.

When data is transferred between the functional units 2a and 2n, the functional unit 2a similarly sends a bus request signal to the bus handler 4 via a dedicated signal line and a bus grant signal via the dedicated signal line. When it receives, the bus start signal is transmitted via the shared signal line, and the address and data of the functional unit 2n are transmitted to the common bus 6 to execute the data transfer.

When the functional unit 1a transfers data to the functional unit 2n, the bus handler 3 sends a bus grant signal to the bus request signal of the functional unit 1a, but the data is sent to the bus handlers 3 and 4. It is sent out from the common bus 5 to the common bus 6 via the above and is transferred to the functional unit 2n.

Further, for example, the functional unit 1a and the functional unit 2a
When and send the bus request signals at the same time, the bus handlers 3 and 4 cooperate to arbitrate.
When the priority of the side is low, the bus handler 4 is the functional unit 2a.
No bus grant signal is sent in response to the bus request signal.

[0016]

SUMMARY OF THE INVENTION Bus handlers 3 and 4
When one of the bus handlers sends out a bus grant signal, each of them opens the bus gate so as to communicate with each other and connect the common buses 5 and 6. Therefore, when data is transferred via the common buses 5 and 6, that is, the functional unit 1
When a transfers data with the functional unit 2n, the data is transferred through the bus gates of the bus handlers 3 and 4.

Therefore, for example, when the bus handler 4 fails and the bus gate cannot be opened, the address and data sent to the common bus 5 do not reach the functional unit 2n. No response can be obtained from the functional unit 2n. Therefore, until it times out,
Perform processing such as repeated access.

During this period, the bus start signal is still being sent to the shared signal line, so that the other functional units recognize that the common buses 5 and 6 are in use. Therefore, the common buses 5 and 6 are occupied for a long time, and the functional units 1b-1
n and 2a to 2n cannot use the common bus 5 or the common bus 6, and there is a problem that the usage efficiency of the common buses 5 and 6 is reduced.

In view of the above problems, the present invention is applied when data is transferred through the bus gates of the bus handlers 3 and 4 when the bus handlers 3 and 4 recognize each other's failure. Aims to improve the usage efficiency of the common bus by promptly canceling the bus grant signal.

[0020]

FIG. 1 is a block diagram for explaining the principle of the present invention. The control units are common buses 5 and 6
Connected to each other, mutually transmitting the use request of the common buses 5 and 6, and after obtaining the permission to use the common buses 5 and 6, the address and data of the desired partner functional unit are transmitted and the data transfer is performed. A plurality of functional units 18a-18n and 19a-19n,
The plurality of functional units 18a to 18n and 19a to 19n are placed under control, and the plurality of functional units 18a to 18n and 19a to 19n are placed.
To the use requests of the common buses 5 and 6 respectively sent by
A plurality of arbitration functional units 1 that interconnect with each other and arbitrate requests for use of the common buses 5 and 6 in accordance with a predetermined priority, and issue permission to use the common buses 5 and 6 based on the arbitration result.
It is composed of 1 and 12.

Then, the plurality of arbitration functional units 11 and 12 are provided with an error notifying means 14 for mutually notifying the occurrence and recovery of a failure, and when the error notifying means 14 notifies the occurrence of a failure, the common bus 5 is used. Based on the address of the partner functional unit sent by the functional unit that permits the use of
When it is detected that the arbitration functional unit in which a failure has occurred is a data transfer for a functional unit under management, the common bus use permission for the functional unit that has been granted the common bus use is canceled, error information is sent, and an error occurs. Notification means 1
Status generation means 13 for transmitting failure recovery information when 4 notifies failure recovery, and this status generation means 13
Start signal sending means 15 for sending a start signal for instructing the acquisition of error information and failure recovery information sent by
And, respectively.

The plurality of functional units 18a-18n and 19 are also provided.
The status generating means 13 is supplied to the a to 19n by the start signal transmitted by the start signal transmitting means 15.
The storage means 16 for capturing and storing the error information and the failure recovery information transmitted by the storage means, and when the common bus use permission is canceled, the data transmission is stopped, and based on the error information stored by the storage means 16, When data transfer to a functional unit under the control of the faulty arbitration functional unit is blocked and the storage unit 16 stores the fault recovery information, the function unit under the control of the faulty arbitration functional unit is stored. Control means 1 for releasing blocking of data transfer
7 and 7, respectively.

By doing so, the data transfer to the functional unit under the control of the arbitration functional unit in which the failure has occurred is not restarted until the failure is recovered.

[0024]

With the above arrangement, the arbitration functional unit in which a failure has occurred can quickly stop the data transmission to the functional unit under the control of the arbitration functional unit, and the functional unit transmitting the data can be the partner function. Since the access processing is not restarted by recognizing that the arbitration function unit under control of the unit is a failure, the common buses 5 and 6 are prevented from being occupied for a long time.

Therefore, the usage efficiency of the common buses 5 and 6 can be improved.

[0026]

2 is a block diagram of a circuit showing an embodiment of the present invention, and FIG. 3 is a time chart for explaining the operation of FIG.

The bus handlers 20 and 21 shown in FIG. 2 have the same structure, and the detailed contents of the bus handler 21 are omitted. The functional units 18n and the functional units 19a and 19n have the same configuration as the functional unit 18a, and detailed description thereof is omitted.

The processor 9 of the functional unit 18a controls the common bus control circuit 8 to send the common bus 5 and 6 to the bus handler 20 via a signal line (not shown) as described with reference to FIG.
The bus request signal for requesting the use of is transmitted in synchronization with the clock, for example, for two cycles, as shown in the request of FIG.

When the common buses 5 and 6 are unused, the bus handler 20 grants a bus grant signal, which permits the use of the common buses 5 and 6 with a delay of one clock cycle, as shown in the grant of FIG. The signal is sent from the signal sending circuit 25 to the functional unit 18a via the signal line.

Upon receipt of the bus grant signal, the processor 9 of the functional unit 18a sends a bus start signal for notifying the contents of the common bus 5 via the signal line as shown in start (1) of FIG. And then bus handler 2
0 is notified of the use of the common bus 5, and as shown in the data bus of FIG. 3, when the address ID of the partner function unit for which data transfer is desired is sent to the common bus 5, the data is subsequently sent.

The register 22 of the bus handler 20 is shown in FIG.
As indicated by the ID of the register 22 of FIG. 1, the address of the partner function unit sent by the function unit 18a is stored, and the address decoding circuit 23 decodes the address stored by the register 22 and sends it to the status generation circuit 24.

Error notification circuit 28 of bus handler 21
Monitors the occurrence of a failure in the bus handler 21, and when a failure occurs, sends an error signal notifying the error occurrence to the status generation circuit 24 as indicated by the error in FIG.

While the error signal is being received, the status generation circuit 24 determines that the address decoded by the address decoding circuit 23 indicates the addresses of the functional units 19a to 19n under the control of the bus handler 21. The usage permission signal sending circuit 25 is instructed to stop the bus grant signal sent to the functional unit 18a after, for example, 6 clock cycles as shown in the grant of FIG.

The processor 9 of the functional unit 18a having the bus grant signal canceled cancels the transmission of the bus start signal as shown in the start (1) of FIG. 3 and, as shown in the data bus of FIG. Stop sending.

The start signal sending circuit 27 of the bus handler 20 sends a bus start signal to the signal line according to an instruction from the status generating circuit 24, as shown in the start (2) of FIG. As shown in the data bus of No. 3, in synchronization with the bus start signal shown in the start (2) of FIG. 3, while this bus start signal continues,
The error status signal is sent to the common bus 5.

The register 29 provided in the common bus control circuit 8 of the functional unit 18a reads and stores the error status signal sent to the common bus 5 as shown in the error status of the register 29 in FIG. This register 29
The processor 9 that has read the error status stored by
Is a functional unit 19a under the control of the bus handler 21 thereafter.
It is determined that the data transfer to 19n is impossible, and the access process is not executed.

When the error notification circuit 28 recovers from the fault in the bus handler 21, as shown in the error in FIG. 3, it stops sending the error signal sent to the status generating circuit 24, so that the status generating circuit 24 starts. The signal sending circuit 27 is instructed to send the start signal again as shown in the start (2) of FIG. 3, and the error reset status signal is sent to the common bus 5 as shown in the error reset status of the data bus of FIG. Send out.

When the register 29 fetches and stores this error reset status signal as shown in the error reset status of the register 29 of FIG. 3, the processor 9 of the functional unit 18a recognizes that the error is released, and the bus handler Functional units 19a to 1 under 21
The access processing for 9n is started and the stored contents of the register 29 are erased.

The operation of the remaining functional units 18b-18n is the same as above. The error notification circuit 26 of the bus handler 20 monitors the occurrence of a fault in the bus handler 20, and when a fault occurs in the bus handler 20, the bus handler 21
The status generation circuit (not shown) is notified, and when the failure of the bus handler 20 is recovered, the failure recovery is notified.

In this case, the operation of the functional units 19a to 19n is the same as that of the functional units 18a to 18n.

[0041]

As described above, according to the present invention, it is possible to quickly stop the data transmission to the functional unit under the control of the faulty bus handler, and the functional unit transmitting the data is Since the access handler is not restarted by recognizing that the bus handler that manages the functional unit has a failure, the common buses 5 and 6 are prevented from being occupied for a long time.

Therefore, the usage efficiency of the common buses 5 and 6 can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating the principle of the present invention.

FIG. 2 is a block diagram of a circuit showing an embodiment of the present invention.

FIG. 3 is a time chart explaining the operation of FIG.

FIG. 4 is a block diagram illustrating an example of a conventional technique.

FIG. 5 is a block diagram illustrating an example of functional units.

[Explanation of symbols]

1a to 1n, 2a to 2n, 18a to 18n, 19a to 19n Functional unit 3, 4, 20, 21 Bus handler 5, 6 Common bus 7 Interface circuit 8 Common bus control circuit 9 Processor 10 Control memory 11, 12 Arbitration functional unit 13 Status generation means 14 Error notification means 15 Start signal transmission means 16 Storage means 17 Control means 22, 29 Register 23 Address decoding circuit 24 Status generation circuit 25 Bus use permission signal transmission circuit 26, 28 Error notification circuit 27 Start signal transmission circuit

Front Page Continuation (72) Inventor Kiyotaka Tomihari 2-4-19 Shin-Yokohama, Kohoku Ward, Yokohama City, Kanagawa Prefecture Fujitsu Program Giken Co., Ltd.

Claims (2)

[Claims] 1. Connected to a common bus (5) (6), mutually transmitting a use request of the common bus (5) (6), and obtaining a use permission of the common bus (5) (6) Send the address and data of the desired partner functional unit from the desired functional unit (18a
~ 18n) (19a to 19n) and the plurality of functional units (18a to 18n) (19a
~ 19n) under the control of the plurality of functional units (18a ~ 18n) (1
9a to 19n) to the use request of the common bus (5) (6) respectively sent, according to a predetermined priority order, arbitrate the use request of the common bus (5) (6), A control device comprising a plurality of arbitration function units (11) and (12) for issuing permission to use the common bus (5) (6) based on the arbitration result, wherein the plurality of arbitration function units (11) ( In (12), the error notification means (14) for mutually notifying the occurrence of a failure, and when the error notification means (14) notifies the occurrence of a failure, use of the common bus (5) (6) is permitted. When it is detected that the arbitration functional unit in which a failure has occurred is data transfer for the functional unit under management, based on the address of the partner functional unit sent by the functional unit, the above-mentioned for the functional unit that is permitted to use the common bus is detected. Status generation means (13) for canceling the permission to use the common bus and the status generation means (13) for sending And a start signal transmitting means (15) for transmitting a start signal for instructing the acquisition of the error information, and the start signal transmitting means (15) for the plurality of functional units (18a to 18n) (19a to 19n). By a start signal sent by the status generation means (13), the storage means (16) for fetching and storing the error information sent by the status generation means (13), and when the common bus use permission is canceled, the data sending is stopped and Based on the error information stored in the storage means (16), a control means (17) for blocking data transfer to the functional unit under the control of the arbitration functional unit in which the failure has occurred is provided, and the arbitration functional unit in which the failure has occurred A device for detecting a failure between bus handlers, which blocks data transfer to a functional unit under control by the. 2. Connected to the common bus (5) (6), mutually transmitting the use request of the common bus (5) (6), and obtaining the use permission of the common bus (5) (6). Send the address and data of the desired partner functional unit from the desired functional unit (18a
~ 18n) (19a to 19n) and the plurality of functional units (18a to 18n) (19a
~ 19n) under the control of the plurality of functional units (18a ~ 18n) (1
9a to 19n) to the use request of the common bus (5) (6) respectively sent, according to a predetermined priority order, arbitrate the use request of the common bus (5) (6), A control device comprising a plurality of arbitration function units (11) and (12) for issuing permission to use the common bus (5) (6) based on the arbitration result, wherein the plurality of arbitration function units (11) ( In (12), the error notification means (14) for mutually notifying the occurrence and recovery of the failure, and the use of the common bus (5) (6) when the error notification means (14) notifies the failure occurrence When it is detected that the arbitration functional unit in which the failure has occurred is data transfer to the functional unit under management, based on the address of the partner functional unit sent by the authorized functional unit, the functional unit that has permitted the use of the common bus Withdrawing the common bus use permission for
When error information is sent and the error notifying means (14) notifies failure recovery, status generation means (13) for sending failure recovery information, and error information and failure recovery sent by the status generation means (13) Each of the plurality of functional units (18a to 18n) (19a to 19n) is provided with a start signal transmitting means (15). Storage means (16) for capturing and storing error information and failure recovery information transmitted by the status generation means (13) in response to a start signal transmitted
And when the common bus use permission is revoked, the data transmission is stopped, and the data for the functional unit under the control of the faulty arbitration functional unit is based on the error information stored in the storage means (16). The transfer means is blocked, and the storage means (16)
When the failure recovery information is stored in the device, a control means (17) for canceling the blocking of data transfer to the functional unit under the control of the arbitration functional unit in which the failure occurs is provided, and the arbitration functional unit in which the failure occurs is A failure detection device between bus handlers, wherein data transfer to a functional unit under management is not restarted until the failure is recovered.