JPH0759077A - Picture processing unit for television system - Google Patents

Abstract

PURPOSE:To rewrite a parameter with a simple circuit even when a processing speed gets a high speed by providing a storage means of setting arithmetic operation result to write a value to a RAM and a means writing a value read from the storage means to the RAM. CONSTITUTION:When a value of an arithmetic operation result corresponding to an optimum parameter is set to a RAM 4 or the setting value is revised, it is executed by using a switching signal from a control section. Since bus selectors 5, 6 select an address decode signal from the control section, the signal is received by the RAM 4 through the selectors 5,6. In this case, the RAM 4 is set to the write enable state. Moreover, the address decode signal generated from the control section is inputted to a ROM 3, which is set to the read enable state. The ROM 3 and the RAM 4 send/receive data synchronously with each other between relevant storage areas. Thus, a recursive filter in which the parameter is rewritten with a simple circuit is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television system, and more particularly to an image processing apparatus used in an X-ray television system.

[0002]

2. Description of the Related Art Conventionally, in an X-ray television system,
In order to reduce noise from the X-ray apparatus called quantum noise, a circuit called a recursible filter shown in FIG. 2 is used to perform digital calculation. this is,
A signal that is k times the output signal x ′ (t) of the video camera (not shown) converted into a digital signal using k as a parameter and the signal x (t−1) one frame before stored in the frame memory 2. The noise components randomly generated are canceled by adding the signals of (1-k) times of the above, and as a result, the noise components are reduced in the output signal x (t). Here, the parameter k is 0 ≦ k ≦ 1. (Refer to the following formula (1). T is a time in which one frame time is a unit) x (t) = k · x ′ (t) + (1−k) · x (t−1) (1 )

For example, if k = 1/2, it is necessary to perform a process of halving both of the above signals and adding them within one frame time. Horizontal frequency is 15.734 kHz, analog / digital (A / D) conversion sampling frequency is 1
If it is 4.3 MHz, the above calculation is performed within about 70 ns per pixel. The higher the horizontal frequency and the sampling frequency, the faster the processing speed.

In order to cope with this increase in processing speed, a ROM (read only memory) is used as a conversion table as a means for performing the operation of the above equation (1),
A recursible filter that inputs the above two signals as an address / decode signal and outputs the calculation result of the corresponding equation (1) stored in the ROM is conventionally used, but the value stored in the ROM is It is only the value corresponding to the parameter k fixed to several types.

[0005]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
As the processing speed increases, there is a drawback that the circuit becomes complicated or an expensive LSI is used. Further, in the recursive filter that outputs the calculation result from the ROM, the value stored in the ROM is only the value corresponding to the parameter k fixed to several types, and the value cannot be easily changed. In some cases, the optimum calculation cannot be performed on the signal inside.

The present invention eliminates these drawbacks, does not use an expensive LSI, has a simple circuit configuration, can cope with high-speed arithmetic processing, and can easily change to a value corresponding to a parameter k for performing optimum arithmetic. An object is to realize a possible image processing device for a television system.

[0007]

In order to achieve the above object, the present invention uses a RAM (random access memory) as a storage device for the operation of a recursive filter,
A storage means for setting a calculation result is provided separately from the calculation storage device, and a signal input as an address / decode signal is multiplied by a predetermined parameter and the results are added to obtain a plurality of calculation results in advance. The parameters are stored in the storage device, and the value of the operation result corresponding to the optimum parameter read from the storage means is stored in the RAM.
By replacing the ROM with an inexpensive RAM having a high delay speed, the value of the operation result by the parameter corresponding to the optimum operation process is stored in the RAM.

The storage means for setting the calculation result is R
It may be OM. Further, the storage means may be provided outside the image processing device for the television system.

[0009]

As a result, as a recursive filter, R
The processing speed can be increased by simply replacing the OM with an inexpensive RAM having a high delay speed. Also, R
Since the AM is rewritable, if the value is rewritten according to the optimum calculation processing, the calculation corresponding to the optimum parameter can be performed and the quantum noise can be further reduced.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, 1 is an A / D converter, 2
Is a frame memory and 4 is a RAM. In RAM4,
At the time of the initial operation of the apparatus, the value of the calculation result corresponding to the optimum parameter k is transferred in advance from the storage means 3 (ROM or the like) for setting the calculation result.

The A / D converter 1 A / D converts the video signal from the video camera 8, and its output is passed through the bus selector 5 and input to the RAM 4 as an address / decode signal during normal operation. The output of the frame memory 2 is
The signal is output to the subsequent stage, and also, through the bus selector 6, is input to the RAM 4 as an address / decode signal during normal operation.

During normal operation, the RAM 4 is in a read state, for example, the optimum parameter value set in the RAM 4 is k = 1/2, and at this time, A is supplied to the RAM 4 via the bus selector 5 as an address / decode signal. The output value of the / D converter 1 is 40H (8-bit data in hexadecimal notation. The same applies below), and RA via the bus selector 6 as well.
Assuming that the output value of the frame memory 2 supplied to M4 as an address / decode signal is 80H, 1 / 2.40H + (1-1 / 2) .80H = 60H (2 Since 60H is stored in the storage area (for example, 4080H address) of the RAM 4 which is address-decoded by the above 40H and 80H, the output of the RAM 4 becomes 60H according to the calculation result, and the recursible The operation as a filter can be satisfied. This operation is repeated for all pixels in one frame.

Here, when setting or changing the value of the calculation result corresponding to the optimum parameter in the RAM 4, the bus selectors 5 and 6 are switched by a switching signal from a control unit (not shown). Similarly, since the address / decode signals generated from the control unit and input to the bus selectors 5 and 6 are selected, those signals are input to the RAM 4 through the bus selectors 5 and 6. At this time, the RAM 4 is in a writable state. Further, the address decode signal generated from the control unit is input to the ROM3, and the ROM3
Is ready for reading.

The ROM 3 and the RAM 4 synchronously transfer data between the corresponding storage areas (addresses) at this time. The data transferred from the ROM 3 to the RAM 4 is a value corresponding to a predetermined parameter k, for example, k = 1/2,
If the output of the bus selector 5 is 40H and the output of the bus selector 6 is 80H, the address
For example, the value 60H calculated by the above equation (2) is transferred and written in the decoded storage area (for example, address 4080H). The same operation as described above is repeated for a predetermined storage area, for example, an area corresponding to all pixels in one frame. By the above-described operation result setting operation, a predetermined operation result value is written in the RAM 4.

The above-mentioned operation of setting the calculation result can be executed at any time when it is desired to change the parameters for optimum calculation.

[0016]

As described above, according to the present invention,
Even if the processing speed becomes high, it is possible to provide a recursive filter in which parameters can be rewritten with a simple circuit without using an expensive LSI.

[Brief description of drawings]

FIG. 1 is a block diagram showing the overall configuration of the present invention.

FIG. 2 is a principle diagram of a recursive filter.

[Explanation of symbols]

 1 A / D converter 2 Frame memory 3 ROM 4 RAM 5, 6 Bus selector 8 Video camera

Claims (1)

[Claims] 1. A storage device is provided which has a frame memory for storing a digital signal, and which performs a calculation of the digital signal and a signal of one frame before stored in the frame memory in a preceding stage of the frame memory. When the above two signals are input to the memory device as address / decode signals, the signals are multiplied by predetermined parameters and the results are added, and the operation result is stored in the memory device in advance. In addition, in the image processing device for a television system that updates the contents of the frame memory for each frame by outputting the value as the calculation result, the storage device is a RAM (random access memory). , The R
An image processing apparatus for a television system, comprising: storage means for setting a calculation result for writing the value in the AM; and means for writing the value read from the storage means in the RAM.