JPH0756534A - Liquid crystal driving circuit and liquid crystal driving method - Google Patents

Abstract

PURPOSE:To make gradation display posible by an active address system at a simple matrix type liquid crystal display panel. CONSTITUTION:This is a liquid crystal driving circuit for driving a simple matrix type liquid crystal display panel 10 having an (x) number of scanning electrodes and a (y) number of signal electrodes provided with a scanning electrode driving circuit 17 for dividing the scanning electrodes into (m) set(pXm=x) at every adjacent (p) numbers, simultaneously selecting the (p) number of the scanning electrodes at the scanning timing of the scanning electrodes within the same set, impressing voltages of different waveforms at every scanning electrodes and driving them, a gradation signal generation circuit 14 for carrying out a gradation operation corresponding to the driving content of the scanning electrode driving circuit 17 and the gradation of a display signal and calculating the garadation driving signal of the (y) number of signal electrodes and a signal electrode driving circuit 18 for driving the (y) number of the signal electrodes in accordance with the gradation driving signal calculated by the gradation signal generation circuit 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving circuit and a liquid crystal driving particularly applied to a simple matrix type liquid crystal display panel.

[0002]

2. Description of the Related Art A simple matrix type liquid crystal display panel has a very simple structure in which a liquid crystal is sandwiched between two pieces of glass each having a scanning electrode and a signal electrode formed thereon.
Compared with an active matrix type liquid crystal display panel in which a non-linear element such as a TFT (thin film transistor) is used inside the panel, there is an advantage that the price can be significantly reduced.

FIG. 6 shows a drive waveform for general gradation display. This figure illustrates scan signals to x scan electrodes C1 to Cx and gradation signals to one signal electrode S1 among a large number of signal electrodes corresponding to the scan signals.
Cx is obtained by dividing one frame into x equal parts, and each of FIGS.
As shown in FIG. 6C, selection drive is performed sequentially for each 1 / x frame. On the other hand, the gradation signal .alpha. As shown in FIG. 6D is applied to the signal electrode S1 for the scanning electrode C1, for example. As a result, the scan electrode C1 and the signal electrode S1
In the pixel where and intersect, display driving is performed with a gradation corresponding to the ON / OFF ratio of the gradation signal α.

When the above driving method is adopted, particularly in a simple matrix type liquid crystal display panel, the selection driving time per one scanning electrode decreases as the number of scanning electrodes increases, and the non-selection period is reduced. Since it spreads, the contrast is lowered and the display quality is significantly lowered.

In consideration of this point, as shown in FIG. 7, there is a method of distributing the scanning electrode selection periods within one frame.
7 (a) to 7 (c), a plurality of, for example, two adjacent scan electrodes C1 and C2 are selectively driven simultaneously, and correspondingly, the signal electrode S1 also produces gray scales for the scan electrodes C1 and C2. It shows a basic waveform for applying the signal β. That is, by distributing this selection period within one frame,
Scanning electrode C1 having a waveform as shown in FIGS.
′, C2 ′ and the signal electrode S1 ′ are driven. By thus distributing the selection periods within one frame, the non-selected periods can be shortened and the display quality can be improved. Then, in the method of distributing the selection period within one frame as described above, when the gradation display is performed, the frame thinning method or the dither method is used.

The frame thinning method is a technique for displaying gradation by using a binary level driver, and is for displaying intermediate gradation by turning on / off the display for each frame. In the dither method, a plurality of pixels are set as one unit, and the number of lighting pixels in the unit is controlled to perform gradation display.

[0007]

In the frame thinning method described above, the flicker phenomenon is likely to occur because the frequency of the luminance change is lowered to the position corresponding to the number of frame frequencies as the number of gradations is increased. There is a problem that it is difficult to get.

Further, the dither method has a drawback that the resolution is lowered because a plurality of pixels are used as one unit, and even if the liquid crystal display panel has high definition, it cannot be utilized.

Further, recently, x scan electrodes are divided into m sets (p × m = x) for every adjacent p lines, and the p scan electrodes are scanned at the scanning timing of the scan electrodes in the same set. A driving method called a so-called "active address method" in which voltages are selected at the same time and a voltage having a different waveform is applied to each scanning electrode for driving is considered. This drive system is expected to establish technology in the future as a drive system capable of obtaining high contrast even in a simple matrix type liquid crystal display panel.

However, in this active address method, a technique for gradation display which is completed within a frame has not yet been developed, and there is no choice but to apply the frame thinning method or the dither method having the above problems. , Display quality is insufficient.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a gray scale display completed in a frame by an active address system for a simple matrix type liquid crystal display panel. An object of the present invention is to provide a possible liquid crystal driving circuit and a liquid crystal driving method.

[0012]

That is, the present invention is a liquid crystal drive circuit for driving a simple matrix type liquid crystal display panel having x scan electrodes and y signal electrodes, wherein the scan electrodes are adjacent to each other. M sets for every p lines (p × m =
x), and at the scanning timing of the scanning electrodes in the same set, the p scanning electrodes are simultaneously selected, and a scanning electrode driving circuit that drives by applying a voltage having a different waveform to each scanning electrode; A gradation signal generating circuit that executes a gradation calculation corresponding to the driving content of the electrode driving circuit and the gradation of the display signal to calculate the gradation driving signal of the y signal electrodes, and the gradation signal generating circuit. And a signal electrode drive circuit for driving the y number of signal electrodes in accordance with the gradation drive signal calculated in.

[0013]

According to the above-mentioned structure, even when the display drive by the active address system is performed for the simple matrix type liquid crystal display panel, gradation display is possible and the display quality is sufficiently high. Can be one.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a circuit configuration according to an embodiment of the present invention. In the figure, 10 is a simple matrix type liquid crystal display panel to be driven, and this liquid crystal display panel 10 is y
It is assumed that there are two signal electrodes and x scanning electrodes.
However, the scanning electrodes of the liquid crystal display panel 10 are divided into m groups (4 × m = x) for every plurality of adjacent scanning electrodes, for example, four scanning electrodes. The scanning voltage is applied to the scanning electrodes of the book by simultaneous selection, and the scanning electrodes are continuously driven.

Reference numeral 11 in the drawing denotes a computer unit for generating 10 gradations and 4-bit display data D1 for each display pixel by calculation. The display data D generated by this computer unit 11 is shown.
1 is sent to the memory 12. The memory 12 sequentially stores the display data D1 from the computer unit 11, and in accordance with the clock φs sent from the timing signal generation circuit 13, the memory 12 uses the same signal electrodes corresponding to the plurality of adjacent scanning electrodes, for example, four scanning electrodes. Display data DM1Y to DM4Y (where M is the scan electrode group number (M = 1 to m) of the liquid crystal display panel 10, and Y is the signal electrode number (Y = 1 to y) of the liquid crystal display panel 10)
To the gradation signal generating circuit 14.

The timing signal generation circuit 13 supplies various operation clocks and control signals to other circuits as timing signals and executes timing control. In addition to sending the clock φs to the memory 12, The same clock .phi.s and the clock .phi.c as the gradation control signal are supplied to the gradation signal generating circuit 14, and the clock .phi.F and the clocks .phi.1 and .phi.2.
To the shift circuit 16 with selection control signals SS1 and SS2,
Clocks φF, φ1 and φ2 are supplied to the scan electrode driving circuit 17,
Then, clocks φF, φL, φ1 to the signal electrode drive circuit 18
And φ 2 are sent respectively.

The selection signal generating circuit 15 uses clocks φ F and φ
In synchronism with 1 and φ 2, one set of selection signals A to D having different signal waveforms corresponding to four scanning electrodes are sent to the shift circuit 16 while appropriately inverting the contents.

The shift circuit 16 is a timing signal generation circuit.
The selection signals A to D are appropriately cyclically shifted by the selection control signals SS1 and SS2 from 13 into the selection signals C1 to C4, and the selection signals C1 to C4 are used for the scanning electrode drive circuit 17 described above.
At the same time, one of the selection signals C1 to C4 is sequentially switched and selected to the matrix operation circuit 14 and transmitted as a signal of 4 bits each.

The scanning electrode drive circuit 17 is supplied with a waveform corresponding to the selection signals C1 to C4 sent from the shift circuit 16 by the clocks φF, φ1 and φ2 from the timing signal generation circuit 13 and a voltage generation circuit 19. The x scan electrodes of the liquid crystal display panel 10 are driven at the peak values corresponding to the three-valued applied voltages (V0, 0, -V0).

At this time, as described above, the scan electrode driving circuit 17
Divides x scan electrodes into m groups of 4 and divides them into C11 to C11.
, C21 to C24, ..., Cm1 to Cm4, and within the same set, for example, at the scanning timing of four scanning electrodes C11 to C14, these scanning electrodes C11 to C14 are simultaneously selected and driven by applying a scanning voltage.

On the other hand, the gradation signal generating circuit 14 is a memory
A gradation operation described later is performed by the display data DM1Y to DM4Y read from 12 and the selection signals C1 to C4 from the shift circuit 16, and 7 bits (3 bit data representing 5 voltage values and 10 A display signal SML (p) having a sum of 4-bit data representing a time width corresponding to gradation is sent to the signal electrode drive circuit 18.

The signal electrode drive circuit 18 is supplied from the voltage generation circuit 19 corresponding to the display signal SML (p) sent from the matrix operation circuit 14 by the clocks φF, φL, φ1 and φ2 from the timing signal generation circuit 13. The five applied voltages are selected, and the y scan electrodes S1 to Sy of the liquid crystal display panel 10 are driven in accordance with the time width designated by gradation.

Before explaining the operation of the above embodiment, the basic concept of the gradation calculation by the gradation signal generating circuit 14 will be described with reference to FIGS. 2 and 3. Figure 2
Shows a signal waveform when two scan electrodes C1 and C2 are simultaneously selected and driven, and the corresponding signal electrode S1 at this time is driven by display data representing gradation.

FIG. 2 (a) shows the scanning electrode C1 in FIG. 2 (b).
Shows a signal waveform of the scan electrode C2. The two scan electrodes C1 and C2 are simultaneously inverted for each frame for a period of 2 / x (x is the total number of scan electrodes) in one frame. It is selectively driven.

The drive waveform of the scan electrode C1 and the drive waveform of the scan electrode C2 at the time of simultaneous selection are set so as to be different from each other in advance. Here, for example, the scan electrode C1 is "1, 1" in one frame, The scanning electrode C2 is assumed to be "1, -1".

Therefore, these two scan electrodes C1,
In the case where the display pixel at the position where C2 and the signal electrode S1 cross each other is to be displayed in two gradations, it is assumed that the display pixel is completely turned off by "0" gradation and that turned on by "1" gradation. , The signal waveform to the signal electrode S1 is shown in FIGS.
It becomes either of (f).

That is, the signal S11 in FIG. 2 (c) is a signal when the pixel corresponding to both scan electrodes C1 and C2 has a "1" gradation, and the signal S12 in FIG. 2 (d) is only for the pixel on the scan electrode C1 side. Is a "1" gradation and the pixel on the scan electrode C2 side has a "0" gradation, the signal S13 in FIG.
A signal in the case where only the pixel on the side of "1" has a gradation and the pixel on the side of the scan electrode C1 has a gradation of "0", and the signal S of FIG.
Reference numeral 14 is a signal when the pixel corresponding to both the scan electrodes C1 and C2 has the "0" gradation. These signals S11 to S14 are not actually applied to the signal electrode S1, but are for showing the basic concept thereof.

Here, the intermediate gradation between the "0" gradation and the "1" gradation is represented by "0.1" unit. Figure 2
(G) is a display pixel at a position where the signal electrode S1 and the scan electrode C1 intersect, and has a "0.2" gradation, and a display pixel at a position where the scan electrode C2 also intersects has a "0.7" gradation. The waveform to the signal electrode S1 in the case of performing is shown.

In this case, the rate at which both the pixel on the scan electrode C1 side and the pixel on the scan electrode C2 side are turned on is the smaller gradation number "0.2", so that the signals S11 to "0.
Only the ratio of 2 ”is taken as t1. In this case, the ratio of t is such that 1 / x frame is "1".

The pixel on the scan electrode C2 side is the scan electrode C.
Compared to the pixel on the 1st side, the amount of gradation is "0.5" (= 0.7-0.
2), the ratio is large, so that from the signal S13, “0.
Take only the ratio of "5" as t2.

Then, in order to match the effective value of the liquid crystal display panel which is driven by the effective value, the ratio of turning off both the pixel on the scanning electrode C1 side and the pixel on the scanning electrode C2 side is "0.3 (=
1-0.7) ", the signal S14 to" 0.
Only the ratio of "3" is taken as t3.

As described above, by dividing the drive waveform to the signal electrode S1 according to the gradation level to be displayed and rearranging it, gradation display completed within one frame can be performed in dot units. Become. Such a gradation signal is generated by the gradation signal generating circuit 14, and based on this, the signal electrode drive circuit 18 causes the signal electrode S1 of the liquid crystal display panel 10 to be generated.
~ Sy is driven.

As described above, the two scan electrodes C1,
In the case of simultaneous selective driving with C2 as a set, as described with reference to FIG. 7, it is possible to improve the display quality of the liquid crystal display panel 10 by dispersing the selection period within one frame. That is, FIG. 3 shows the scan electrode C1 and the signal electrode S.
Fig. 3 shows the signal waveform applied between 1 and
In FIG. 2A, as shown in FIG. 2, the scanning electrodes C1 and C2 are continuously selectively driven in one frame over 2 / x frames.

On the other hand, as shown in FIG.
It is possible to improve the display quality because the apparent frame frequency in the simple matrix type liquid crystal display panel can be increased by selectively driving the 1 / x frame twice in the 1/2 frame.

Next, the operation corresponding to the circuit configuration of FIG. 1 will be described. In the circuit configuration of FIG. 1, the x scanning electrodes of the liquid crystal display panel 10 are divided into m groups (4 × m = x) for every four adjacent cells, and the scanning of the four scanning electrodes in the same group is performed. The four scanning electrodes are simultaneously selected and driven at the timing.

Now, an arbitrary set of four scan electrodes CM1 to CM1
M4 (M = 1 to m), and the number of gradations of each display data DM1Y to DM4Y in the pixel at the position where these scan electrodes CM1 to CM4 and any signal electrode SY (Y = 1 to y) intersect is dM1Y. ~
It is dM4Y.

Further, 0 ≦ dM1Y to dM4Y ≦ 1, and d
DM1Y to DM4 when M1Y to dM4Y are all "0" gradation
Y is all -1, and dM1Y to dM4Y are all 1 when all dM1Y to dM4Y are "1" gradations.

When a waveform as shown in FIG. 4 is applied to the scan electrodes CM1 to CM4, a gradation signal generating circuit 14 for displaying two gradations with only "0" gradation or "1" gradation is provided.
From the signal electrode drive circuit 18 to the signal electrode signal SML
(p) is

[0039]

[Equation 1] Since the drive waveforms of the scan electrodes CM1 to CM4 are as shown in FIG. 4, the equation (1) is

[0040]

[Equation 2] Becomes Now, 1 ≧ dM1Y ＞ dM2Y ＞ dM3Y ＞ dM4Y ≧
When 0, assuming that the time length of 1 / x frame is 1, the drive signal to the signal electrode SML is

[0041]

[Equation 3] Has a waveform. When the lengths of the above signals are added, the result is "1".

FIG. 5 exemplifies such a drive signal of the signal electrode signal SML. As shown in FIG. 5A, the signal electrode signal SML is composed of SMY (1) to SMY (4). SMY
The lengths of SMY (p) a to SMY (p) e in (1) to SMY (4) are as shown in the above equation (3) as shown in FIG. 5 (2). However, the voltage level applied to the signal electrodes of the liquid crystal display panel 10 as a whole by integrating SMY (1) to SMY (4) is

[0043]

[Equation 4] It is expressed in the form of.

As described above, by dividing the drive waveform to the signal electrode according to the gradation level to be displayed and rearranging it, it becomes possible to perform gradation display completed in one frame in dot units. . Such a gradation signal SMY
(p) is generated by the gradation signal generating circuit 14 and the signal electrode driving circuit 18 drives the signal electrodes S1 to Sy of the liquid crystal display panel 10 based on the generated signal.

The driving waveforms for the scanning electrodes and the signal electrodes shown in FIGS. 4 and 5 are actually p (4 in this case) times the frame frequency and the selective driving portion in one frame. By dividing the p into p, the rise (fall) of the electro-optical characteristics of the liquid crystal itself of the liquid crystal display panel 10 is made steep, so that the contrast can be further increased and the display quality can be improved.

[0046]

As described above, according to the present invention, even when the display drive by the active address system is performed for the simple matrix type liquid crystal display panel, the gradation display completed within the frame can be achieved. This makes it possible to provide a liquid crystal drive circuit and a liquid crystal drive method that have sufficiently high display quality.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration according to an embodiment of the present invention.

FIG. 2 is a diagram showing a basic concept of drive waveforms of a scan electrode and a signal electrode according to the embodiment.

FIG. 3 is a diagram showing a basic concept of drive waveforms of a scan electrode and a signal electrode according to the same embodiment.

FIG. 4 is a view exemplifying a specific drive waveform for the scan electrode according to the embodiment.

5 is a diagram exemplifying drive waveforms to signal electrodes corresponding to drive waveforms of all electrodes in FIG. 4;

FIG. 6 is a diagram showing a drive waveform for general gradation display.

FIG. 7 is a diagram showing drive waveforms in which scanning electrode selection periods are dispersed.

[Explanation of symbols]

10 ... Liquid crystal display panel, 11 ... Computer section, 13 ... Timing signal generating circuit, 14 ... Gradation signal generating circuit, 15 ... Selection signal generating circuit, 16 ... Shift circuit, 17 ... Scan electrode driving circuit, 18 ... Signal electrode driving Circuit, 19 ... Voltage generation circuit.

Claims (2)

[Claims] 1. A liquid crystal driving circuit for driving a simple matrix type liquid crystal display panel having x scanning electrodes and y signal electrodes, wherein m sets (p) of scanning electrodes are arranged every adjacent p lines. Xm = x), and at the scanning timing of the scanning electrodes in the same group, the p scanning electrodes are selected at the same time, and a scanning electrode driving unit that drives by applying a voltage having a different waveform to each scanning electrode. A gray scale signal generating means for performing a gray scale calculation corresponding to the driving content of the scan electrode driving means and a gray scale of a display signal to calculate a gray scale driving signal of the y signal electrodes; A liquid crystal drive circuit, comprising: signal electrode drive means for driving the y number of signal electrodes according to the gradation drive signals calculated by the signal generation means. 2. A liquid crystal driving method for driving a liquid crystal display panel of a simple matrix driving system having x scanning electrodes and y signal electrodes, wherein m sets of the scanning electrodes are arranged for every adjacent p lines. (p × m = x), the p scanning electrodes are simultaneously selected at the scanning timing of the scanning electrodes in the same group, and a voltage having a different waveform is applied to each scanning electrode to drive the scanning electrodes. The gradation calculation is executed according to the driving contents of the electrode driving means and the gradation of the display signal to calculate the gradation driving signals of the y signal electrodes, and the gradation calculated by the gradation signal generating means. A liquid crystal driving method comprising driving the y signal electrodes according to a driving signal.