JPH0754982B2 - Teletext receiver - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory management system for a teletext receiver having a large-capacity packet memory circuit.

2. Description of the Related Art Conventionally, a conventional example of a teletext receiver that stores transmitted packet data page by page in a packet memory circuit and reads selected program data from the packet memory circuit for immediate display It is shown in FIG. In the figure, 1 is a packet data input terminal, 2 is an arithmetic control circuit, 3 is a packet memory circuit, 4 is a management memory circuit, and 5 is a management memory circuit.
Is a packet data output terminal.

The packet data is read into the arithmetic control circuit 2 via the packet data input terminal 1, and the arithmetic control circuit 2
The program number of a program, the page number, and the number of packets making up that page are detected from the packet data. further,
The management memory circuit 4 is searched to determine whether or not the detected program number and page number already exist. If the same program number and page number are present in the management memory circuit 4, accumulation of packet data is started from the address of the packet memory circuit 3 indicated by the storage start address indicating the start address of the area for storing packet data. To do. If the same program number and page number do not exist in the management memory circuit 4, the unused area of the management memory circuit 4 stores the program number, the page number, the storage start address and the end of the storage area calculated from the number of packets. Write each end address. FIG. 4 is a block diagram showing the contents of the management memory circuit 4 shown in FIG. In this figure, in order to use the packet memory circuit 3 efficiently, for example, the first page data area of program number 10 and the third page data area of program number 11 are adjacent to each other.

In the case of the screen display, when the program number and the page number are selected, the arithmetic control circuit 2 searches the management memory circuit 4 to detect the storage start address of the matching page data, and the page data is read from the packet memory circuit 3. Although not shown here, the packet data is read and output to the image display unit via the packet data output terminal 5.

Problems to be Solved by the Invention In such a conventional example, although the use efficiency of the packet memory circuit is very good, in the case of a program whose screen contents change such as news, the packet data of the screen is changed. The number of packets will increase or decrease, and in particular, if the number of data increases, the page data area of the next stored program will be entered and the data will be destroyed.

On the other hand, if a large number of protection areas are provided between the storage end address of the page data of a certain program and the storage start address of the page data of the next received program, the packet memory circuit is inefficiently used.

The present invention has been made in view of the above circumstances, and it is possible to efficiently use a packet memory circuit and destroy packet data of other stored programs even if the number of packets of packet data forming a program increases. The present invention provides a teletext receiving device that stably stores packet data.

Means for Solving Problems A teletext receiver according to the present invention includes a packet memory circuit for storing packet data, a management memory circuit for managing packet data, and a packet memory circuit having a plurality of types of appropriately sized areas. It is composed of a memory division management memory circuit and an arithmetic control circuit for dividing the divided area into two and recording the use state.

Function The arithmetic control circuit detects the program number, page number and the number of packets from the transmitted packet data, and the starting address to be used is selected from the number of packets from the memory division management memory circuit in which the starting address of the divided area is written. , Set the memory use flag corresponding to this start address, write this start address to the storage start address of the management memory circuit,
The packet data is sequentially stored in the packet memory circuit.

Embodiment 1 FIG. 1 is a circuit configuration diagram of a teletext receiving apparatus according to an embodiment of the present invention, and the reference numerals 1 to 5 are the same as those in FIG. In FIG. 1, reference numeral 6 denotes a memory division management memory circuit, which divides the area of the packet memory circuit 3 into a plurality of sizes, and the start address of the divided area is written in advance. It has been reset. FIG. 2 is a block diagram showing the contents of the memory division management memory circuit 6 shown in FIG. In this example, the area of the packet memory circuit 3 is 1 Kbyte, 2 Kbyte, 4 Kbyte, 8 Kbyte.
It is divided into 4 sizes of K bytes.

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. First, the arithmetic control circuit 2 detects a program number, a page number and the number of packets from the packet data sent. Next, the management memory circuit 4 is searched to determine whether the detected program number and page number already exist. If it already exists, it is determined whether the detected number of packets is the same as the previous value, that is, the number of packets in the management memory circuit 4. If the number of packets is the same, the packet data is sequentially rewritten in the same area of the packet memory circuit 3. If the number of packets is different from the previous value, it is determined which divided area is included, and if the divided area is the same as before, the same operation as above is performed. If the divided area is different from the one before, the memory division management memory circuit 6 is searched, the memory use flag of the head address used by the program number and page number is reset, and the head address of the newly applied divided area is reset. The memory use flag is set, this start address is rewritten to the storage start address of the management memory circuit 4, and the packet data is written in the packet memory circuit 3.

Further, if the detected program number and page number do not exist in the management memory circuit 4, the program number and page number are written in the management memory circuit 4. Then, the memory division management circuit 6 judges which divided area to enter based on the number of packets.
Is searched for and the corresponding storage start address is written in the management memory circuit 4, the memory use flag of the memory division management circuit 6 is set, and the packet data is stored in the packet memory circuit 3.
To remember.

Advantageous Effects of Invention Since the packet memory circuit is divided into areas of an appropriate size by the memory division management memory circuit and used,
Even if the number of packets of the same program number and page number increases or decreases, the packet data can be stored stably, and the memory usage efficiency is good, so that the effect is remarkable.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a main part of a teletext receiver according to an embodiment of the present invention, FIG. 2 is a diagram showing the contents of a memory management division memory circuit in FIG. 1, and FIG. FIG. 4 is a block diagram of the main circuit of the apparatus, and FIG. 4 is a block diagram of the contents of the management memory circuit in FIG. 1 ... Packet data input terminal, 2 ... Arithmetic control circuit,
3 ... Packet memory circuit, 4 ... Management memory circuit, 5
...... Packet data output terminal, 6 ...... Memory division management memory circuit.

Claims (1)

[Claims] 1. A packet memory circuit for storing transmitted packet data of teletext, a management memory circuit used for managing the packet data, and an arithmetic control for performing arithmetic control of the packet memory circuit and the management memory circuit. A circuit and a memory division management memory circuit that divides the area of the packet memory circuit into a plurality of suitable sizes and manages the usage status of the divided areas, and stores a program,
A teletext receiving apparatus, wherein an area designated by the memory division management memory circuit is selected from the number of packets of the packet data forming the program, and the packet data is stored in the selected area.