JPH075432Y2 - Analog clock pointer correction circuit - Google Patents

Description

[Detailed description of the device]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time correction mechanism for an analog timepiece, and more particularly to a pointer correction circuit capable of electronically resetting a pointer.

[0002]

2. Description of the Related Art Today, when correcting the display time of a timepiece, in a digital timepiece, a high frequency pulse signal for correction is added to a counter that counts and counts the number of pulses of a reference signal, and the counter is counted up or down. Change the contents of the counter by switching,
There is a device in which the display time at which the contents of the counter are displayed is corrected via a decoder (for example, Japanese Patent Laid-Open No. 57-1.
33376, JP-A-63-263491), regarding the seconds display, the seconds counter is cleared to zero by inputting a reset signal to the counter to display the seconds.
The one that resets the seconds display through the das to 00 seconds is used.

Also in an analog timepiece, a photocoupler or the like is used as a position detecting means to detect the returning position of the second hand or the minute hand, and a correction signal of a high frequency pulse is added to the pointer driving motor. There is a device (for example, Japanese Patent Publication No. 55-47834) for stopping the correction signal by advancing the second hand or the like by using the position detecting means and detecting that the second hand or the minute hand has returned to zero by the position detecting means.

[0004]

There is a demand for a timepiece having an adjusting mechanism that can reset the second hand and the minute hand to the hour position and can easily and quickly adjust the hour and minute. In analog timepieces, however, providing a correction driving motor separately from the pointer driving motor for correcting the displayed time has the drawback of complicating the mechanical structure, and When the normal movement and correction operation are performed with a single motor for the sake of simplicity, a guideline is provided so that a single motor can be reset and the display time can be corrected quickly. Providing a correction switch for advancing and returning the watch has the drawback of increasing the number of operation switches and complicating and assembling the timepiece.

Further, even in the conventional analog timepiece which detects the position of the pointer by using the position detecting means such as a photocoupler, when the pointer can be zeroed in both the forward and reverse directions in the zero-resetting operation, the position is detected. Since the means has a detection width, the stop position is deviated depending on the return direction, and when the drive motor is operated at high speed as in the case of correction, vibration occurs on the pointer, and the vibration of the pointer reduces the detection accuracy. There is a possibility that the shift of the stop position may be further increased due to the decrease, and it is difficult to accurately detect and control the stop position of the pointer when the pointer is zeroed.

[0006]

According to the present invention, in an analog timepiece provided with a detection element for detecting the position of a pointer, a switch circuit having two operation switches and which switch in the switch circuit has been operated. To output a direction determination signal based on the determination signal output from the distance determination circuit and to correct when any operation switch in the switch circuit is operated. When the signal is output and the operation time of the operation switch is shorter than the set time, the correction instruction circuit that maintains the output of the correction signal until the detection signal from the position detection circuit is input, and when the correction control signal is not input Is a drive signal by passing the reference drive pulse signal from the reference signal generation circuit, and when the correction control signal is input, it is corrected from the reference signal generation circuit. A gate circuit for passing a loose signal into a drive signal and a display circuit for rotating the drive motor based on the drive signal and controlling the rotation direction of the motor based on the direction determination signal. And a distance determination circuit that counts the number of pulses of the drive signal, determines whether the count number is larger than a predetermined value, and outputs a determination signal, and a drive signal when the correction control signal and the drive signal are input. And a position detection circuit which outputs a detection command pulse to the detection element in synchronism with the above and outputs a detection signal when the detection element detects the 0 position of the pointer.

The position detection circuit is reset by a timing control circuit which outputs a reset signal in synchronization with the drive signal when the correction control signal and the drive signal are input, and a reset signal from the timing control circuit. A pulse counter circuit that counts a reference signal and outputs a carry signal, a pulse output circuit that outputs a high-frequency pulse signal to a detection element for a predetermined time after the carry signal is output from the pulse counter circuit, and a detection circuit. When a detection pulse is input from the element, the detection counter circuit counts the detection pulse and outputs a detection signal when the count value reaches a predetermined value.

[0008]

[Operation] According to the present invention, a direction determining signal for determining a correction direction of a pointer is output from the direction indicating circuit by a switch circuit having two operation switches and a direction indicating circuit to which the output of the switch circuit is input. You can The correction instruction circuit to which the output of the switch circuit is input outputs the correction control signal during the operation period of the operation switch or until the detection signal is output when the operation time is shorter than the set time. The signal and the correction signal can be combined and output from the correction instruction circuit as a correction control signal.

Since the gate circuit allows the correction pulse signal having a frequency higher than that of the reference drive pulse signal to pass when the correction control signal is inputted, the pointer can be corrected and rotated at a high speed by the correction control signal. . Further, since the position detection circuit outputs the detection command pulse in synchronization with the drive signal, it is possible to detect the pointer position after the movement with the detection element each time the pointer is moved by the drive signal.

Further, the position detecting circuit is a pulse counter circuit which is reset by a drive signal and a pulse output circuit which outputs a high frequency detection command pulse for a required time when a carry signal is outputted from the pulse counter circuit. Therefore, it is possible to output the detection command pulse synchronized with the drive signal so that the position detection circuit outputs the detection command pulse at the end of one step movement of the pointer.
Since the detection element is actuated by the detection command pulse, the signal from the detection element can be output as a pulsed detection pulse. Since the detection pulse is counted by the detection counter circuit of the position detection circuit and the detection signal is output from the detection counter circuit of the position detection circuit,
There is no risk that the position detection circuit outputs a detection signal when a required number of detection pulses that are continuous pulses are input, and that a detection signal is erroneously output when noise is input to the detection counter circuit.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a timepiece having a pointer correction circuit according to the present invention is, as shown in FIG. 1, a reference signal .phi.4 from a reference signal generating circuit 10 which outputs a plurality of reference signals having different frequencies.
Is used as a reference drive pulse signal, the φ4 reference signal is output as a drive signal from the gate circuit 70 to the F signal, the drive signal is input to the display circuit 80, and the display circuit 80 drives the drive motor 88. And a switch circuit 20 having two operation switches, a first operation switch for reverse rotation and a second operation switch for forward rotation. A direction designating circuit 60 for outputting a direction determination signal to a C signal based on a H level reverse rotation signal output to the A signal output from the switch circuit 20 and an H level forward rotation signal output to the B signal,
When the forward rotation signal or the reverse rotation signal is input, the correction control signal is set to D
And a correction instruction circuit 30 for outputting a correction auxiliary signal to the E signal, and the gate circuit 70 uses the φ3 reference signal from the reference signal generation circuit 10 as a correction pulse signal.
And a position detection circuit 100 to which a drive signal and a direction determination signal are input and a position detection circuit 100 to which a correction control signal and a drive signal are input, and the pointer is at the position of 0 second. Detecting element 1 such as photocoupler for detection
It is also possible to install 50 in place.

The reference signal generating circuit 10 is composed of the transmitting circuit 1
By dividing the output signal of 2 by the first frequency divider 12,
1 reference signal, φ2 reference signal and φ3 reference signal are output from the reference signal generating circuit 10, and the output of the first frequency divider 14 is further divided by the second frequency divider 16 to generate a 1 Hz reference signal φ4. It will be output. As shown in FIG. 2, the switch circuit 20 is formed by providing two sets of operation switches and chattering prevention circuits in series,
One end of the first operation switch 22 is connected to a power supply, the other end is grounded via a resistor, and the first operation switch 22 is connected to the direction instruction circuit 60 and the correction instruction circuit 30 via the first chattering prevention circuit 26. One end of the switch 24 is used as a power source and the other end is grounded via a resistor, and a direction indicating circuit 60 and a correction indicating circuit 30 are provided via a second chattering prevention circuit 28.
It connects to and.

Therefore, the switch circuit 20 outputs the H level reverse rotation signal to the A signal when the first operation switch 22 is operated, and outputs the H level normal rotation signal to the B signal when the second operation switch 24 is operated. It will output a signal. The correction instruction circuit 30 is composed of two D flip-flops, a pulse counter, four AND circuits and three OR circuits, and the first chattering prevention circuit 26 and the second chattering prevention circuit in the switch circuit 20. The output terminal of the circuit 28 is connected to the clock input terminal of the first D flip-flop 34 via the first OR circuit 32, the D input terminal of the first D flip-flop 34 is connected to the power supply, and the Q output terminal is connected to the first AND circuit 36. Connected to the φ input terminal of the first pulse counter 38, and the output terminal of the first OR circuit 32 has a clock input terminal of the first D flip-flop 34, a reset terminal of the second pulse counter 48 and a third AND terminal. It is connected to one input terminal of the circuit 42 and further to the reset terminal of the second D flip-flop 52 via the third OR circuit 54, and the reference signal Also connected to the reset terminal of the second frequency divider 16 in live circuit 10.

Further, the Qn output terminal of the second pulse counter 48 is connected to the negative input terminal of the second AND circuit 46 and the reset terminal of the first pulse counter 38, and the first frequency divider 14 in the reference signal generating circuit 10 is connected. The φ2 reference signal output terminal from is connected to each input terminal of the first AND circuit 36 and the second AND circuit 46, and the output terminal of the second AND circuit 46 is connected to the φ input terminal of the second pulse counter 48.

The Qm output terminal of the first pulse counter 38 is connected to the input terminal of the third AND circuit 42, the clock input terminal of the second D flip-flop 52 and the reset terminal of the first D flip-flop 34, and the second D flip-flop is connected. The Q output terminal of 52 and the output terminal of the third AND circuit 42 are connected to the input terminal of the second OR circuit 44, and the output terminal of the second OR circuit 44 is connected to the gate circuit 70 and the position detection circuit 100 described later. The Q output terminal of the second D flip-flop 52 is connected to the input terminal of the third OR circuit 54 and a direction indicating circuit 60 described later via the fourth AND circuit 56, and the other of the fourth AND circuit 56 is connected. Of the detection counter circuit 140 in the position detection circuit 100 described later.
It is connected to the output terminal of.

Therefore, the correction instruction circuit 30 changes the A signal to H level.
When a level inversion signal or an H level inversion signal is output to the B signal, the first D flip-flop 34 sets the Q output to the H level, the first pulse counter 38 counts the φ2 reference signal, and the Qm is set to the H level. A level signal will be output. By this H level signal, the first D flip-flop 3
4 is reset, and the Qm output is maintained at H level by closing the first AND circuit 36.

When the reverse rotation signal or the normal rotation signal is continuously output from the switch circuit 20, the H level signal output from Qm of the second pulse counter 48 is the third AND circuit 42 and the second OR circuit. The D signal output from the correction instruction circuit 30 is output as an H level correction control signal through the circuit 44. When the reverse rotation signal or the normal rotation signal is output for a short time shorter than the set time defined by Qm of the first pulse counter 38, after the Qm output of the first pulse counter 38 becomes H level, When the Qn output of the second pulse counter 48, which has started counting after the output of the reverse signal or the normal signal is stopped, becomes the H level, the first pulse counter 38 is reset, and the Qm output of the first pulse counter 38 becomes the second The pulse is formed until the Qn output of the pulse counter 48 is output.

When the Qm output of the first pulse counter 38 is pulsed, the output of the first OR circuit 32 becomes L level by stopping the output of the forward rotation signal or the reverse rotation signal, and the third AND circuit 42 is closed. Also, since the reset state of the second D flip-flop 52 is released, the second D flip-flop 52 is output by the Qm output of the first pulse counter 38.
The Q output of is set to the H level, the correction auxiliary signal which is the H level signal is sent to the direction indicating circuit 60 as the E signal, and is output to the D signal as the correction control signal via the second OR circuit 44. is there.

If the Q output of the second D flip-flop 52 is at the H level, the fourth AND circuit 56 is open, and the fourth AND circuit 56 is in the position detecting circuit 100 described later.
The second D flip-flop 52 is returned to the initial state by outputting the H-level detection signal to the K signal because it is connected so as to input the detection signal from the input terminal to the reset terminal of the second D flip-flop 52. The output of the correction control signal and the correction auxiliary signal is stopped.

As described above, the modification instruction circuit 30 outputs the modification control signal of the H level to the D signal when either the first operation switch 22 or the second operation switch 24 in the switch circuit 20 is operated, and the operation is performed. When the switch is continuously pressed, a correction control signal of H level is output for the operation time of the operation switch via the third AND circuit 42, and the operation time of the operation switch is longer than the set time of the first pulse counter 38. When it is short as in the case of a short moment, the Q output of the second D flip-flop 52 is output to the D signal as the correction control signal, and the H level Q output is also output to the E signal as the correction auxiliary signal. Therefore, when the Q output of the second D flip-flop 52 is used as the correction control signal, the correction control signal and the correction auxiliary signal are output until the detection signal is output from the position detection circuit 100. It will maintain the output.

Further, the gate circuit 70, as shown in FIG.
It is composed of two AND circuits and one OR, and the output terminal of the second OR circuit 44 in the correction instruction circuit 30 is connected to the negative input terminal of the seventh AND circuit 72 and the normal input terminal of the eighth AND circuit 74. The other input terminal of the seventh AND circuit 72 is the φ4 reference signal output terminal of the reference signal generating circuit 10, and the other input terminal of the eighth AND circuit 74 is the reference signal generating circuit 1.
Connected to the φ3 reference signal output terminal of 0, and connected to the seventh AND circuit 7
The second output terminal and the output terminal of the eighth AND circuit 74 are connected to the sixth terminal.
The output terminal of the sixth OR circuit 76 is connected to the input terminal of the OR circuit 76, and the output circuit of the sixth OR circuit 76 is connected to a display circuit 80, a distance determination circuit 90, and a position detection circuit 100 described later.

Therefore, if the φ4 reference signal is, for example, a reference drive pulse signal of 1 hertz and the φ3 reference signal is a correction pulse signal of several hertz, the correction control signal is the correction instruction circuit 3.
When it is not input from 0, the seventh AND circuit 72 is opened and the reference drive pulse signal is output as the drive signal to the F signal which is the output of the gate circuit 70. When the correction control signal is input, the correction pulse signal is 8 Pass through AND circuit 74 and F
When the correction control signal is input, the frequency of the drive signal is increased.

Further, as shown in FIG. 2, the direction indicating circuit 60 is composed of two AND circuits and an OR, and one RS flip-flop, an inverter and a pulse generator, and a distance discriminating circuit which will be described later. The output terminal of the comparator 94 in 90 is connected to the input terminal of the fifth AND circuit 61 and the negative input terminal of the sixth AND circuit 62, and the Q output terminal of the second D flip-flop 52 in the correction instruction circuit 30 is connected. Fifth
The output terminal of the fifth AND circuit 61 is connected to the other input terminal of the AND circuit 61 and the other input terminal of the sixth AND circuit 62, and the output terminal of the fifth AND circuit 61 is set through the fourth OR circuit 63. To the terminal, the output terminal of the sixth AND circuit 62 is connected to the reset terminal of the RS flip-flop 65 via the fifth OR circuit 64, and the other input terminal of the fourth OR circuit 63 is the first chattering prevention in the switch circuit 20. At the output terminal of the circuit 26, the fifth OR circuit 64 uses the three-input OR circuit to output the second signal in the switch circuit 20.
Output terminal of chattering prevention circuit 28 and pulse generator 6
The output terminal of the pulse generator 67 is connected to the output terminal of the second OR circuit 44 in the correction instruction circuit 30 via the inverter 66, and the inverted output of Q in the RS flip-flop 65 is connected. (Hereinafter referred to as -Q output)
The terminals are connected to a display circuit 80 and a distance determination circuit 90 described later.

Therefore, the direction indicating circuit 60 is normally RS
Although the direction determination signal of H level is output to the C signal which is the -Q output of the flip-flop 65, when the inverted signal of H level is output to the A signal, the RS flip-flop 65 is set to the set state and the direction of L level is set. Outputs the decision signal,
Also, when the H level normal rotation signal is output to the B signal, C
When the signal is maintained at the H level and the direction determination signal of the H level is output, and further, the reverse signal is output to the A signal for a short time or the normal signal is output to the B signal for a short time, the reverse signal or The fifth AND circuit 61 and the sixth AND circuit 62 are opened by the correction auxiliary signal output from the correction instruction circuit 30 immediately after the output of the normal rotation signal is stopped, and whether the determination signal from the distance determination circuit 90 is the H level or the L level. By this, the set state or reset state of the RS flip-flop 65 is determined, and the direction determination signal is set to H level or L level.

The display circuit 80 comprises a shift register 82 and a motor drive circuit 84, and the φ input terminal of the shift register 82 is used as the output terminal of the sixth OR circuit 76 in the gate circuit 70. , The shift direction control terminal is connected to the RS flip-flop 65 of the direction indicating circuit 60,
Since the output terminal of the shift register 82 is connected to the motor drive circuit 84, the shift register 82 is driven by the direction determining signal.
The phase of the drive control signal to the motor drive circuit 84 can be changed by reversing the shift direction.

Therefore, the display circuit 80 has the motor drive circuit 84 according to the frequency of the drive signal output to the F signal.
The drive motor 88 is rotated by the
The rotation direction of the drive motor 88 is normally or reversely rotated depending on whether the level is a level or not. Also, the distance determination circuit 90
Is composed of an up / down counter 92 and a comparator 94. The φ input terminal of the up / down counter 92 is used as the output terminal of the sixth OR circuit 76 in the gate circuit 70, and the up / down switching control terminal is used as a direction indicator. The -Q output terminal of the RS flip-flop 65 of the circuit 60 is connected, the Q output terminal of the up-down counter 92 is connected to the comparator 94,
The reset terminal is connected to the position detection circuit 100 described later.

When the output value of the up / down counter 92 is less than 30, the comparator 94 changes the H level discrimination signal to the G signal, and when it is 30 or more and 59 or less, the L level discrimination signal. Is set to output G signal,
When the timepiece incorporating the pointer correction circuit has three hands, the up / down counter 92 increments the output count number by 1 every 1 second and carries it to 60. When the timepiece has two hands, the output count number increases every 1 minute. The number is incremented by 1 and set to carry at 60.

Therefore, the distance discriminating circuit 90 has a clock of 2
In the case of hands, the H-level discrimination signal is output when the minute hand indicates up to 29 minutes, and the L-level discrimination signal is output when the minute hand indicates 30 minutes or more. It outputs a discrimination signal of H level or L level depending on whether is less than 30 or 30 or more. The position detection circuit 100 includes a timing control circuit 110, a pulse counter circuit 120, a pulse output circuit 130, and a detection counter circuit 140, and the gate of the negative input terminal of the ninth AND circuit 112 serving as the timing circuit 110. To the output terminal of the sixth OR circuit 76 in the circuit 70, the normal input terminal of the ninth AND circuit 112 is connected to the output terminal of the second OR circuit 44 in the correction instruction circuit 30, and the output terminal of the ninth AND circuit 112 is connected. It is connected to the reset terminal of the third pulse counter 124 in the pulse counter circuit 120 and the reset terminal of the fourth pulse counter 138 in the pulse output circuit 130.

The pulse counter circuit 120 comprises an AND circuit and a pulse counter, and the tenth AND circuit 12
One input terminal 2 is the φ1 reference signal output terminal of the first frequency divider 14 in the reference signal generation circuit 10, and the other input terminal is the negative input terminal is the Qn output terminal of the third pulse counter 124, and the tenth AND The output terminal of the circuit 122 is connected to the φ input terminal of the third pulse counter 124, and the Qn output terminal of the third pulse counter 124 is the tenth AND circuit 122.
In addition to the negative input terminal of, the clock input terminal of the third D flip-flop 132 in the pulse output circuit 130 is connected.

Accordingly, the timing circuit 110 outputs the reset signal obtained by inverting the drive signal output from the gate circuit 70 when the H level correction control signal is output from the correction instruction circuit 30 to the pulse counter circuit 120 and the pulse output. This signal is output to the circuit 130, and in the pulse counter circuit 120, this reset signal resets the third pulse counter 124, and the third pulse counter 124 counts the φ1 reference signal in synchronization with the drive signal. Carrying the H level to the I signal after a predetermined time
Outputting the signal is repeated.

The pulse output circuit 130 is formed of a D flip-flop, an AND circuit, an inverter, and a pulse counter, and the φ input terminal of the third D flip-flop 132 is connected to the Qn of the third pulse counter 124 as described above. The third D flip-flop 132 is connected to the output terminal.
Connected to the power input terminal, the Q output terminal to the input terminal of the eleventh AND circuit 134, and the reset terminal to the carry signal output terminal of the fourth pulse counter 138 to detect the output terminal of the eleventh AND circuit 134. It is connected to the switching transistor 156 of the element 150 to output the detection command pulse, and is also connected to the φ input terminal of the fourth pulse counter 138 via the inverter 136. still,
The other input terminal of the eleventh AND circuit 134 is connected to the φ1 reference signal output terminal of the reference signal generation circuit 10, and the carry signal output terminal of the fourth pulse counter 138 is connected to the detection counter circuit 140.

Therefore, when the carry signal is input from the pulse counter circuit 120, the pulse output circuit 130 receives the 3D signal.
The Q output of the flip-flop 132 is set to H level, and the first
1 AND circuit 134 is opened and the φ1 reference signal from the pulse output circuit 130 is used as a detection command pulse in the detection element 150.
When the required number of detection command pulses is counted by the fourth pulse counter 138, the H-level regulation signal is output from the carry signal output terminal to reset the third D flip-flop 132 and the pulse output circuit 130 It stops the detection command pulse output from the control counter circuit 140 and outputs the H level regulation signal to the detection counter circuit 140.

The detection counter circuit 140 has a plurality of D flip-flops connected in series, the clock input terminal of each D flip-flop is the output terminal of the detection element 150, and the reset terminal of each D flip-flop is the pulse output circuit 1.
30 is connected to the carry signal output terminal of the fourth pulse counter 138, the D input terminal of the first stage D flip-flop 142 is used as a power source, and the final stage D flip-flop 148 is connected.
Is connected to the fourth AND circuit 56 in the correction instruction circuit 30 and the reset terminal of the up / down counter 92 in the distance determination circuit 90.

The detecting element 150 is, for example, an element such as a photocoupler, and is arranged so that the light of the light emitting diode 152 is received by the phototransistor 154 when the second hand or the minute hand is located at the position of 0 second or 0 minute. In this case, the light emitting diode 152 blinks at high speed in response to the detection command pulse output from the position detection circuit 100, and the phototransistor 154 receives this pulse signal so that the detection element 150 detects the position detection circuit 100. To send a detection pulse to the counter circuit 140 for detection
When the required number of pulses have been counted at, the detection counter circuit 140 sends a detection signal to the correction instruction circuit 30 and the distance determination circuit 90.

As described above, in this embodiment, when the first operation switch 22 in the switch circuit 20 is continuously turned on, the switch circuit 20 outputs the H level inversion signal to the A signal, and the RS flip-flop 65 is turned on. In the set state, the direction designating circuit 60 outputs an L level direction determining signal, and the shift register 82 in the display circuit 80.
Is set for the reverse rotation of the drive motor 88, the up / down counter 92 in the distance discriminating circuit 90 is switched to the down count, and the correction instruction circuit 3 is set.
At 0, the first pulse counter 38 sets the Qm output to the H level and outputs the H level correction control signal from the correction instruction circuit 30 via the third AND circuit 42 and the second OR circuit 44, and the gate circuit 70 outputs the reference signal. The φ3 reference signal having a higher frequency than the driving pulse signal φ4 is output as the driving signal, and the timepiece moves the hands backward.

Further, when the second operation switch 24 is continuously turned on, the correction instruction circuit 30 and the gate circuit 70 are also provided.
Operate similarly and display circuit 80 and distance determination circuit 90
The φ3 reference signal is sent to the RS flip-flop 65 as the driving signal,
The reset state is maintained and the direction determination signal is fixed at the H level, and the display circuit 80 rotates the drive motor 88 at high speed in the forward direction to advance the pointer.

Since the direction determining signal is input to the distance discriminating circuit 90 together with the driving signal, the distance discriminating circuit 90 is inputted.
The up / down counter 92 at counts the drive signal and always holds the number indicated by the pointer. When the first operation switch 22 or the second operation switch 24 is turned off, the third AND circuit 42 in the correction instruction circuit 30 is closed and the output of the correction control signal is stopped,
The gate circuit 70 outputs the reference drive pulse signal φ4 as a drive signal, and when the output of the correction control signal is stopped, the RS flip-flop 65 in the direction indicator circuit 60 is output by the pulse generator 67. When the direction determining signal is set to the H level in the reset state, the display circuit 80 returns to the initial state in which the driving motor 88 is normally rotated.

When the first operation switch 22 or the second operation switch 24 is turned on for a time shorter than the set time set by the first pulse counter 38, the second D flip-flop 52 in the correction instruction circuit 30. Outputs a correction auxiliary signal of H level to the direction designating circuit 60, opens the fifth AND circuit 61 and the sixth AND circuit 62 in the direction designating circuit 60, and outputs the modification assistance signal to the second OR circuit of the modification designating circuit 30. Since the correction control signal is output from the correction instruction circuit 30 to the gate circuit 70 by passing through the circuit 44, the φ3 reference signal is used as a correction pulse as the drive signal output from the gate circuit 70. Circuit 7
It is possible to output from 0.

Therefore, when the distance discriminating circuit 90 outputs the H level discriminating signal to the G signal, that is, when the second hand indicates up to 29 seconds, the output of the fifth AND circuit 61 is H.
When the RS flip-flop 65 is set to the level, the direction indicating circuit 60 can output the L level direction determining signal to reverse the driving motor 88, and
When the distance determination circuit 90 outputs the L level determination signal, that is, when the second hand indicates 30 seconds to 59 seconds, the direction indicator circuit 60 outputs the H level direction determination signal to the C signal. Then, the second hand can be rotated in the direction of advancing.

Further, as described above, when the second hand makes reverse rotation or forward rotation based on the correction pulse signal φ3, the position detection circuit 1
00 is the fourth pulse counter 1 in the pulse output circuit 130 for each H pulse of the correction pulse signal φ3 which is a drive signal.
The φ1 reference signal pulses of the number set in 38 are output to the detection element 150 as detection command pulses, and the light emitting diode 152 of the detection element 150 is turned on every time the second hand moves one step by the correction pulse signal φ3. The position of the second hand will be detected.

Then, when the second hand returns to the 0 position, the phototransistor 154 in the detecting element 150 receives the blinking light of the light emitting diode 152 and the position detecting circuit 100.
To the detection counter circuit 140, and when the detection counter circuit 140 receives the detection pulse, it outputs a detection signal to reset the second D flip-flop 52 in the correction instruction circuit 30 to output the D signal from the correction instruction circuit 30. The correction control signal output to the gate circuit 70 is stopped, the drive signal output from the gate circuit 70 is returned to the reference drive pulse signal φ4, and R in the direction indicating circuit 60 is returned.
The S flip-flop 65 is reset to return the direction determination signal to the H level.

Further, by setting the count number of the detection pulse for the detection counter circuit 140 to output the detection signal to be smaller than the pulse number of the detection command pulse output from the pulse output circuit 130, the second hand Each time the pulse output circuit 130 outputs the regulation signal for every movement of the signal, the signal from the detection element 150 is inspected to enable a reliable inspection, and when a plurality of pulses are input within a predetermined period. Only the detection signal is output, so the detection signal is prevented from being output due to a malfunction and the second hand is set to 0
When it is returned to the position, the detection signal is output to return the correction instruction circuit 30 and the like to the normal state.

In the above embodiment, the zero hand of the second hand is mainly explained, but in the case of zero hand of the minute hand in the two-hand clock, the output value of the up / down counter 92 is set as described above. When the minute hand indicates less than 30 minutes by counting by one minute or by changing the threshold value of the comparator 94, zero return by return correction is performed, and when 30 minutes or more is instructed, feed correction is performed. By performing zeroing, it is possible to perform quick zeroing in the same manner as described above.

[0044]

[Effect of the Invention] The pointer correction circuit of the analog timepiece according to the present invention includes two operation switches in the switch circuit.
When any one of them is continuously operated, the H-level correction control signal is output during the ON time of the operation switch, and when any of the two operation switches is turned on for a short time. The position detection circuit has a correction instruction circuit that outputs a correction control signal of H level until it detects the zero return of the second hand or the minute hand, and when any of the operation switches is continuously turned on, whichever Depending on whether the operation switch is in the ON state, an H level or L level direction determination signal is output. When the operation switch is in the ON state for a short time, the H level or L level is output based on the determination signal output from the distance determination circuit. Since it has a direction indicator circuit that outputs a level direction determination signal, it is possible to perform the zero-reset operation and the correction operation for advancing and returning the pointer with two operation switches, and to perform a quick correction and zero-return operation. But Kill.

Further, particularly in the zero-return operation, the distance determining circuit displays the time over 30 seconds in the three-hand clock, and the time in which the minute hand exceeds 30 minutes in the two-hand clock. Since the direction of zeroing is determined depending on whether or not the zeroing is performed, a quick zeroing correction can be performed. Further, when a timing control circuit, a pulse output circuit, and a detection counter circuit are used as the position detection circuit, it is determined whether or not a high frequency pulse signal is returned to zero each time the pointer moves one step by one pulse of the drive signal. In addition, when the number of pulses of the detection pulse signal is counted, the detection signal can be output when the required number of pulses has been counted.Therefore, it is possible to prevent malfunction and detect whether the pointer has correctly returned to zero. Thus, the zero return of the pointer can be accurately controlled.

[Brief description of drawings]

FIG. 1 is a block diagram showing a pointer correction circuit of an analog timepiece according to the invention.

FIG. 2 is a diagram showing an embodiment of a switch circuit, a correction instruction circuit, and a direction instruction circuit according to the present invention.

FIG. 3 is a diagram showing an embodiment of a gate circuit, a display circuit, a distance determination circuit, and a position detection circuit according to the present invention.

[Explanation of symbols]

10 reference signal generation circuit 20 switch circuit 30 correction instruction circuit 60 direction indicator circuit 70 gate circuit 80 display circuit 90 distance determination circuit 100 position detection circuit 150 detection element

Claims (2)

[Scope of utility model registration request] 1. A reference signal generating circuit for outputting reference pulse signals having different frequencies, wherein the reference pulse signal from the reference signal generating circuit counts time and the output of the display circuit is used to correct the driving motor. Rotate or reverse to display the time,
Moreover, in an analog timepiece incorporating a detection element for detecting the zero position of the second hand or the minute hand, a switch circuit having two operation switches and which switch in the switch circuit is operated are discriminated to determine a direction determination signal. A direction indicating circuit that outputs a direction determining signal based on the determination signal output from the distance determining circuit and a correction signal when any operation switch in the switch circuit is operated, and the operation is performed. When the switch operation time is shorter than the set time, a correction instruction circuit that maintains the output of the correction signal until the detection signal from the position detection circuit is input,
A gate circuit that normally passes the reference drive pulse signal from the reference signal generation circuit as a drive signal, and passes the correction pulse signal from the reference signal generation circuit as a drive signal when the correction control signal is input. And a display circuit for rotating the drive motor based on the drive signal and controlling the rotation direction of the motor based on the direction determination signal, and counting the pulse number of the drive signal A distance determining circuit that determines whether or not is greater than a predetermined value and outputs a determination signal,
When the correction control signal is input and the drive signal is input, the detection command pulse is output to the detection element in synchronization with the drive signal,
A position correction circuit that outputs a detection signal when the detection element detects the 0 position of the pointer, and a pointer correction circuit for an analog timepiece. 2. A timing control circuit that outputs a reset signal in synchronization with a drive signal when a correction control signal from the correction instruction circuit and a drive signal from the gate circuit are input, and a reset signal from the timing control circuit. Carry out pulse counting of the reference signal while being reset by
A pulse counter circuit that repeats outputting a signal,
A pulse output circuit that outputs a high-frequency pulse signal to the detection element for a predetermined time after the carry signal is output from the pulse counter circuit; and a pulse number of the detection pulse when the detection pulse is input from the detection element, The pointer correction circuit for an analog timepiece according to claim 1, further comprising a position detection circuit formed by a detection counter circuit that outputs a detection signal when the count value reaches a predetermined value.