JPH0750581A - A/c converter - Google Patents

Abstract

PURPOSE:To make an effective bit of high frequency of an A/C converter almost equal to the characteristic of low frequency. CONSTITUTION:A tilt detecting circuit 14 detects the tilt of an analog input signal based on the digital output code of a quantizing circuit 10. An error correcting circuit 16 produces the corrected value, i.e., the function of the tilt detected by the circuit 14. This corrected value also serves as a level range function of the circuit 10. An adder 18 adds the corrected value to the digital output code of the circuit 10 to produce a corrected digital output code.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital converter, and more particularly, to an analog / digital converter which performs secondary error correction to improve high frequency accuracy.

[0002]

2. Description of the Related Art An analog / digital converter (hereinafter referred to as AD
The accuracy of (sometimes called C) generally decreases at high frequencies. FIG. 3 shows a part of the input part of a typical flash type (parallel comparison type) analog-digital converter. Ideally, in the comparator of FIG. 3, the input voltage VIN of the terminal V1 of the differential amplifier is the reference voltage REF of the terminal V2.
Detect when it matches. However, in practice, due to the finite emitter current I and the stray capacitance C of the circuit, the input slope, or slew rate, is determined by the comparator sense point, which is a function of the frequency of the input voltage VIN.

[0003]

This slew rate results in a significant loss of accuracy at high frequencies. As shown in FIG. 4 showing the characteristics of a typical 10-bit ADC, this A
The effective bit number of DC is reduced to 9 bits at 2MHz,
At 0 MHz, it is further reduced to 8 bits, and at 80 MHz, it is further reduced to 5 bits.

Accordingly, it is an object of the present invention to provide an analog to digital converter having a quadratic error correction function to compensate for frequency dependent input slope.

[0005]

SUMMARY OF THE INVENTION The analog-to-digital converter of the present invention has a quadratic error correction function to maintain effective bits at high frequencies approximately equal to low frequency characteristics. For that purpose, the output signal of the quantizing means is converted to a digital delay circuit,
Input to one input terminal of the adding means and the inclination detecting means. The output signal of the delay circuit is input to the inclination detecting means.
Using the output signal of this inclination detection means, a lookup
The table (error correction means) is addressed and the tilt dependent correction value is supplied to the other input terminal of the addition means. The output signal of this adding means is the corrected ADC digital output signal.

Other objects, advantages and novel features of the present invention will be apparent from the following description with reference to the accompanying drawings.

[0007]

1 is a block diagram of an analog-digital converter having a secondary error correction function according to the present invention.
The quantization circuit (quantization means) 10 receives an analog input signal and converts it into a digital signal (digital output code) by controlling a clock signal. The digital output code of the quantization circuit 10 is supplied to the digital delay line (delay circuit) 12. The digital delay line 12 is clocked by the clock signal. The delayed quantized output code from the digital delay line 12 is used as a slope detector (slope detection means) 1
Supply to 4. The quantization circuit 1 is included in the inclination detector 14.
The digital output code from 0 is also input. Tilt detector 1
4 subtracts the current output code of the quantizer 10 from the delayed output code of the delay line 12 to determine the slew rate of the input signal, ie the slope approximation. The output signal of the inclination detector 14 is supplied to an error correction circuit (error correction means) 16 such as a look-up table. The error correction circuit 16 produces a correction code that is a function of the input signal slew rate. These quantized output code and correction code are supplied to an adder (adding means) 18 to generate a corrected ADC output code. The adder 18 sends the quantized input signal to the slope detector 14 and the error correction circuit 1
A suitable delay circuit 20 may be included to match the delay by 6.

The digital delay line 12 may be in the form of a latch that outputs the value present at the input terminal in the next cycle of the clock signal to delay the quantized output code by one sample. The slope detector 14 may be in the form of a digital subtraction circuit that determines the difference between the quantized output code and the delayed quantized output code. The look-up table value is A up to a known high frequency signal whose frequency is asynchronous with the clock signal.
It may be determined by analyzing the DC response. Adder 18
Is analyzed by a fast Fourier transform processor and iteratively produces values for the look-up table 16 until the output signal of the adder is the correct digital signal representing the input high frequency signal. Ideally, AD
A pure triangular wave that provides a constant slope over the C range is desirable as a known input signal, but generating such a waveform is difficult and expensive. A more practical solution is to use a pure sine wave, although the slope becomes very gentle as it approaches the peak value.

FIG. 2 is a graph showing the ideal and actual response characteristics of the analog-digital converter at high frequencies. The high frequency error in the positive slope has one direction to the ideal ADC response, while the high frequency error in the negative slope has the opposite effect as the positive slope. Therefore, the high frequency error is dependent on the slope. That is, the high frequency error is a function of the direction of change of the input signal. Moreover, since high frequency errors are also level dependent, errors at high input signal levels are less than errors at low input signal levels. To compensate for this level difference, a portion of the output of the delay line 12 representing the level range of the quantizer 10 for the input signal sample is looked up in a look-up table 1.
Enter 6 to select the region in the lookup table that corresponds to that level range. The output signal of the slope detector 14 then accesses only that region in the look-up table for the correction value for the input of the adder 18.

Although the invention has been described as a complete digital embodiment, the slope determination of the input signal can also be implemented in the analog domain by using a differentiator as the slope detector 14. In this case, the output signal of the differentiator is digitized and input to the error correction circuit 16. In addition, the error correction circuit 16
May be realized in the analog domain, and the corrected output voltage is converted into a digital correction value before being supplied to the adder 18.

[0011]

As described above, the analog-digital converter of the present invention has a quadratic error correction function, obtains the slope of the input signal, and from this slope the function of the slope and level range of the input signal is obtained. An error generated at a high frequency is corrected by generating a correction value and adding it to the digital output code of the quantization circuit.

[Brief description of drawings]

FIG. 1 is a block diagram of an analog-digital converter of the present invention.

FIG. 2 is a diagram showing an ideal response characteristic and an actual response characteristic at a high frequency of the analog-digital converter.

FIG. 3 is a circuit diagram of a part of a conventional flash type analog-digital converter.

FIG. 4 is a diagram showing the number of effective bits of a typical analog-digital converter with respect to frequency.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Quantization circuit (quantization means) 12 Delay circuit 14 Slope detection circuit (slope detection means) 16 Error correction circuit (error correction means) 18 Adder (addition means) 20 Delay circuit

Claims (1)

[Claims] 1. A quantizer circuit for receiving an analog input signal to generate a digital output code, a slope detecting means for obtaining a slope of the analog input signal, and a function of the slope of the analog input signal obtained by the slope detecting means. An analog-to-digital converter comprising: an error correction means for generating a correction value and an addition means for adding a correction value generated by the error correction means to the digital output code to generate a corrected digital output code.