JPH0744507A - Compile method for parallel program - Google Patents

Abstract

PURPOSE:To realize the efficient load distribution processing not imposing a load on a programmer in the parallel computer system by adding number of times of implementation of a sub-program in the past imprementation as input information at compiling and applying mapping to a processor of the sub program at compiling. CONSTITUTION:A source program 1 is inputted to a compiler 2 and given to a hardware execution step 3 and the number of times of execution 4 of a sub program is obtained. Then a new source program is obtained by a precompile processing 5 based on the sub program implementation number of times 4, a maximum implementation processor number 6 and the source program 1 and compiling and implementation are implemented again. Since the sub program at compiling is mapped onto the processor, the load at implementation is relieved and the past implementation information is utilized, then the load of a programmer is not increased. Furthermore, the procedure of tuning is simplified by designating a maximum processor number.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compiling method aimed at speeding up program execution in a parallel computer system. The speed-up is achieved by designating an appropriate number of processors and executing the processors within this range by instructing the effective utilization based on the past runtime information at the time of compilation.

[0002]

2. Description of the Related Art Conventionally, regarding load equalization executed by each processor in a parallel computer system, "Stack division dynamic load balancing method and evaluation on multiple PSI" (Furuichi et al., KL1 Programming Workshop Proceedings pp51
~, ICOT, 1991).

In the above-mentioned prior art, every time it is necessary to execute a subprogram suitable for distribution specified in advance by a program, the load balancing subprogram which determines the distribution destination processor is inquired according to the state of the processor at the time of execution, and the time is spared. Distribute the subprogram to the processor. In each processor, the unexecuted subprograms are registered in the priority-based management table, and the subprograms are executed in descending order of priority. At this time, the lowest priority subprogram executes the process of registering its own processor number in the load balancing subprogram,
It enables detection of idle processors.

In the above conventional technique, the detection processing of the spare processor is added to the original program processing.

[0005]

The above-mentioned prior art does not consider the urgency of the load balancing process, and once the sub-program for registering the spare processor is distributed to all the processors and then registered to the specific processor. Since the information is concentrated, there is a problem that distribution is delayed in the early stage of program execution. Further, since this registration processing is executed at the time of execution, there is a problem that the processing amount is increased. further,
The trouble has arisen that the programmer has to specify the subprograms that can be distributed. The present invention is
It is an object of the present invention to solve all the above problems and to realize efficient load balancing processing in a parallel computer system without burdening the programmer.

[0006]

In order to achieve the above object, in the present invention, the number of times of execution of a subprogram in past execution is added as input information at the time of compilation, and the processor of the subprogram is added at the time of compilation. Mapping. A means for designating the maximum number of processors and reflecting this in the compilation result is provided.

[0007]

In the present invention, since the subprogram is mapped to the processor at the time of compilation, the load at the time of execution can be reduced. Moreover, since the execution information in the past can be utilized, the burden on the programmer is not increased. Further, by designating the maximum number of processors, it is possible to simplify a complicated tuning procedure as a procedure for obtaining the optimum number of processors.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a system configuration diagram of an embodiment of the present invention. The source program 1 inputs to the compiler 2 and goes through the hardware execution 3 to obtain the execution count 4 of the subprogram. A new source program is obtained by precompilation processing 5 using the subprogram execution count 4, the maximum number of execution processors 6, and the source program 1, and the compilation and execution are performed again.

In this embodiment, the precompiler is described as an example, but it may be integrated with the main body of the compiler.

The precompiler creates a subprogram call relation tree 21 shown in the precompiler control flow in FIG.
After the subprogram execution count input 22 and the maximum execution processor count input 23, processor allocation 24, and output generation 25 are performed. These data are used as follows.

(1) The subprogram call relationship tree creation 21 reads a source program as shown in FIG. 5, for example, and creates a subprogram call relationship tree as shown in FIG.

(2) By the subprogram execution count input 22, the execution count of the subprogram in the past execution as shown in FIG. 4 is obtained.

(3) For example, the maximum execution processor number "30" is obtained from the maximum execution processor number input 23.

(4) By the processor allocation 24, the processors that do not exceed the maximum execution processor number "30" are allocated in order from the subprogram near the root of the call relation tree of the subprogram. In the case of FIG. 3, the number of times the subprogram p is executed is 21 times according to FIG. 4, so it is assumed that this is allocated to a different processor for each call, and the other subprograms are executed by the processor that called. Since a is called only by p, it is regarded as a part of p and is not subject to load balancing. When b or c is load-balanced, the number of execution processors is 21 + 101 = from FIG.
Since this is 122 and the maximum number of processors to be executed exceeds "30", b and c are not subject to load balancing.

(5) The output generator 25 obtains an output as shown in FIG. Where call (pd (N1)) @ no
de (N) indicates that the processor number that executes the subprogram pd (N1) is N. N is an integer that is incremented from 0 by 1 every time the subprogram pd generated by the precompiler is called, and does not exceed the maximum number of execution processors “30” by the modulo operation represented by mod.

As described above, according to this embodiment,
In a parallel computer system, there is an effect of realizing simple and efficient load balancing control.

[0017]

According to the present invention, since information at the time of execution can be reflected at the time of compilation, simple load balancing control can be performed, and the overhead due to parallel processing can be reduced. Further, the maximum number of execution processors is a simple guideline for designating the degree of parallelism of the program, and therefore the programmer's time and effort are rarely increased as the first step of the tuning process.

[Brief description of drawings]

FIG. 1 is a system configuration diagram of an embodiment of the present invention.

FIG. 2 is a diagram showing a precompiler control flow according to the present invention.

FIG. 3 is a diagram showing an example of a subprogram call relation tree according to the present invention.

FIG. 4 is a diagram showing an example of a sub-program execution count output.

FIG. 5 is a diagram showing an example of a source program.

FIG. 6 is a diagram showing an example of precompiler output according to the present invention.

[Explanation of symbols]

21 ... Subprogram call relation tree creation, 22 ... Subprogram execution count input, 23 ... Maximum execution processor number input, 24 ... Processor allocation, 25 ... Output generation.

Front page continuation (72) Inventor Imon Tokuyasu 1-280, Higashi Koikekubo, Kokubunji, Tokyo Metropolitan Research Center, Hitachi Ltd.

Claims (1)

[Claims] 1. When compiling a program composed of a plurality of subprograms to be executed in parallel by a plurality of processors, the number of executions indicating how many times each subprogram is executed when the program is executed, and the plurality of execution times. A parallel program compiling method for allocating each subprogram to a different processor according to the number of executions of the subprogram, based on the number of processors and the number of processors.