JPH0744474B2 - Tuning device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a channel selection device used for a video tape recorder, a television receiver, etc., and a band pass for guiding an antenna input to a mixer circuit at the time of channel selection. The tuning frequency of the filter (hereinafter referred to as BPF) is automatically adjusted so that it becomes the optimum tuning frequency for the channel selected by the channel selection means.

2. Description of the Related Art Conventional channel selection devices include a frequency synthesizer system and a voltage synthesizer system, which can receive a desired channel by operating a channel selection button. It is necessary to preset the tuner unit (hereinafter referred to as tuner) to be received at the tuner factory. Mainly as a presetting means, several stages of BPFs composed of L and C are provided between the antenna input terminal and the mixer circuit, and the desired channel frequency is tuned by changing L and C for each stage individually. I am taking it.

Here, an air-core coil is used as the L and a varicap diode (hereinafter referred to as VCD) is used as the C, and a common bias voltage is supplied to the VCD of each stage to change the capacitance. However, the characteristic curve of the voltage-capacity of the VCD of each stage has a large variation, and if the VCDs having different characteristic curves are randomly used for each stage, the tuning cannot be performed. The characteristic curves shown above are very similar and are used in pairs. Further, in order to absorb the slight variation of the VCD and the variation of other circuit elements, the inductance of the air core coil is finely adjusted to tune to the desired channel frequency. However, this is only a preset, and the tracking is not uniform in each band, so that it cannot be received in the optimum state in all channels.

FIG. 5 shows an example of a conventional channel selection device. Here, 1 is a channel selection means for providing channel selection including operation buttons, 2a is a first local oscillation circuit, 3 is a PLL circuit, and 8 and 1
Reference numeral 0 is a BPF, and a VCD of 11a, 11b, 11c and a coil of 12a, 12b, 12c constitute a tuning circuit. 9 is a high frequency amplifier circuit, 4
Is a first mixer circuit, the first local oscillator circuit
The oscillation output of 2a and the signal from the BPF 10 are mixed to form an intermediate frequency. The tuning voltage of each stage supplies a common voltage from the PLL circuit.

Problems to be Solved by the Invention In such a conventional method, there is a trouble that the tuner part needs to be finely adjusted by the air-core coil, but a considerable adjustment accuracy is required, and therefore many mass productions are required. Requires personnel and equipment. Also, in the tuner design, several VCDs are used for each BPF of each stage, but VCDs of all stages are suppressed by the same voltage, so the ones with extremely similar capacitance-voltage characteristic curves are used. There is also the hassle of having to do it (using a pair). Therefore, there is a problem that not only the VCD selection cost but also a large amount of human rights and facility costs are required.

Means for Solving the Problems The channel selection device of the present invention, in order to solve the above problems, fixes an air-core coil that has been manually adjusted up to now,
It is configured to automatically adjust to the desired channel by controlling the applied voltage of VCD of BPF of each stage separately for each stage.

Operation According to the present invention, the above configuration eliminates the need for manual adjustment of the tuner section. Also, the tuning frequency of the BPF of each stage is
Since the VCD applied voltage is controlled for each stage, the need for using a pair of VCDs as described above is eliminated. Furthermore,
All channels can be received in optimum condition.

Embodiment A channel selection device according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a channel selection device according to an embodiment of the present invention.

In FIG. 1, 4 is a first mixer circuit, 1 is a channel selecting means for selecting a channel, 2a is a first local oscillation circuit of a tuner section, 3 is a PLL circuit, and a command from the channel selecting means 1 is given. _Is a circuit that locks the oscillation frequency of the first local oscillation circuit 2a to the local oscillation frequency of the selected channel (hereinafter referred to as F _OSC ), and outputs the locked output of the first local oscillation circuit 2a. First above
Is applied to the mixer circuit 4 of. The second oscillator circuit 2b oscillates at the center frequency of the intermediate frequency. 6 is a second mixer circuit, which is the center frequency of the intermediate frequency created by the second oscillating circuit 2b (hereinafter referred to as F _IFC )
Of mixing the F _OSC created by carrier and the first local oscillation circuit 2a, creating a (F _OSC -F _IFC) of the carrier, i.e., approximately the center of the carrier wave of the selected channel (hereinafter F _RFC) It is supplied to the first BPF 8 via SW of 7. The SW7 is controlled by 13 CPUs, and the first
The input to BPF8 is the above F _RFC or the input from the antenna (hereinafter referred to as F
_It's called _RF ). At the same time, the second oscillator circuit 2b is also controlled by the CPU 13 so that the SW7 operates when it is on the F _RFC side and stops when it is on the F _RF side. Reference numerals 11a, 11b, and 11c denote VCDs, and a voltage is applied to the cathode side via a resistor, and the capacitance of the VCD terminals changes by changing the voltage. 12a, 12b, 12c are coils, and the above 11a, 1
A resonant circuit is formed together with the VCDs of 1b and 11c to produce a filter effect. 9 is a high frequency amplifier circuit, and the amplification degree is the above.
It is controlled by the RF AGC circuit of IF circuit 5,
While the tuner is being automatically adjusted at the time of channel selection, it is controlled by the CPU 13 so that the maximum gain is obtained. Reference numeral 10 is a second BPF, which is a primary side composed of a VCD 11b and a coil 12b, and a secondary side composed of a VCD 11c and a coil 12c.
It consists of two stages on the next side. Reference numerals 14a and 14b denote AD converters. In the AD converter 14a, the oscillation frequency of the first local oscillation circuit 2a is determined when the oscillation frequency of the first local oscillation circuit 2a is locked by the PLL circuit 3. The tuning voltage (hereinafter referred to as BT4) is supplied to the CPU 13 and digitally converted for processing.

The AD converter 14b outputs the IFAGC voltage of the IF circuit 5 to the CPU1.
3. Digitally convert for feeding and processing. 15a, 15
b and 15c are DA converters, and the tuning voltage digitally processed by the CPU 13 is supplied to the BPFs of the respective stages 16a and 16c.
The analog conversion is performed in order to supply it through the b and 16c low-pass filters (hereinafter referred to as LPF). The operation of this system will be described below.

First, when the selection button of any channel of the channel selection means 1 is operated, the first local oscillation circuit 2a is locked by the PLL circuit 3, and at this time, the local oscillation circuit
BT4 is decided. This BT4 is digitally converted by the AD converter 14a and supplied to the CPU 13. In this CPU13,
At the same time as receiving BT4, it locks the line from the AD converter 14a to the CPU 13. This lock cannot be released unless there is a change in BT4 for one channel change.

SW7 is also switched to the F _RFC side by the control signal from the CPU 13 at the same time. Further, the second oscillator circuit 2b also starts operating under the control of the CPU 13 at the same time. Next, digitally processed BT4 is as it is 15a, 1 above
Convert to analog again with 5b, 15c DA converter, then 16a, 16
The BPF is roughly adjusted by being applied to the VCD of the BPF of each stage via the LPFs of b and 16c. Here, the output level of the second mixer circuit 6 is set to a level at which the IF AGC voltage of the IF circuit 5 reacts. FIG. 2 shows the changing characteristics of the IF AGC voltage with respect to the input level to the IF circuit 5, and the level at which the IF AGC reacts means the vicinity of point P where the changing characteristics are relatively steep. The IF AGC voltage is digitally converted by the AD converter 14b and supplied to the CPU 13. Next, the BPFs at each stage are tuned in sequence.
An example will be described with reference to the drawings. FIG. 3 shows the change characteristic of the IF AGC voltage of the upper IF circuit 5 with respect to the tuning frequency of the BPF. Figure 4 shows the tuning characteristics of BPF. In Fig. 1, when the primary side of the second BPF 10 is adjusted, all VCDs are controlled in the range of 0 to 30V, but the VCD of 11b is already the same as the VCDs of 11a and 11c. Since the coarse adjustment voltage V is applied, that is, at the position of f1 in FIGS. 3 and 4, the fine adjustment is started from here. In FIG. 3, V1 indicates the IF AGC voltage in the state of being roughly adjusted. Under the control of the CPU 13, the DA converter 15b first applies a voltage variation (ΔV) to the VCD 11b in accordance with the number of bits, from the state where the voltage change is the roughest, and the applied voltage of the VCD 11b becomes ( V + ΔV), IF 12
If the voltage rises from V1 to V12, the input level to the IF circuit 5 decreases from the characteristic of FIG. 2, that is, from the coarse adjustment state of the characteristic 19 of FIG. 4 to the characteristic 20 and the optimum tuning state.
It means that the gain of F _RFC mentioned above has fallen further toward higher than 17. Here, V1 and V12 are compared, and if V12 is higher than V1, the voltage is given to the VCD 11b so as to decrease the voltage, that is, increase the gain of the F _RFC .
At this time, if the IF AGC voltage in FIG. 3 falls to V13, the CPU 13 works to further lower it. Repeat this, and if it passes f0 and then becomes f2, the IF AGC voltage will rise from V0 in the optimum state to V2, so this time reduce the voltage change width and give voltage fluctuation to VCD of 11b above. . In the same manner, the position where the voltage change width is smallest is repeatedly approached to f0 as much as possible, and finally, when it makes several round trips up and down around f0, it is judged to be the optimum state, and the line of BT2 is locked. For BT1 and BT3 as well, perform the same adjustments in sequence, and it means that the receiving condition of the channel is kept optimal when all are locked. At the same time when all are locked, the above 7 SW is set to F _RF side. The operation is switched, and the operation of the second transmitting circuit 2b is stopped, and the adjustment is completed.

As described above, according to the present embodiment, by controlling the applied voltage of the VCD by the CPU individually for each stage while the BPF coil of each stage is fixed, the tuner can be automatically adjusted and tracking can be performed. You don't have to use a pair of VCDs to get better. Also, for all channels,
BPF tuning characteristics can be received optimally.

As described above, according to the present invention, if any channel is selected,
Create a carrier wave within the band of the selected channel, supply this carrier wave to the input stage of the tuner, and use it as a signal source for tuning the BPF of each stage. , The BPF VCD of each stage is controlled to supply the tuning voltage so that the IF output level of the tuner is maximized individually for each stage. Therefore, all the channels are automatically adjusted to the selected channel, no manual adjustment is required, and the VCDs are individually controlled, so there is no need to use pairs as before, so there is no selection cost. In addition, since any channel can be received in the optimum tuning state, image interference, adjacent or adjacent interference, and other interference relationships become stronger. Thus, it is extremely useful in terms of cost and performance.

Further, in the present invention, the means for creating the center frequency of the IF is provided in the tuner section as the second oscillator.
It has the following advantages over the method of supplying the center frequency of the IF created by the IF circuit to the second mixer circuit.

That is, since the connection line from the IF circuit to the second mixer circuit is unnecessary, various spurious signals generated in the IF circuit from the above connection line leak to the tuner side, and conversely, various spurious IF signals generated in the tuner side. Since the tuner circuit and the IF circuit can be designed as far as possible from each other without leaking to the side, the interference caused by the mutual interference between the IF and the tuner can be extremely reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of a channel selection apparatus according to an embodiment of the present invention, FIG. 2 is an input level characteristic diagram of an IF circuit, FIG. 3 is a characteristic diagram showing a change of IF AGC voltage with respect to a tuning frequency, and FIG. FIG. 5 is a block diagram of a conventional channel selecting device. 1 ... Channel selection circuit, 2 ... Local oscillation circuit, 3 ...
... PLL circuit, 4,6 ... Mixer circuit, 5 ... IF circuit, 7 ...
… Signal switching SW, 8,10 …… Band pass filter, 9
…… High frequency amplifier circuit, 11 …… VCD, 12 …… Coil, 13…
… CPU, 14 …… AD converter, 15 …… DA converter, 16
...... LPF.

Claims (1)

[Claims] 1. A means for applying an output of a first local oscillator of a predetermined frequency to a first mixer circuit corresponding to a channel selected in response to an operation of a channel selecting means, and an intermediate frequency. A second oscillator for generating the center frequency of the second oscillator, means for applying the output of the first local oscillator and the output of the second oscillator to the second mixer circuit, and the second mixer circuit. Means for applying a carrier having a center frequency of the channel selected by the channel selection means to the first mixer circuit via a bandpass filter having a plurality of stages; Means for individually changing the tuning frequency of each stage of the bandpass filter so as to maximize the output level, holding means for holding the tuning frequency, and After the holding in the holding means is performed, the input of the bandpass filter is switched from the carrier of the center frequency of the selected channel to the antenna input, and at the same time, the second oscillator circuit operation is stopped. Tuning device.