JPH0740740B2 - Motion detection circuit for television signals - Google Patents

Description

The present invention relates to a motion detection circuit for digital television signals.

[Conventional technology]

When digitizing a television signal, a high-efficiency coding method has been considered, which reduces the average value of the number of bits per pixel. An interframe coding method is known as one of them, and there is a motion correction method as the interframe coding method. This is to obtain positional relationship information (referred to as a motion correction amount or motion vector) between the current frame and the previous frame by motion detection, and operate the image of the previous frame based on this motion correction amount, The correspondence between frames is taken.

An example of a motion detection circuit applicable to such an interframe coding method is described in US Pat. No. 4,278,996. This motion detection is called the gradient method. As described below, the amount of motion is calculated using the frame difference and tilt information (sampling difference in the horizontal direction, line difference in the vertical direction) for the previous pixel in the motion area. Is to seek.

FIG. 6A shows a digital video signal of the current frame corresponding to an image having a luminance gradient. In FIG. 6, the horizontal axis represents the horizontal direction of the image, the vertical axis represents the level, and each pixel of the signal of the current frame is represented by ◯.
In addition, in FIGS. 4, 5, and 8 to be described later, the pixels are not shown for simplification.

FIG. 6B shows a digital video signal of the corresponding image in the previous frame, each pixel being indicated by a cross. Fig. 6B
From the position of to the position of FIG. 6A, an example in which the image moves to the right by two sampling intervals is illustrated. This amount of movement is generally represented by v1. FIG. 6C shows a digital video signal of the corresponding image in the previous frame, each pixel of which is represented by Δ. From the position of FIG. 6C to the position of FIG. 6A, an example in which the image moves to the left by two sampling intervals is shown. This amount of movement is generally represented by v1.

In the case of the above-described movement in the right direction, focusing on the area A surrounded by the inclined portions of the previous frame and the current frame in FIG. 6A, this area A is represented by A = v1 × h. Therefore, the motion amount v1 is obtained by v1 = A / h.

The area A can be represented by an integrated value of the frame difference ΔF. The frame difference ΔF is defined as “the pixel of the previous frame subtracted from the pixel of the current frame”. Here, the frame difference ΔF means a difference between the values of pixels at the same position in each frame, as is commonly used in the field of processing digital television signals. In the example of FIG. 6, in the case of rightward movement, the value of each pixel of the signal of FIG. 6B is subtracted from the value of each pixel of the signal of FIG. The frame difference ΔF shown is obtained. For example, from the pixel value x1 in FIG. 6A, the pixel value at the same position
By subtracting y1, the frame difference ΔF (= x1−y1
<0) is obtained. Similarly, even in the inclined portion where the inclination is negative, the frame difference ΔF (= x3−y3
> 0) is obtained.

Further, the height h is obtained by integrating the sampling difference ΔE of the inclined portion. Where sampling difference ΔE
Is defined as “the current sampling pixel minus the previous sampling pixel (that is, the pixel on the left side). In FIG. 6A, for example, for two consecutive pixels, x2−
A sampling difference ΔE is formed by x1. The sixth sampling difference ΔE formed from the video signal of the current frame is calculated.
Shown in Figure E.

If the integrated value of the absolute value of the frame difference of the moving area is represented by Σ | ΔF | and the integrated value of the absolute value of the sampling difference is represented by Σ | ΔE |, the magnitude of the horizontal motion amount v1 is Required by.

| v1 | = Σ | ΔF | / Σ | ΔE | For the movement in the left direction, the frame difference ΔF is obtained in the same manner as described above, and the result is shown in FIG. 6F. Since the sampling difference ΔE is obtained from the signal of the current frame, it is the same as that shown in FIG. 6E. Then, the magnitude of the movement amount can be obtained in the same manner as described above.

Here, when the polarity (sign) of the frame difference ΔF and the polarity (sign) of the sampling difference ΔE are examined, the following relationship is established, as can be seen from FIG. In the case of rightward movement, the frame difference ΔE is negative in the positive slope portion and the sampling difference ΔE is positive, and the frame difference ΔE is in the negative slope portion.
F is positive and the sampling difference ΔE is negative. That is,
In the case of rightward movement, the frame difference ΔF and the sampling difference ΔE have opposite polarities (different signs).

On the other hand, in the case of leftward movement, the frame difference ΔF is positive and the sampling difference ΔE is positive in the positive slope portion, and the frame difference ΔF is negative and the sampling difference ΔE is negative in the negative slope portion. Is. That is, in the case of leftward movement, the frame difference ΔF and the sampling difference ΔE have the same polarity (the same sign).

Therefore, the direction of motion can be known from the relationship between the polarities (signs) of the frame difference ΔF and the sampling difference ΔE. As one method for obtaining the amount of movement having a direction, the numerator is the integrated value of the frame differences of all pixels in the motion area including the positive and negative slopes, and the denominator is the integrated value of the absolute value | ΔE | of the sampling differences. . In order to make the direction and the polarity of the movement amount correspond to each other, the numerator (integrated value of the frame difference) of this equation has a positive polarity with respect to the frame difference ΔF when the sampling difference ΔE is positive (positive slope). When the sampling difference ΔE is negative (negative slope), the frame difference Δ
Use the value obtained by adding negative polarity to F and integrating.

Specifically explaining FIG. 6 by way of example, in the case of rightward movement, the polarity of ΔE is positive at a positive inclination,
A negative polarity is added to the negative frame difference, and since the polarity of ΔE is negative at the negative slope, the negative polarity of the positive frame difference is added and integrated. After all,
The integrated value of the frame difference is negative in any of the positive and negative slopes, and the polarity of the motion amount obtained by dividing the integrated value by the integrated value of the absolute value of ΔE is negative (that is, indicating the rightward motion).

In the case of leftward movement, the positive frame difference is added with a positive polarity at a positive slope, and the negative frame difference is added with a negative polarity at a negative slope. It As a result, the integrated value of the frame differences becomes positive at any inclination, and the polarity of the obtained motion amount becomes positive (that is, indicates the leftward motion).

In the description of this specification, with respect to the above-described two integration methods of the frame difference, which are performed for each of the positive and negative slopes, adding the frame difference with a positive polarity is referred to as addition, and the integrated value of the frame difference is The addition of negative polarity with respect to is referred to as subtraction. Further, the meaning of each operation of addition operation and subtraction operation performed by an adder / subtractor described later is also the same.

In this way, the horizontal movement amount v1 having a direction can be obtained by the following equation.

v1 = Σ {ΔF · sign (ΔE)} / Σ | ΔE | However, the sign (ΔE) becomes 0 when (ΔE = 0),
When (ΔE ≠ 0), ΔE / | ΔE |.

The above idea can be applied to the two-dimensional motion as it is. That is, although the frame difference ΔF newly generated by the vertical movement is also added, since the value of the code (ΔE) is uncorrelated with the vertical movement, the frame difference ΔF generated by the vertical movement is changed to the horizontal direction. The effects of are offset. The vertical movement amount v2 is obtained by the following equation if the line difference ΔL is defined as “current line pixel minus previous line pixel”.

v2 = Σ {ΔF · code (ΔL)} / Σ | ΔL | FIG. 7 is a block diagram showing the configuration of a conventional two-dimensional motion detection circuit. In FIG. 7, a digital television signal is supplied to the input terminal 61. This digital television signal is supplied to a frame delay circuit 62 having a delay amount of 1 frame, a sampling delay circuit 64 having a delay amount of 1 sampling period, and a line delay circuit 66 having a delay amount of 1 line.

Output from the frame delay circuit 62 from the input digital television signal by the subtractor indicated by 63 (pixels in the previous frame)
Is subtracted, and a frame difference ΔF is generated from the output of the subtractor 63. The subtracter indicated by 65 subtracts the output (pixel of the previous sample) of the sample delay circuit 64 from the input digital television signal, and the sampling difference ΔE is generated from the output of the subtractor 65. The subtractor indicated by 67 subtracts (pixels on the previous line) from the input digital television signal by the output of the line delay circuit 66, and the line difference ΔL is generated from the output of the subtractor 67.

The frame difference ΔF is supplied to the two integrating circuits.

One of the integrating circuits includes an adder / subtractor 71 and a register 72, and the adder / subtractor 71 is supplied with the frame difference ΔF and the output of the register 72. The other integrating circuit is composed of an adder / subtractor 81 and a register 82, and the frame difference ΔF and the output of the register 82 are supplied to the adder / subtractor 81. The frame difference ΔF is supplied to the adder / subtractors 71 and 81 of these integrating circuits.

The adder / subtractor 71 is configured to perform one of addition and subtraction arithmetic operations according to the output of the control circuit 73. The arithmetic circuit 65 supplies the sampling difference ΔE to the control circuit 73. When the sign of the sampling difference ΔE is positive, the addition operation is performed, and when the sign of the sampling difference ΔE is negative, the subtraction operation is performed. The control circuit 73 controls the adder / subtractor 71.

The adder / subtractor 81 is configured to perform one of addition and subtraction operation operations according to the output of the control circuit 83. The subtraction circuit 67 supplies the line difference ΔL to the control circuit 83. When the line difference ΔL has a positive sign, the addition operation is performed, and when the line difference ΔL has a negative sign, the subtraction operation is performed. The control circuit 83 controls the adder / subtractor 81.

The sampling difference ΔE is supplied to the conversion circuit 74, converted into an absolute value, and supplied to one input of the adder 75 for integration. The output of the adder 75 is supplied to the register 76, the output of the register 76 is supplied to the other input of the adder 75, and the integrated value of the absolute value of the sampling difference ΔE is taken out from the output of the register 76.

The line difference ΔL is supplied to the conversion circuit 84, converted into an absolute value, and supplied to one input of an adder 85 for integration. The output of adder 85 is fed to register 86
The output of 86 feeds the other input of adder 85
The integrated value of the absolute value of the line difference ΔL is taken out from the output of 86.

As described above, the horizontal motion v1 is obtained by adding or subtracting the frame difference ΔF in the motion area and dividing by the divider 77 by the integrated value of the absolute values of the sampling difference ΔE, and is output to the output terminal 78. This motion output v1 can be obtained.
Further, the vertical movement v2 is obtained by adding or subtracting the frame difference ΔF in the moving area by the divider 87 to obtain the line difference ΔL.
This motion output v2 can be obtained at the output terminal 88 by being divided by the integrated value of the absolute value of.

[Problems to be solved by the invention]

The conventional motion detection circuit described above has a drawback that the error in motion detection increases when the motion is large or when the edge of the moving object is steep.

FIG. 8A shows a case where a movement v occurs from the position of the previous frame shown by the broken line to the position shown by the solid line in the left direction. In FIG. 8A, in the section in which the sampling difference ΔE of the current frame is (ΔE ≠ 0), the adder / subtractor determines the frame difference ΔF.
In the interval (ΔE = 0), the adder / subtractor does not integrate the frame difference ΔF, so that the area other than the vertical line does not contribute to the area of the frame difference and the motion detection is not performed. A decrease in accuracy occurs. In particular, the detection error increases when the amount of movement is large.

In order to solve this problem, not only the sampling difference of the current frame but also the sampling difference of the previous frame is used,
It is considered to control the adder / subtractor with the OR output of both. Also in this method, as shown in FIG. 8B, there is a portion that does not contribute to the area of the frame difference. Therefore, when there is a large movement, the detected movement amount is smaller than the actual amount.

Further, even if the movement is small, as shown in FIG. 8C, when the inclination is steep, the frame difference hardly contributes to the area and an error occurs.

Therefore, an object of the present invention is to provide a motion detection circuit for a television signal, which does not deteriorate the accuracy of motion detection even when the motion is large or the inclination is steep.

[Means for Solving the Problems] The present invention relates to delay and calculation means 2 and 3 for generating a frame difference ΔF which is a difference between pixels at the same position between a current frame and a previous frame of a digital television signal, and adjacent By subtracting the value of the pixel to be used, the delay and operation means 4,5 (6, 7) for generating the slope ΔE (ΔL) of the digital television signal and the polarity corresponding to the polarity of the slope ΔE (ΔL) are provided. In addition to calculating the frame difference ΔF, the integrating means 11, (12) and the integrating means 11, (12) are controlled so that the integration is continued without changing the polarity until the polarity of the gradient ΔE (ΔL) changes. A motion detecting circuit for a television signal, comprising means 14 and (24) for outputting the motion amount by dividing the output of 12) by the integrated value of the absolute value of the slope ΔE (ΔL). .

[Action]

Since the control circuit 13 (23) holds the calculation state of one sample (one line) before the change of the sign of the inclination of the digital television signal, the motion amount is calculated by the integrated value of the frame differences. Therefore, even if the movement is large, the movement can be accurately detected.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In FIG. 1, a digital television signal is supplied to an input terminal indicated by 1. This digital television signal is supplied to a frame delay circuit 2 having a delay amount of 1 frame, a sampling delay circuit 4 having a delay amount of 1 sampling period, and a line delay circuit 6 having a delay amount of 1 line.

An output of the frame delay circuit 2 from the input digital television signal (pixels of the previous frame) by the subtractor 3
Is subtracted, and a frame difference ΔF is generated from the output of the subtractor 3. The output of the sampling delay circuit 4 (the pixel of the previous sample) is subtracted from the input digital television signal by the subtractor 5 and the sampling difference ΔE is generated from the output of the subtractor 5. The output of the line delay circuit 6 (pixels on the previous line) is subtracted from the input digital television signal by the subtractor 7 and a line difference ΔL is generated from the output of the subtractor 7.

The frame difference ΔF is supplied to the two integrating circuits. One of the integrating circuits includes an adder / subtractor 11 and a register 12, and the adder / subtractor 11 is supplied with the frame difference ΔF and the output of the register 12. The other integrating circuit is an adder / subtractor 21 and a register.
22 and the frame difference ΔF and the output of the register 22 are supplied to the adder / subtractor 21. The frame difference ΔF is supplied to the adder / subtractors 11 and 21 of these integrating circuits.

The adder / subtractor 11 is configured to perform one of an addition operation and a subtraction operation according to a control signal generated at the output terminal 15C of the control circuit 13. That is, when the control signal is high level,
The subtractor 11 performs an addition operation, and when the control signal is low level, the addition / subtraction device 11 performs a subtraction operation. The data of the current pixel of the digital television signal is supplied from the input terminal 1 to one input terminal 15A of the control circuit 13, and the output data (previous pixel) of the sample delay circuit 4 is supplied to the other input terminal 15B. Supplied.

The adder / subtractor 21 is configured to perform one of an addition operation and a subtraction operation based on a control signal generated at the output terminal 25C of the control circuit 23. That is, when the control signal is high level,
The subtractor 21 performs the addition operation, and when the control signal is at the low level, the addition / subtraction device 21 performs the subtraction operation. The data of the current pixel of the digital television signal is supplied from the input terminal 1 to one input terminal 25A of the control circuit 23, and the output data (previous pixel) of the line delay circuit 6 is supplied to the other input terminal 25B. Supplied.

As will be described later, the control circuit 13 controls the sampling difference Δ
The state of the control signal is held in the state of one sample before the sign of E is inverted. Similarly, the control circuit
As will be described later, 23 is configured to hold the state of the control signal in the state of one line before, until the sign of the line difference ΔL is inverted.

The sampling difference ΔE output from the subtraction circuit 5 is supplied to the conversion circuit 16, converted into an absolute value, and supplied to one input of an adder 17 for integration. The output of the adder 17 is supplied to the register 18, the output of the register 18 is supplied to the other input of the adder 17, and the integrated value of the absolute value of the sampling difference ΔE is taken out from the output of the register 18.

The line difference ΔL from the subtraction circuit 7 is supplied to a conversion circuit 26, converted into an absolute value, and supplied to one input of an adder 27 for integration. The output of the adder 27 is supplied to the register 28, the output of the register 28 is supplied to the other input of the adder 27, and the output of the register 28 is the integrated value of the absolute values of the line difference ΔL.

As described above, the horizontal movement v1 is obtained by adding or subtracting the frame difference ΔF in the movement area and dividing the result by the integrated value of the absolute value of the sampling difference ΔE by the divider 14, and is output to the output terminal 19. This motion output v1 can be obtained.
Further, the vertical movement v2 is obtained by adding or subtracting the frame difference ΔF in the movement region by the divider 24 to obtain the line difference ΔL.
This motion output v2 can be obtained at the output terminal 29 by dividing by the integrated value of the absolute value of.

FIG. 2 shows a specific configuration of the control circuit 13 of this embodiment. The data of the current pixel from the input terminal 1A and the data of the pixel one sample before from the input terminal 15B are supplied as two inputs A and B of the comparison circuit 31. One output C of the comparison circuit 31 becomes high level when (A> B),
The other output D is high level when (A = B).

The output C of the comparison circuit 31 is supplied to the AND gate 32, and the output D of the comparison circuit 31 is supplied to the AND gate 32 via the inverter 33.

The output of the AND gate 32 is supplied to the OR gate 34, the output of the OR gate 34 is taken out to the output terminal 15C, and D
It is supplied to the flip-flop 35. The output of the D flip-flop 35 and the output D of the comparison circuit 31 are supplied to the AND gate 37, and the output of the AND gate 37 is supplied to the OR gate 34. A sampling clock is supplied to the D flip-flop 35 from the terminal 36, and the D flip-flop 35 causes a delay of one sampling period.

Although not shown, the state of the D flip-flop 35 at the first position of each line is set to be the same as the state at the first position of the previous line. This is because it is not known whether the control signal to the adder / subtractor 11 is set to the high level or the low level when the sampling difference ΔE is 0 at the start position of the line, and therefore the correlation between the lines is used. It is necessary to set the state as correct as possible.

Here, the operation of the control circuit 13 when a leftward movement as shown in FIG. 4 occurs will be described. Of the slopes of the current frame indicated by the solid line, when the sampling difference ΔE is positive and the frame difference ΔF is positive, (A> B)
The output C of the comparison circuit 31 becomes high level and its output D becomes low level. Therefore, the output of the AND gate 32 becomes high level, and the output of the OR gate 34 also becomes high level.
The output (that is, the control signal) of the OR gate 34 causes the adder / subtractor 11 to perform the addition operation, and the output Q of the D flip-flop becomes high level.

Then, a section where the sampling difference ΔE is 0 (flat part)
Then, since (A = B), the output C of the comparison circuit 31 becomes low level and the output D thereof becomes high level. Therefore, although the output of the AND gate 32 becomes low level, the output of the AND gate 37 is held at high level and the control signal remains at high level. In the section where the sampling difference ΔE is negative and the frame difference ΔF is negative, both outputs C and D of the comparison circuit 31 are at a low level, so that OR
The control signal output from the gate 34 becomes low level.
As a result, the adder / subtractor 11 is switched to a state in which it performs the subtraction operation.

FIG. 4B shows the control signal output from the OR gate 34, and FIG. 4C shows the operation of the adder / subtractor 11 based on this control signal. It goes high after the control signal goes low when a positive slope occurs. In this way, the control circuit 13 contributes the frame difference ΔF to the area indicated by the vertical line in FIG. 4A, and it is possible to prevent the accuracy of the motion detection from decreasing.

Further, as shown in FIG. 5A, as a result of the value of two consecutive pixels changing stepwise, there is a steep slope, and the position of the previous frame (shown by a broken line) and the position of the current frame (a solid line) are still present. Even if the motion v does not overlap with (), the positive sampling difference is obtained at the rising edge of the image of the current frame, and the negative sampling difference is obtained at the rising edge. A control signal can be generated,
As shown in FIG. C, the operation of the adder / subtractor 11 can be controlled and the frame difference can be correctly added / subtracted.

FIG. 3 shows a specific configuration of the control circuit 23 in this embodiment. The data of the current pixel from the input terminal 25A and the data of the previous line from the input terminal 25B are compared circuit 4
It is supplied as two inputs A and B of 1. One output C of the comparator circuit 41 becomes high level when (A> B), and the other output D becomes high level when (A = B).

The output C of the comparison circuit 41 is supplied to the AND gate 42, and the output D of the comparison circuit 41 is supplied to the AND gate 42 via the inverter 43. The output of the AND gate 42 is supplied to the OR gate 44, the output of the OR gate 44 is taken out to the output terminal 25C as a control signal, and is supplied to the line memory 45. The control signal of one line before output from the line memory 45 and the output D of the comparison circuit 41 are supplied to the AND gate 47, and the output of the AND gate 47 is supplied to the OR gate 44.

This control circuit 23, like the control circuit 13 described above, holds the state of the control signal in the previous state until the sign of the inclination (line difference) ΔL is inverted, thereby improving the accuracy of motion detection in the vertical direction. it can.

Although not shown, the initial state of the control circuit 23 is set by utilizing the correlation between frames. That is, the content of the line memory 45 is set to the top line, which is the same as the top line of the previous frame.

〔The invention's effect〕

According to the present invention, there is a problem that, even in the case of a large movement or an object having a steep inclination, the integrated frame difference ΔF contributes little to the frame difference area, or cannot contribute to the frame difference area. It can be solved and the motion detection can be performed with high accuracy.

[Brief description of drawings]

1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of a control circuit for horizontal motion detection in an embodiment of the present invention, and FIG. 3 is a block diagram of an embodiment of the present invention. A block diagram of a control circuit for motion detection in the vertical direction, FIGS. 4 and 5 are schematic diagrams used to explain the operation of an embodiment of the present invention, and FIG. 6 is an explanation of motion detection by the gradient method. 7 is a block diagram of a conventional motion detection circuit, and FIG. 8 is a schematic diagram used for explaining problems of the conventional motion detection circuit. 1: Input terminal of digital television signal, 2: Frame delay circuit, 4: Sample delay circuit, 6: Line delay circuit, 3,
5,7: Subtraction circuit, 11,21: Adder / subtractor, 13,23: Control circuit, 1
9,29: Output terminal.

Claims (1)

[Claims] Claim: What is claimed is: 1. A digital television, comprising: a delay and calculation means for generating a frame difference, which is a difference between pixels at the same position between a current frame and a previous frame of a digital television signal; and subtracting the values of adjacent pixels. A delay and calculation means for generating the inclination of the John signal, while accumulating the frame difference corresponding to the polarity of the inclination, and continuing the integration without changing the polarity until the polarity of the inclination changes. A motion detection circuit for a television signal, comprising: a controlled integrating means; and means for outputting an amount of motion by dividing an output of the integrating means by an integrated value of the absolute values of the inclinations.